Commit Graph

927 Commits

Author SHA1 Message Date
Akira Hatanaka 4350c183d4 Modify class ReadHardware and add definition of 64-bit version of instruction
RDHWR. 

llvm-svn: 146101
2011-12-07 23:31:26 +00:00
Akira Hatanaka 66232aa19d Add newline.
llvm-svn: 146100
2011-12-07 23:26:03 +00:00
Akira Hatanaka 36d2198dae Add 64-bit HWR29 register.
llvm-svn: 146099
2011-12-07 23:23:52 +00:00
Akira Hatanaka 9778e7a67c 32 to 64-bit anyext pattern.
llvm-svn: 146097
2011-12-07 23:21:19 +00:00
Akira Hatanaka ae378af667 32 to 64-bit zext pattern.
llvm-svn: 146096
2011-12-07 23:14:41 +00:00
Bruno Cardoso Lopes 56b70de01b Variable cleanup. Based on past patch submittals variable names have
been normalized and more descriptive comments added. Patch by Reed
Kotler and Jack Carter.

llvm-svn: 146088
2011-12-07 22:35:30 +00:00
Akira Hatanaka b2e05cb6b1 64-bit WrapperPICPat patterns.
llvm-svn: 146086
2011-12-07 22:11:43 +00:00
Akira Hatanaka 6820eebde1 Define base class for WrapperPICPat.
llvm-svn: 146081
2011-12-07 21:54:54 +00:00
Akira Hatanaka c5b5a8d8b1 Modify LowerFCOPYSIGN to handle Mips64.
llvm-svn: 146080
2011-12-07 21:48:50 +00:00
Akira Hatanaka 4f864b78e6 Fix comment.
llvm-svn: 146063
2011-12-07 20:15:01 +00:00
Akira Hatanaka d16e926a6b Fix comment.
llvm-svn: 146062
2011-12-07 20:13:53 +00:00
Akira Hatanaka 4a04a56a36 Fix 64-bit immediate patterns.
llvm-svn: 146059
2011-12-07 20:10:24 +00:00
Evan Cheng 7f8e563a69 Add bundle aware API for querying instruction properties and switch the code
generator to it. For non-bundle instructions, these behave exactly the same
as the MC layer API.

For properties like mayLoad / mayStore, look into the bundle and if any of the
bundled instructions has the property it would return true.
For properties like isPredicable, only return true if *all* of the bundled
instructions have the property.
For properties like canFoldAsLoad, isCompare, conservatively return false for
bundles.

llvm-svn: 146026
2011-12-07 07:15:52 +00:00
Bruno Cardoso Lopes 61e6d987bf Add a few moreLocal/Global R_MIPS_GOT related fixups and
make the addend fixup code a bit more generic

Patch by Jack Carter.

llvm-svn: 145998
2011-12-07 00:28:57 +00:00
Evan Cheng 2a81dd4a3c First chunk of MachineInstr bundle support.
1. Added opcode BUNDLE
2. Taught MachineInstr class to deal with bundled MIs
3. Changed MachineBasicBlock iterator to skip over bundled MIs; added an iterator to walk all the MIs
4. Taught MachineBasicBlock methods about bundled MIs

llvm-svn: 145975
2011-12-06 22:12:01 +00:00
Bruno Cardoso Lopes 0c24d8a406 Use branches instead of jumps + variable cleanup. Testcase coming next. Patch by Jack Carter
llvm-svn: 145912
2011-12-06 03:34:48 +00:00
Bruno Cardoso Lopes 1b1a122b4c Add register HWR29 numbering. Patch by Jack Carter
llvm-svn: 145910
2011-12-06 03:34:36 +00:00
NAKAMURA Takumi d3002490bf MipsAsmBackend.cpp, PPCAsmBackend.cpp: Fix -Asserts build to appease msvc.
llvm-svn: 145894
2011-12-06 01:48:32 +00:00
Jim Grosbach 25b63fa117 Move target-specific logic out of generic MCAssembler.
Whether a fixup needs relaxation for the associated instruction is a
target-specific function, as the FIXME indicated. Create a hook for that
and use it.

llvm-svn: 145881
2011-12-06 00:47:03 +00:00
Akira Hatanaka 20cee2eba1 Add definitions of 64-bit extract and insert instrucions and make
PerformANDCombine and PerformOrCombine aware of them. Test cases are included
too.

llvm-svn: 145853
2011-12-05 21:26:34 +00:00
Akira Hatanaka 9b8ac674bc Split ExtIns into two base classes and have instructions EXT and INS derive from
them.

llvm-svn: 145852
2011-12-05 21:14:28 +00:00
Akira Hatanaka 34e3df76f9 Have LowerJumpTable support Mips64. Modify 2010-07-20-Switch.ll to test N64 and
O32 with relocation-model=pic too.

llvm-svn: 145850
2011-12-05 21:03:03 +00:00
Nick Lewycky 50f02cb21b Move global variables in TargetMachine into new TargetOptions class. As an API
change, now you need a TargetOptions object to create a TargetMachine. Clang
patch to follow.

One small functionality change in PTX. PTX had commented out the machine
verifier parts in their copy of printAndVerify. That now calls the version in
LLVMTargetMachine. Users of PTX who need verification disabled should rely on
not passing the command-line flag to enable it.

llvm-svn: 145714
2011-12-02 22:16:29 +00:00
Akira Hatanaka dc25f9f38a Change names for MIPS "generic" processors defined in Mips.td to match what GNU
tools use. Patch by Simon Atanasyan.

"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"

llvm-svn: 145451
2011-11-29 23:08:41 +00:00
Daniel Dunbar 539d0a8a09 build/CMake: Finish removal of add_llvm_library_dependencies.
llvm-svn: 145420
2011-11-29 19:25:30 +00:00
Akira Hatanaka 049e9e4d22 This patch makes the following changes necessary for MIPS' direct code emission.
- lower unaligned loads/stores.
- encode the size operand of instructions INS and EXT.
- emit relocation information needed for JAL (jump-and-link).  

llvm-svn: 145113
2011-11-23 22:19:28 +00:00
Akira Hatanaka f5ddf13f79 This patch addresses gp relative fixups/relocations for jump tables.
llvm-svn: 145112
2011-11-23 22:18:04 +00:00
Akira Hatanaka b31abde0f3 Lower 64-bit constant pool node.
llvm-svn: 144849
2011-11-16 22:44:38 +00:00
Akira Hatanaka eb42071721 Lower 64-bit block address.
llvm-svn: 144847
2011-11-16 22:42:10 +00:00
Akira Hatanaka 7b8547c4d0 Add patterns for 64-bit tglobaladdr, tblockaddress, tjumptable and tconstpool
nodes.

llvm-svn: 144841
2011-11-16 22:39:56 +00:00
Akira Hatanaka 6d617ceca2 64-bit jump register instruction.
llvm-svn: 144840
2011-11-16 22:36:01 +00:00
Evan Cheng ecb2908bf9 Sink codegen optimization level into MCCodeGenInfo along side relocation model
and code model. This eliminates the need to pass OptLevel flag all over the
place and makes it possible for any codegen pass to use this information.

llvm-svn: 144788
2011-11-16 08:38:26 +00:00
Akira Hatanaka 6ee8fc88c7 Fix functions in MipsFrameLowering.cpp and MipsRegisterInfo.cpp. Use 64-bit
registers and instructions when ABI is N64.

llvm-svn: 144666
2011-11-15 18:53:55 +00:00
Akira Hatanaka 494913270e Set nomacro before emitting the sequence of instructions that set global pointer
register.

llvm-svn: 144665
2011-11-15 18:44:44 +00:00
Akira Hatanaka 66a14c0650 Simplify function PassByValArg64.
llvm-svn: 144664
2011-11-15 18:42:25 +00:00
Akira Hatanaka b7796ae938 Delete files.
llvm-svn: 144655
2011-11-15 18:22:48 +00:00
Akira Hatanaka 1c0590c5da Remove MipsMCSymbolRefExpr.
llvm-svn: 144654
2011-11-15 18:20:08 +00:00
Benjamin Kramer 319904cc7e Unbreak Release builds.
llvm-svn: 144560
2011-11-14 19:51:48 +00:00
Akira Hatanaka f93b3f46f8 32-to-64-bit extended load.
llvm-svn: 144554
2011-11-14 19:06:14 +00:00
Akira Hatanaka 0b8bc00424 AnalyzeCallOperands function for N32/64.
N32/64 places all variable arguments in integer registers (or on stack),
regardless of their types, but follows calling convention of non-vaarg function
when it handles fixed arguments.

llvm-svn: 144553
2011-11-14 19:02:54 +00:00
Akira Hatanaka 52359363f2 Modify LowerFormalArguments to correctly handle vaarg arguments for Mips64.
llvm-svn: 144552
2011-11-14 19:01:09 +00:00
Akira Hatanaka d673cfe027 Remove variable that keeps the size of area used to save byval or variable
argument registers on the callee's stack frame, along with functions that set
and get it.
    
It is not necessary to add the size of this area when computing stack size in
emitPrologue, since it has already been accounted for in
PEI::calculateFrameObjectOffsets.

llvm-svn: 144549
2011-11-14 18:56:20 +00:00
Akira Hatanaka 77733535eb Fix typo.
llvm-svn: 144453
2011-11-12 02:38:12 +00:00
Akira Hatanaka 19891f843c Implement Mips64's handling of byval arguments in LowerCall.
llvm-svn: 144452
2011-11-12 02:34:50 +00:00
Akira Hatanaka fb9bae34da Implement Mips64's handling of byval arguments in LowerFormalArguments.
llvm-svn: 144449
2011-11-12 02:29:58 +00:00
Akira Hatanaka 5ed07c03f4 64-bit arbitrary immediate pattern.
llvm-svn: 144448
2011-11-12 02:25:00 +00:00
Akira Hatanaka 202f6400ef Function for handling byval arguments.
llvm-svn: 144447
2011-11-12 02:20:46 +00:00
Daniel Dunbar 52823cc91c build: Attempt to rectify inconsistencies between CMake and LLVMBuild versions of explicit dependencies.
- The hope is that we have a tool/test to verify these are accurate (and tight) soon.

llvm-svn: 144444
2011-11-12 02:10:57 +00:00
Daniel Dunbar 7f89f4c91c CMake: Fix CMake build for new Mips tblgen file.
llvm-svn: 144423
2011-11-11 23:12:56 +00:00
Bruno Cardoso Lopes c85e3ff334 Mips MC object code emission improvements:
"With this patch we can now generate runnable Mips code through LLVM
direct object emission. We have run numerous simple programs, both C
and C++ and with -O0 and -O3 from the output. The code is not production
ready, but quite useful for experimentation." Patch and message by
Jack Carter

llvm-svn: 144414
2011-11-11 22:58:42 +00:00