Commit Graph

394038 Commits

Author SHA1 Message Date
Haowei Wu 8b4acb067f [elfabi] Prepare elfabi/ifs merging.
This change implements unified text stub format and command line
interface proposed in the elfabi/ifs merge plan.

Differential Revision: https://reviews.llvm.org/D99399
2021-07-19 11:22:43 -07:00
Jonas Paulsson 6c0e6895d0 [SystemZ] Handle NoRegister in SystemZTargetLowering::emitMemMemWrapper().
Bugfix: The compiler should be able to generate a memset to nullptr.

Review: Ulrich Weigand
2021-07-19 20:04:44 +02:00
Amy Huang fd972bb9fd Revert "[llvm][sve] Lowering for VLS truncating stores" because it
causes a seg fault (see https://reviews.llvm.org/D104471).

This reverts commit c305557acd.
2021-07-19 11:03:33 -07:00
Eli Friedman 4f993463ca [NFC] Run -instnamer on test Transforms/LICM/sink-debuginfo-preserve.ll 2021-07-19 11:00:47 -07:00
Rob Suderman 11dda1a234 [mlir][tosa] Added shape inference for tosa convolution operations
Added shape inference handles cases for convolution operations. This includes
conv2d, conv3d, depthwise_conv2d, and transpose_conv2d. With transpose conv
we use the specified output shape when possible however will shape propagate
if the output shape attribute has dynamic values.

Reviewed By: jpienaar

Differential Revision: https://reviews.llvm.org/D105645
2021-07-19 10:41:56 -07:00
Amara Emerson 03cdb5221d [GlobalISel] Fix load-or combine moving loads across potential aliasing stores.
Although this combine checks that there's no load folding barriers between
the loads that it's trying to merge, it was inserting the load at the
MIRBuilder's default insertion point, which is the G_OR use inst.

This was causing a miscompile in the test suite's
SingleSource/Regression/C/gcc-c-torture/execute/GCC-C-execute-bswap-2

Differential Revision: https://reviews.llvm.org/D106251
2021-07-19 10:23:23 -07:00
Wouter van Oortmerssen 670944fb20 [WebAssembly] Support R_WASM_MEMORY_ADDR_TLS_SLEB64 for wasm64
Also fixed TLS tests swapping addr & value in store op
Differential Revision: https://reviews.llvm.org/D106096
2021-07-19 10:22:43 -07:00
Craig Topper 50302feb1d [SelectionDAG][RISCV] Use isSExtCheaperThanZExt to control whether sext or zext is used for constant folding any_extend.
RISCV would prefer a sign extended constant since that works better
with our constant materialization. We have an existing TLI hook we
use to control sign extension of setcc operands in type legalization.
That hook happens to do the right check we need here, but might be
straying from its original purpose. With only RISCV defining this
hook in tree, I wasn't sure if it was worth adding another hook
with identical behavior.

This is an alternative to D105785 where I tried to handle this in
the RISCV backend by not creating ANY_EXTENDs in some places.

Reviewed By: frasercrmck

Differential Revision: https://reviews.llvm.org/D105918
2021-07-19 09:25:28 -07:00
Hanhan Wang 9c49195330 [mlir][Linalg] Migrate 2D pooling ops from tc definition to yaml definition.
This deletes all the pooling ops in LinalgNamedStructuredOpsSpec.tc. All the
uses are replaced with the yaml pooling ops.

Reviewed By: gysit, rsuderman

Differential Revision: https://reviews.llvm.org/D106181
2021-07-19 09:24:02 -07:00
Victor Campos 59e4e53ead [NewPM] Fix wrong perfect forwardings
Some template functions were missing '&&' in function arguments,
therefore these were always taken by value after template instantiation.

This patch adds the double ampersand to introduce proper perfect
forwarding.

Reviewed By: aeubanks

Differential Revision: https://reviews.llvm.org/D106148
2021-07-19 17:21:32 +01:00
Amy Kwan 356300a351 [NFC][PowerPC] Update builtins-ppc-altivec.c to be run under `-faltivec-src-compat=mixed`
This patch adds the `-faltivec-src-compat=mixed` option to the
`builtins-ppc-altivec.c` test.

Currently, the default for `-faltivec-src-compat` is `mixed`. The reason we
explicitly specify `mixed` to the RUN lines of this test is because eventually,
the default will set to `xl`.

Having the default as `xl` changes the CHECKs of this test slightly, as it
reorders some of the `vector bool` and `vector pixel` CHECKs (since under the
`xl` option, `vector bool` and `vector pixel` are treated in the same way as
other vector scalars). Explicitly specifying `mixed` ensures that we are testing
pre-existing Clang behaviour.

Differential Revision: https://reviews.llvm.org/D106282
2021-07-19 11:20:21 -05:00
Simon Pilgrim 8c598b77a0 [ISD] Add disclaimer comments to AssertSext/Zext/Align opcodes about poison values
As encountered on D106053, we need to be very explicit that the Assertion nodes don't hold true for a poison value (or for specific poisoned vector elements).

Differential Revision: https://reviews.llvm.org/D106257
2021-07-19 17:15:28 +01:00
Simon Pilgrim 142e60f40b [X86] Fix case of IsAfterLegalize argument. NFC.
Pulled out of D106280
2021-07-19 17:15:28 +01:00
Tobias Gysi 87656a3134 [mlir][linalg] Fold TensorCast into PadTensorOp.
Add pattern to fold a TensorCast into a PadTensorOp if the cast removes static size information.

Reviewed By: nicolasvasilache

Differential Revision: https://reviews.llvm.org/D106278
2021-07-19 15:57:38 +00:00
Matt Arsenault 67d6132463 GlobalISel: Preserve memory types for implicit sret load/stores 2021-07-19 11:52:42 -04:00
David Green 5561ad8b36 [ARM] Remove PromotedBitwiseVT for NEON types
This removes the promotion of NEON AND, OR and XOR nodes to v2i32/v4i32,
treating them the same as the AArch64 and MVE backends where we just add
the relevant patterns for each legal type. This prevents a lot of
bitcasts from being added to the DAG, which have the potential to make
optimizations more difficult. It does mean adding extra patterns, and
some codegen can change due to the types now being legal, not promoted.

Differential Revision: https://reviews.llvm.org/D105588
2021-07-19 16:36:33 +01:00
maekawatoshiki 74f0f9a455 [LICM] Create LoopNest Invariant Code Motion (LNICM) pass
This patch adds a new pass called LNICM which is a LoopNest version of LICM and a test case to show how LNICM works.
Basically, LNICM only hoists invariants out of loop nest (not a loop) to keep/make perfect loop nest. This enables later optimizations that require perfect loop nest.

Reviewed By: Whitney

Differential Revision: https://reviews.llvm.org/D104180
2021-07-20 00:31:18 +09:00
Matt Arsenault 9236125ec8 GlobalISel: Preserve LLT when bitcasting loads and stores
This also avoids improperly legalizing some truncating vector stores.
2021-07-19 11:30:14 -04:00
Riccardo Mori 84dfbf5a77 [Polly][Isl] Stop using isl::set::lex_le_set. NFC
This is part of an effort to reduce the differences between the custom C++ bindings used right now by polly in `lib/External/isl/include/isl/isl-noxceptions.h` and the official isl C++ interface.

Changes made:
 - Stop using `isl::set::lex_le_set`. The official way to do this is to use `isl::map::lex_le_at`
 - Removed `isl::set::lex_le_set` from `isl-noexceptions.h`
 - `isl-noexceptions.h` has been generated by this 266fea1d3d

Reviewed By: Meinersbur

Differential Revision: https://reviews.llvm.org/D106269
2021-07-19 17:23:56 +02:00
peter klausler ad424cf1ed [flang] Runtime API for data pointers
Define and implement an API for use by lowering to
implement operations on pointers.

Differential Revision: https://reviews.llvm.org/D106170
2021-07-19 08:23:06 -07:00
Dmitry Vyukov 7f67263d56 tsan: remove duplicate arch switch in buildgo.sh
For some reason we have 2 switches on arch and add
half of arch flags in one place and half in another.
Merge these 2 switches.

Reviewed By: melver

Differential Revision: https://reviews.llvm.org/D106274
2021-07-19 17:19:17 +02:00
Hsiangkai Wang 77bb82d068 [Clang][RISCV] Support half-precision floating point for RVV intrinsics.
Use _Float16 as the half-precision floating point type. Define a new
type specifier 'x' for the _Float16 type.

Differential Revision: https://reviews.llvm.org/D105001
2021-07-19 23:17:01 +08:00
Matt Arsenault e574fd9d52 AArch64/GlobalISel: Cleanup unnecessary size checks in call lowering
The CCValAssign types should now be accurate, so these are no longer
necessary.
2021-07-19 11:01:30 -04:00
Giorgis Georgakoudis fb0cf01795 Revert "[OpenMP] Codegen aggregate for outlined function captures"
This reverts commit e9c7291cb2.

Fix failing tests
2021-07-19 07:54:26 -07:00
Amy Kwan dd5aa657a5 [PowerPC] Implement vector bool/pixel initialization under -faltivec-src-compat=xl
This patch implements the initialization of vectors under the
-faltivec-src-compat=xl option introduced in https://reviews.llvm.org/D103615.

Under this option, the initialization of scalar vectors, vector bool, and vector
pixel are treated the same, where the initialization value is splatted across
the whole vector.

This patch does not change the behaviour of the -faltivec-src-compat=mixed option,
which is the current default for Clang.

Differential Revision: https://reviews.llvm.org/D106120
2021-07-19 09:10:06 -05:00
Jeremy Morse f46321207f [InstrRef][X86] Drop debug instruction numbers from x87 instructions
Avoid a crash when using instruction referencing if x87 floating point
instructions are used. These instructions are significantly mutated when
they're rewritten from referring to registers, to referring to
floating-point-stack positions. As a result, their operands are re-ordered,
and (InstrRef) LiveDebugValues asserts when it sees a DBG_INSTR_REF
referring to a non-reg non-def register operand.

To fix this, drop the instruction numbers, and thus variable locations.
This patch adds a helper utility do do that.

Dropping the variable locations is sub-optimal, but applying DBG_VALUEs to
the $fp0 and similar registers is dropped on emission too. It seems we've
never done well at describing variables that live in x87 registers, at all.

Differential Revision: https://reviews.llvm.org/D105657
2021-07-19 15:08:27 +01:00
Jamie Schmeiser 73840f9f81 thread_local support for AIX
Summary:
The AIX linker will produce errors on unresolved weak symbols.  Change the
generated code to not check for the initialization function but just call
it and ensure that it always exists.  Also, the AIX atexit routine has a
different name (and signature) so call it correctly.  Update the lit tests
to test on AIX appropriately.

Author: Jamie Schmeiser <schmeise@ca.ibm.com>
Reviewed By: hubert.reinterpretcast (Hubert Tong)
Differential Revision: https://reviews.llvm.org/D104420
2021-07-19 10:03:22 -04:00
Kazu Hirata f15c39ba9e [CodeGen] Remove isNON_TRUNCStore and isTRUNCStore (NFC)
The last use of isNON_TRUNCStore was removed on Oct 10, 2018 in commit
07acc992dc.

isTRUNCStore seems to be unused for at least 10 years.
2021-07-19 06:56:04 -07:00
Roman Lebedev 5b51bd1878
[TLI] prepareSREMEqFold(): use correct VT for the final VSELECT (PR51133)
We were using the wrong VT for this final VSELECT,
it should be in the final comparison VT,
not the source value's VT.

Fixes https://bugs.llvm.org/show_bug.cgi?id=51133
2021-07-19 16:44:00 +03:00
Arjun P eacbd7d25a [MLIR] AffineStructures: resolve clang-tidy warnings [NFC] 2021-07-19 18:46:01 +05:30
Elton 195786d7c2
Fix duplicate checks in clangd comments
This patch removes a duplicate checks in the top-level comments in `clang-tools-extra/clangd/ParsedAST.h`

Reviewed By: kadircet

Differential Revision: https://reviews.llvm.org/D106227
2021-07-19 15:14:55 +02:00
Jay Foad 96d8f2a1e0 [AMDGPU] Fix typo in comments idexen -> idxen 2021-07-19 13:39:30 +01:00
Simon Tatham cef56d58db [clang] Change set type used for SourceLocation.
This is part of a patch series working towards the ability to make
SourceLocation into a 64-bit type to handle larger translation units.

If clang is built for a 32-bit platform and SourceLocation is 64 bits
wide, then a SourceLocation will be larger than a pointer, so it won't
be possible to keep them in a SmallPtrSet any more. Switch to
SmallDenseSet instead.

Patch originally by Mikhail Maltsev.

Differential Revision: https://reviews.llvm.org/D105493
2021-07-19 13:36:36 +01:00
Alexander Belyaev 58ddeba3e0 Revert "[mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`."
This reverts commit 3b03d9b874.
2021-07-19 14:19:49 +02:00
Ian Campbell f6ba03584b [clang-tidy] ensure run-clang-tidy reports children killed by signals
If a clang-tidy child process exits with a signal then run-clang-tidy will exit
with an error but there is no hint why in the output, since the clang-tidy
doesn't log anything and may not even have had the opportunity to do so
depending on the signal used.

`subprocess.CompletedProcess.returncode` is the negative signal number in this
case.

I hit this in a CI system where the parallelism used exceeded the RAM assigned
to the container causing the OOM killer to SIGKILL clang-tidy processes.

Reviewed By: sylvestre.ledru

Differential Revision: https://reviews.llvm.org/D99081
2021-07-19 14:18:26 +02:00
Alexander Belyaev f58a1f65e7 [rt][nfc] Rewrite #ifndef as #if defined(). 2021-07-19 14:17:13 +02:00
Alexander Belyaev 3b03d9b874 [mlir] Introduce `linalg.tiled_yield` terminator for `linalg.tiled_loop`.
https://llvm.discourse.group/t/rfc-changes-to-linalg-tiledloopop-to-unblock-reductions/3890

Differential Revision: https://reviews.llvm.org/D106066
2021-07-19 14:16:03 +02:00
Lang Hames aa69f0d8fb [ORC-RT] Introduce a weak-import macro.
This should eliminate warnings about ignored weak_import attributes on some of
the bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770/.
2021-07-19 22:10:51 +10:00
Lang Hames 11c11006d7 [ORC-RT] Separate jit-dispach tag decls from definitions.
This should eliminate the "initialized and declared 'extern'" warnings produced
on some bots, e.g. https://lab.llvm.org/buildbot/#/builders/165/builds/3770
2021-07-19 22:10:51 +10:00
Simon Pilgrim 5939c642ae [CostModel][X86] Add fast math tests for float reductions
As noticed on D105432 we didn't have any coverage to distinguish between fast/exact float reductions
2021-07-19 13:01:28 +01:00
Alexey Bataev d8d8b4574a [SLP]Fix possible crash on unreachable incoming values sorting.
The incoming values for PHI nodes may come from unreachable BasicBlocks,
need to handle this case.

Differential Revision: https://reviews.llvm.org/D106264
2021-07-19 04:54:53 -07:00
Mindong Chen e908e063d1 [LoopUtils] Fix incorrect RT check bounds of loop-invariant mem accesses
This fixes the lower and upper bound calculation of a
RuntimeCheckingPtrGroup when it has more than one loop
invariant pointers. Resolves PR50686.

Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D104148
2021-07-19 19:38:24 +08:00
Mindong Chen f3814ed3e9 [LV] Re-generate check lines of some fragile tests (NFC)
Reviewed By: fhahn

Differential Revision: https://reviews.llvm.org/D105438
2021-07-19 19:38:24 +08:00
Stephan Herhut eda46404cd [mlir][memref] Clarify the documentation for memref.clone [NFC]
The wording was wrong and suggested that operands to memref.clone may not be mutated.

Differential Revision: https://reviews.llvm.org/D106258
2021-07-19 13:30:02 +02:00
Florian Hahn 156b431c66
[LV] Add test with ptr induction used as scalar and vector.
Test case inspired by D105199.
2021-07-19 13:15:17 +02:00
Florian Mayer 807d50100c Revert "[hwasan] Use stack safety analysis."
This reverts commit 12268fe14a.
2021-07-19 12:08:32 +01:00
Dmitry Vyukov baa7f58973 tsan: make obtaining current PC faster
We obtain the current PC is all interceptors and collectively
common interceptor code contributes to overall slowdown
(in particular cheaper str/mem* functions).

The current way to obtain the current PC involves:

  4493e1:       e8 3a f3 fe ff          callq  438720 <_ZN11__sanitizer10StackTrace12GetCurrentPcEv>
  4493e9:       48 89 c6                mov    %rax,%rsi

and the called function is:

uptr StackTrace::GetCurrentPc() {
  438720:       48 8b 04 24             mov    (%rsp),%rax
  438724:       c3                      retq

The new way uses address of a local label and involves just:

  44a888:       48 8d 35 fa ff ff ff    lea    -0x6(%rip),%rsi

I am not switching all uses of StackTrace::GetCurrentPc to GET_CURRENT_PC
because it may lead some differences in produced reports and break tests.
The difference comes from the fact that currently we have PC pointing
to the CALL instruction, but the new way does not yield any code on its own
so the PC points to a random instruction in the function and symbolizing
that instruction can produce additional inlined frames (if the random
instruction happen to relate to some inlined function).

Reviewed By: vitalybuka, melver

Differential Revision: https://reviews.llvm.org/D106046
2021-07-19 13:05:30 +02:00
Lang Hames 94e0975450 [ORC] Drop 'const' for __orc_rt_CWrapperFunctionResultDataUnion::ValuePtr.
This member is now only used when storage is heap-allocated so it does not
need to be const. Dropping 'const' eliminates cast warnings on many builders.
2021-07-19 21:03:12 +10:00
Lang Hames ad4f04773c [ORC-RT] Fix missing std::move.
This should fix the 'could-not-covert' error at wrapper_function_utils.h:128 in
https://lab.llvm.org/buildbot/#/builders/112/builds/7748.
2021-07-19 21:03:12 +10:00
Kazushi (Jam) Marukawa 4ee28b4fec [VE] Set getExtendForAtomicOps to ISD::ANY_EXTEND
The implementation of subword atomics does not actually
guarantee the result is zero-extended, which now caused
failures after https://reviews.llvm.org/D101342 was landed.

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D106225
2021-07-19 19:58:44 +09:00