f9ce7b60ef
remove unneeded FIXME comment
...
llvm-svn: 145679
2011-12-02 04:58:17 +00:00
4201820275
make sure ScheduleDAGInstrs::EmitSchedule does not crash when the first instruction in Sequence is a Noop
...
llvm-svn: 145677
2011-12-02 04:58:07 +00:00
58ca360081
update PPC 940 hazard rec. to function in postRA mode
...
llvm-svn: 145676
2011-12-02 04:58:02 +00:00
43a33066b4
Fix a few more places where TargetData/TargetLibraryInfo is not being passed.
...
Add FIXMEs to places that are non-trivial to fix.
llvm-svn: 145661
2011-12-02 01:26:24 +00:00
04945c42c6
ARM start parsing VLD1 single lane instructions.
...
The alias pseudos need cleaned up for size suffix handling, but this gets
the basics working. Will be cleaning up and adding more.
llvm-svn: 145655
2011-12-02 00:35:16 +00:00
576c0f8e54
Abuse of mass replace isn't warranted even when the build is failing. Thanks
...
for the suggestion, Eric.
llvm-svn: 145643
2011-12-01 23:16:03 +00:00
54a506dcb1
Fix build by not assuming TLI is guaranteed. Will have to track down cases where
...
TLI isn't being passed to ensure we don't miss opportunities to fold calls.
llvm-svn: 145641
2011-12-01 22:38:31 +00:00
3367123b12
Prevent library calls from being folded if -fno-builtin has been specified.
...
rdar://10500969
llvm-svn: 145639
2011-12-01 22:14:50 +00:00
c19f0b7357
CodeGen: fix CMake build
...
Missing file from r145629.
llvm-svn: 145634
2011-12-01 21:49:23 +00:00
19a58df9bb
ExecutionEngine: honor optimization level
...
It was getting ignored after r144788.
Also fix an accidental implicit cast from the OptLevel enum
to an optional bool argument. MSVC warned on this, but gcc
didn't.
llvm-svn: 145633
2011-12-01 21:49:21 +00:00
e6de63dfc5
Last bit of TargetLibraryInfo propagation. Also fixed a case for TargetData
...
where it appeared beneficial to pass.
More of rdar://10500969
llvm-svn: 145630
2011-12-01 21:29:16 +00:00
08ebdc1e71
Add a deterministic finite automaton based packetizer for VLIW architectures
...
llvm-svn: 145629
2011-12-01 21:10:21 +00:00
54c9462c77
Fix unreachable return & simplify some branches.
...
llvm-svn: 145627
2011-12-01 20:58:30 +00:00
f60485c4cf
Dummy commit to check commit access.
...
llvm-svn: 145619
2011-12-01 19:15:08 +00:00
fdddc27143
Improved fix for abs(val) != 0 to check other similar case. Also fixed style issues and confusing comment
...
llvm-svn: 145618
2011-12-01 19:13:26 +00:00
d594bac68b
[asan] two minor fixes: use UnreachableInst after the neverreturn function call; use report_fatal_error when blacklist file can not be found
...
llvm-svn: 145611
2011-12-01 18:54:53 +00:00
676c093758
Add missing functions.
...
llvm-svn: 145608
2011-12-01 18:26:19 +00:00
3ced545ccf
Autodetect bulldozers.
...
llvm-svn: 145607
2011-12-01 18:24:17 +00:00
10fe1fe39e
Add a few more functions to TargetLibraryInfo. More of rdar://10500969.
...
llvm-svn: 145596
2011-12-01 17:54:37 +00:00
9da7f305a4
For 64-bit the rest of the general regs are ok for the q constraint. Make
...
sure we can emit both the high and low versions of those registers.
Fixes rdar://10392864
llvm-svn: 145579
2011-12-01 08:12:41 +00:00
3a15e14520
Add some missing anchors.
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llvm-svn: 145578
2011-12-01 08:00:17 +00:00
d61887dd0a
Pass AVX vectors which are arguments to varargs functions on the stack. <rdar://problem/10463281>.
...
llvm-svn: 145573
2011-12-01 04:49:21 +00:00
bc5c524b71
Added instcombine pattern to spot comparing -val or val against 0.
...
(val != 0) == (-val != 0) so "abs(val) != 0" becomes "val != 0"
Fixes <rdar://problem/10482509>
llvm-svn: 145563
2011-12-01 03:58:40 +00:00
c24b86ffbe
Propagate TargetLibraryInfo throughout ConstantFolding.cpp and
...
InstructionSimplify.cpp. Other fixups as needed.
Part of rdar://10500969
llvm-svn: 145559
2011-12-01 03:08:23 +00:00
e659b8459e
Make use of "getScalarType()". No functionality change.
...
llvm-svn: 145556
2011-12-01 02:39:36 +00:00
c1870b2633
Small fix for assembler generation on Darwin PPC64. Patch by Michael Kostylev. PR11437.
...
llvm-svn: 145553
2011-12-01 01:43:47 +00:00
dc436f95d2
make asan work at -O0, llvm part. Patch by glider@google.com
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llvm-svn: 145530
2011-11-30 22:19:26 +00:00
9430e284a9
Support for encoding all FMA4 instructions and tablegen patterns for all
...
remaining FMA4 instructions and intrinsics with tests.
llvm-svn: 145525
2011-11-30 22:09:42 +00:00
6cff9df298
Make GlobalMerge honor the preferred alignment on globals without an explicitly specified alignment.
...
<rdar://problem/10497732>.
llvm-svn: 145523
2011-11-30 21:54:15 +00:00
23c30b90e3
Remove unused variable
...
llvm-svn: 145517
2011-11-30 19:53:11 +00:00
a68c9a847e
ARM parsing for VLD1 all lanes, with writeback.
...
llvm-svn: 145510
2011-11-30 19:35:44 +00:00
738da252ab
Add a few functions to TargetLibraryInfo.
...
llvm-svn: 145508
2011-11-30 19:19:00 +00:00
3ecf976ca9
ARM parsing for VLD1 two register all lanes, no writeback.
...
llvm-svn: 145504
2011-11-30 18:21:25 +00:00
5feb3dab79
X86: Turns out bulldozer also supports sse42 and lzcnt.
...
While at it remove the barcelona/instanbul/shanghai subtargets, they're
unsupported by GCC and look pretty broken.
llvm-svn: 145494
2011-11-30 15:48:16 +00:00
981f32327d
X86: Add subtargets for AMD's bulldozer.
...
llvm-svn: 145493
2011-11-30 15:27:46 +00:00
96923cc2bb
X86: PerformOrCombine introduced a vselect node with a wrong order of operands. This bug was introduced when a dedicated blend sdnode was replaced with the vselect node (in 139479).
...
llvm-svn: 145488
2011-11-30 10:13:37 +00:00
c4977ba413
Add instruction selection support for AVX2 horizontal add/sub instructions.
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llvm-svn: 145487
2011-11-30 09:10:50 +00:00
0a672eaf9e
Merge VPERM2F128/VPERM2I128 ISD node types.
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llvm-svn: 145485
2011-11-30 07:47:51 +00:00
bafd224c8b
Merge decoding of VPERMILPD and VPERMILPS shuffle masks. Merge X86ISD node type for VPERMILPD/PS. Add instruction selection support for VINSERTI128/VEXTRACTI128.
...
llvm-svn: 145483
2011-11-30 06:25:25 +00:00
ceafa2c746
LSR: handle the expansion of phi operands that use postinc forms of the IV.
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Fixes PR11431: SCEVExpander::expandAddRecExprLiterally(const llvm::SCEVAddRecExpr*): Assertion `(!isa<Instruction>(Result) || SE.DT->dominates(cast<Instruction>(Result), Builder.GetInsertPoint())) && "postinc expansion does not dominate use"' failed.
llvm-svn: 145482
2011-11-30 06:07:54 +00:00
385d9f6c24
Whitespace.
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llvm-svn: 145470
2011-11-30 01:59:59 +00:00
abba0947db
Alphabetize TargetLibraryInfo enum and fix doxygen comments. No functional
...
change intended.
llvm-svn: 145468
2011-11-30 01:51:49 +00:00
cd6f5e757c
ARM parsing aliases for VLD1 single register all lanes.
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llvm-svn: 145464
2011-11-30 01:09:44 +00:00
82e1bd8e94
Add support for sqrt, sqrtl, and sqrtf in TargetLibraryInfo. Disable
...
(fptrunc (sqrt (fpext x))) -> (sqrtf x) transformation if -fno-builtin is
specified.
rdar://10466410
llvm-svn: 145460
2011-11-29 23:57:10 +00:00
182b6a077e
Tidy up a bit.
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llvm-svn: 145458
2011-11-29 23:51:09 +00:00
ae672f8118
Add comment.
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llvm-svn: 145456
2011-11-29 23:33:40 +00:00
e1154eef0b
ARM parsing aliases for data-size suffices on VST1.
...
llvm-svn: 145454
2011-11-29 23:21:31 +00:00
dc25f9f38a
Change names for MIPS "generic" processors defined in Mips.td to match what GNU
...
tools use. Patch by Simon Atanasyan.
"mips32r1" => "mips32"
"4ke" => mips32r2"
"mips64r1" => "mips64"
llvm-svn: 145451
2011-11-29 23:08:41 +00:00
5ee209ce3a
ARM assembly parsing and encoding for four-register VST1.
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llvm-svn: 145450
2011-11-29 22:58:48 +00:00
648e48d02e
Add another missing pattern. llvm-gcc likes f64 but clang likes i64 so it was generating poor code for some SSE builtins.
...
llvm-svn: 145448
2011-11-29 22:48:34 +00:00
98d032fd67
ARM assembly parsing and encoding for three-register VST1.
...
llvm-svn: 145442
2011-11-29 22:38:04 +00:00
bde32d36bb
Make X86::FsFLD0SS / FsFLD0SD real pseudo-instructions.
...
Like V_SET0, these instructions are expanded by ExpandPostRA to xorps /
vxorps so they can participate in execution domain swizzling.
This also makes the AVX variants redundant.
llvm-svn: 145440
2011-11-29 22:27:25 +00:00
31798ef3c0
Potential bug in RewriteLoopBodyWithConditionConstant: use iterator should not be changed inside the uses enumeration loop.
...
llvm-svn: 145432
2011-11-29 20:34:39 +00:00
46addb9e07
If fast-isel fails, remove dead instructions generated during the failed
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attempt.
llvm-svn: 145425
2011-11-29 19:40:47 +00:00
312b97c267
comment.
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llvm-svn: 145422
2011-11-29 19:33:49 +00:00
539d0a8a09
build/CMake: Finish removal of add_llvm_library_dependencies.
...
llvm-svn: 145420
2011-11-29 19:25:30 +00:00
ca6f8ddbf8
Fix a theoretical problem (not seen in the wild): if different instances of a
...
weak variable are compiled by different compilers, such as GCC and LLVM, while
LLVM may increase the alignment to the preferred alignment there is no reason to
think that GCC will use anything more than the ABI alignment. Since it is the
GCC version that might end up in the final program (as the linkage is weak), it
is wrong to increase the alignment of loads from the global up to the preferred
alignment as the alignment might only be the ABI alignment.
Increasing alignment up to the ABI alignment might be OK, but I'm not totally
convinced that it is. It seems better to just leave the alignment of weak
globals alone.
llvm-svn: 145413
2011-11-29 18:26:38 +00:00
de3a2118db
MC/X86/COFF: Allow quotes in names when targeting MS/Windows,
...
as MC is the only assembler we support.
This splits MS/Windows and GNU/Windows ASM infos into two seperate classes.
While there is currently only one difference, full MS C++ ABI support will
require many more.
llvm-svn: 145409
2011-11-29 18:00:06 +00:00
cbe72fc959
Fixed ObjectFile functions:
...
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.
llvm-svn: 145408
2011-11-29 17:40:10 +00:00
7a81dea516
Fixed vsqrt.ss intrinsic usage - order of input operands was wrong.
...
Added a test.
Thanks Bruno for reviewing the patch.
llvm-svn: 145403
2011-11-29 15:00:45 +00:00
1d63ae3731
Fix shuffle decoding for memory forms for (V)SHUFPS/D.
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llvm-svn: 145392
2011-11-29 07:58:09 +00:00
c16db840be
Fix issues in shuffle decoding around VPERM* instructions. Fix shuffle decoding for VSHUFPS/D for 256-bit types. Add pattern matching for memory forms of VPERMILPS/VPERMILPD.
...
llvm-svn: 145390
2011-11-29 07:49:05 +00:00
64404a3b2c
[Win32] Catch exceptions (eg. segfault) on waiting for invoked clang from the driver.
...
clang/lib/Driver/Driver.cpp: Don't pass through negative exit status, or parent would be confused.
llvm::sys::Program::Wait(): Suppose 0x8000XXXX and 0xC000XXXX as abnormal exit code and pass it as negative value.
Win32 Exception Handler: Exit with ExceptionCode on an unhandle exception.
llvm-svn: 145389
2011-11-29 07:47:04 +00:00
12b72def4e
Fix VINSERTF128/VEXTRACTF128 to be marked as FP instructions. Allow execution dependency fix pass to convert them to their integer equivalents when AVX2 is enabled.
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llvm-svn: 145376
2011-11-29 05:37:58 +00:00
897a7d4b9c
Correctly mark VPERM2F128 as being an FP instruction and add execution domain fixing support to convert it to VPERM2I128 for AVX2.
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llvm-svn: 145370
2011-11-29 03:57:34 +00:00
11b9894234
MachO doesn't support the protected visibility. Don't default to 'global' here. <rdar://problem/10396775>
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llvm-svn: 145368
2011-11-29 02:39:58 +00:00
d25089f8e0
SCEV fix. In general, Add/Mul expressions should not inherit NSW/NUW.
...
This reverts r139450, fixes r139453, and adds much needed comments and a
unit test.
llvm-svn: 145367
2011-11-29 02:16:38 +00:00
d912a5b2e3
Make SCEV print <nsw><nuw> for Add/MulExpr.
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llvm-svn: 145364
2011-11-29 02:06:35 +00:00
e4cc332729
On MachO, the pointer to the personality function should always be in the
...
non_lazy_symbol_pointers section (__IMPORT,__pointers). Ignore the 'hidden' part
since that will place it in the wrong section.
<rdar://problem/10443720>
llvm-svn: 145356
2011-11-29 01:43:20 +00:00
7534b46884
Zap some completely ridiculous code. There's probably a miscompile here, but I don't really want to try to write a testcase involving an invoke returning a pointer to a varargs function...
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llvm-svn: 145347
2011-11-29 01:18:23 +00:00
ae9132207f
Better fix for ARM MOVT relocation encoding of thumb bit.
...
Replaces r145318 with a more targetted fix for the relocation handling.
llvm-svn: 145346
2011-11-29 01:15:25 +00:00
fe2d028ab1
build: Update CMakeLists.txt.
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llvm-svn: 145341
2011-11-29 00:33:14 +00:00
b074d102a3
edis: Sink EDMain.cpp into lib/MC/MCDisassembler.
...
- This fixes some layering violations and matches how we handle the llvm-c lib,
for example.
llvm-svn: 145338
2011-11-29 00:25:57 +00:00
30168fbde5
Thumb2 only force the fixup thumb bit for data relocations.
...
rdar://10493453
llvm-svn: 145318
2011-11-28 23:39:00 +00:00
b3f9b0676a
Add a missing safety check to ProcessUGT_ADDCST_ADD. Fixes PR11438.
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llvm-svn: 145316
2011-11-28 23:32:19 +00:00
faa8efb482
Remove obsolete FIXME.
...
llvm-svn: 145313
2011-11-28 23:23:58 +00:00
e7ab1a2f0f
Make SelectionDAG::InferPtrAlignment use llvm::ComputeMaskedBits instead of duplicating the logic for globals. Make llvm::ComputeMaskedBits handle GlobalVariables slightly more aggressively, to match what InferPtrAlignment knew how to do.
...
llvm-svn: 145304
2011-11-28 22:48:22 +00:00
4a5b2040e2
Revert r145273 and fix in SelectionDAG::InferPtrAlignment() instead.
...
Conservatively returns zero when the GV does not specify an alignment nor is it
initialized. Previously it returns ABI alignment for type of the GV. However, if
the type is a "packed" type, then the under-specified alignments is attached to
the load / store instructions. In that case, the alignment of the type cannot be
trusted.
rdar://10464621
llvm-svn: 145300
2011-11-28 22:37:34 +00:00
9339d4556e
Fix some possible gcc-4.2 may be used uninitialized warnings.
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llvm-svn: 145292
2011-11-28 22:19:32 +00:00
76c6299f88
Don't define these unless we plan to use them.
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llvm-svn: 145289
2011-11-28 22:14:02 +00:00
a4b6404cf0
DAG combine should not increase alignment of loads / stores with alignment less
...
than ABI alignment. These are loads / stores from / to "packed" data structures.
Their alignments are intentionally under-specified.
rdar://10301431
llvm-svn: 145273
2011-11-28 20:42:56 +00:00
aa93ceb164
Add missing avx pattern.
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llvm-svn: 145272
2011-11-28 20:27:23 +00:00
61e8d1026f
80-column.
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llvm-svn: 145267
2011-11-28 19:59:09 +00:00
5ebc95ff4c
Remove dead llvm.eh.sjlj.dispatchsetup intrinsic.
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llvm-svn: 145263
2011-11-28 19:23:13 +00:00
a8bdb7cbf1
Remove the temporary flag -disable-unroll-scev and dead code.
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SCEV should now be used for trip count analysis, not LoopInfo.
llvm-svn: 145262
2011-11-28 19:22:09 +00:00
31f0116173
Add back a line I deleted by accident in r145141. Fixes uninitialized variable warnings and runtime failures.
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llvm-svn: 145256
2011-11-28 18:50:37 +00:00
12330650f8
Silence wrong warnings from GCC about variables possibly being used
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uninitialized: GCC doesn't understand that the variables are only used
if !UseImm, in which case they have been initialized.
llvm-svn: 145239
2011-11-28 10:31:27 +00:00
818a983e93
Add X86 instruction selection for VPERM2I128 when AVX2 is enabled. Merge VPERMILPS/VPERMILPD detection since they are pretty similar.
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llvm-svn: 145238
2011-11-28 10:14:51 +00:00
b0456936da
Make isCommutedVSHUFP more like the way isCommutedSHUFP is handled.
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llvm-svn: 145218
2011-11-28 01:14:24 +00:00
efddf20126
rename ENABLE_THREADS to LLVM_ENABLE_THREADS
...
Now that it needs to be exported in a public header (Valgrind.h)
it should be prefixed to avoid collision with other projects.
Add it to llvm-config.h as well.
This'll require regenerating the configure script after this
commit, but I don't have the required autoconf version.
llvm-svn: 145214
2011-11-28 00:48:58 +00:00
6404d97a99
Place the "cfg checksum" around a test. This was recently added in April 2011 to
...
gcc, though I thought it was older (my gcc 4.4 has it as a local patch. Whoops!)
This fixes PR10589.
Also add some debugging statements.
Remove GcnoFiles, the mapping from CompilationUnit to raw_ostream. Now that we
start by iterating over each CU and descending into them, there's no need to
maintain a mapping.
llvm-svn: 145208
2011-11-27 23:22:20 +00:00
79ee88a511
Merge detecting and handling for VSHUFPSY and VSHUFPDY since a lot of the code was similar for both.
...
llvm-svn: 145199
2011-11-27 21:41:12 +00:00
4f56720754
Prevent rotating the blocks of a loop (and thus getting a backedge to be
...
fallthrough) in cases where we might fail to rotate an exit to an outer
loop onto the end of the loop chain.
Having *some* rotation, but not performing this rotation, is the primary
fix of thep performance regression with -enable-block-placement for
Olden/em3d (a whopping 30% regression). Still working on reducing the
test case that actually exercises this and the new rotation strategy out
of this code, but I want to check if this regresses other test cases
first as that may indicate it isn't the correct fix.
llvm-svn: 145195
2011-11-27 20:18:00 +00:00
03adbd46ca
Take two on rotating the block ordering of loops. My previous attempt
...
was centered around the premise of laying out a loop in a chain, and
then rotating that chain. This is good for preserving contiguous layout,
but bad for actually making sane rotations. In order to keep it safe,
I had to essentially make it impossible to rotate deeply nested loops.
The information needed to correctly reason about a deeply nested loop is
actually available -- *before* we layout the loop. We know the inner
loops are already fused into chains, etc. We lose information the moment
we actually lay out the loop.
The solution was the other alternative for this algorithm I discussed
with Benjamin and some others: rather than rotating the loop
after-the-fact, try to pick a profitable starting block for the loop's
layout, and then use our existing layout logic. I was worried about the
complexity of this "pick" step, but it turns out such complexity is
needed to handle all the important cases I keep teasing out of benchmarks.
This is, I'm afraid, a bit of a work-in-progress. It is still
misbehaving on some likely important cases I'm investigating in Olden.
It also isn't really tested. I'm going to try to craft some interesting
nested-loop test cases, but it's likely to be extremely time consuming
and I don't want to go there until I'm sure I'm testing the correct
behavior. Sadly I can't come up with a way of getting simple, fine
grained test cases for this logic. We need complex loop structures to
even trigger much of it.
llvm-svn: 145183
2011-11-27 13:34:33 +00:00
37ab257b88
Revert r145180 as it is causing test failures on all the bots.
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Original commit message:
Fixed ObjectFile functions:
- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.
llvm-svn: 145182
2011-11-27 10:37:47 +00:00
9e46684154
Fix an impressive type-o / spell-o Duncan noticed.
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llvm-svn: 145181
2011-11-27 10:32:16 +00:00
2631f93f7d
Fixed ObjectFile functions:
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- getSymbolOffset() renamed as getSymbolFileOffset()
- getSymbolFileOffset(), getSymbolAddress(), getRelocationAddress() returns same result for ELFObjectFile, MachOObjectFile and COFFObjectFile.
- added getRelocationOffset()
- fixed MachOObjectFile::getSymbolSize()
- fixed MachOObjectFile::getSymbolSection()
- fixed MachOObjectFile::getSymbolOffset() for symbols without section data.
llvm-svn: 145180
2011-11-27 10:12:52 +00:00
a054580993
Rework a bit of the implementation of loop block rotation to not rely so
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heavily on AnalyzeBranch. That routine doesn't behave as we want given
that rotation occurs mid-way through re-ordering the function. Instead
merely check that there are not unanalyzable branching constructs
present, and then reason about the CFG via successor lists. This
actually simplifies my mental model for all of this as well.
The concrete result is that we now will rotate more loop chains. I've
added a test case from Olden highlighting the effect. There is still
a bit more to do here though in order to regain all of the performance
in Olden.
llvm-svn: 145179
2011-11-27 09:22:53 +00:00
0bcbde46e2
Eli managed to kill off llvm.membarrier in llvm 3.0 also, this means
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that mainline needs no autoupgrade logic for intrinsics yet, woohoo!
llvm-svn: 145178
2011-11-27 08:42:07 +00:00
410f3d7f5d
The llvm.atomic intrinsics *were* removed in LLVM 3.0 (in r141333), remove the
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autoupgrade logic for 2.9 and before.
llvm-svn: 145176
2011-11-27 08:18:55 +00:00
Hal Finkel