Commit Graph

139 Commits

Author SHA1 Message Date
Alexander Kornienko 2a8c18d991 Fix typos in clang
Found via codespell -q 3 -I ../clang-whitelist.txt
Where whitelist consists of:

  archtype
  cas
  classs
  checkk
  compres
  definit
  frome
  iff
  inteval
  ith
  lod
  methode
  nd
  optin
  ot
  pres
  statics
  te
  thru

Patch by luzpaz! (This is a subset of D44188 that applies cleanly with a few
files that have dubious fixes reverted.)

Differential revision: https://reviews.llvm.org/D44188

llvm-svn: 329399
2018-04-06 15:14:32 +00:00
Manoj Gupta 4b3eefa5e8 Disable -fmerge-all-constants as default.
Summary:
"-fmerge-all-constants" is a non-conforming optimization and should not
be the default. It is also causing miscompiles when building Linux
Kernel (https://lkml.org/lkml/2018/3/20/872).

Fixes PR18538.

Reviewers: rjmccall, rsmith, chandlerc

Reviewed By: rsmith, chandlerc

Subscribers: srhines, cfe-commits

Differential Revision: https://reviews.llvm.org/D45289

llvm-svn: 329300
2018-04-05 15:29:52 +00:00
Artem Belevich ecb178bb35 [CUDA] Disable LTO for device-side compilations.
This fixes host-side LTO during CUDA compilation. Before, LTO
pipeline construction was clashing with CUDA pipeline construction.

At the moment there's no point doing LTO on device side as each
device-side TU is a complete program.  We will need to figure out
compilation pipeline construction for the device-side LTO when we
have working support for multi-TU device-side CUDA compilation.

Differential Revision: https://reviews.llvm.org/D44691

llvm-svn: 328161
2018-03-21 22:22:59 +00:00
Akira Hatanaka 9f9d766037 [Driver] Pass Default=false to hasFlag.
I forgot to do this in r326530.

llvm-svn: 327204
2018-03-10 05:55:21 +00:00
Akira Hatanaka 627586b850 Add an option to disable tail-call optimization for escaping blocks.
This makes it easier to debug crashes and hangs in block functions since
users can easily find out where the block is called from. The option
doesn't disable tail-calls from non-escaping blocks since non-escaping
blocks are not as hard to debug as escaping blocks.

rdar://problem/35758207

Differential Revision: https://reviews.llvm.org/D43841

llvm-svn: 326530
2018-03-02 01:53:15 +00:00
Chih-Hung Hsieh ca552b8d31 [Driver] Pass -f[no-]emulated-tls and set up ExplicitEmulatedTLS
Since LLVM r326341, default EmulatedTLS mode is decided in backend
according to target triple. Any front-end should pass -f[no]-emulated-tls
to backend and set up ExplicitEmulatedTLS only when the flags are used.

Differential Revision: https://reviews.llvm.org/D43965

llvm-svn: 326499
2018-03-01 22:26:19 +00:00
Carlo Bertolli 79712097c7 [OpenMP] Extend NVPTX SPMD implementation of combined constructs
Differential Revision: https://reviews.llvm.org/D43852

This patch extends the SPMD implementation to all target constructs and guards this implementation under a new flag.

llvm-svn: 326368
2018-02-28 20:48:35 +00:00
Jonas Hahnfeld e768132f94 [CUDA] Include single GPU binary, NFCI.
Binaries for multiple architectures are combined by fatbinary,
so the current code was effectively not needed.

Differential Revision: https://reviews.llvm.org/D43461

llvm-svn: 326342
2018-02-28 17:53:46 +00:00
Reid Kleckner 54af3e7e14 Re-land "Emit proper CodeView when -gcodeview is passed without the cl driver."
Reverts r326116 and re-lands r326113 with a fix to ASan so that it
enables column info in its test suite.

llvm-svn: 326141
2018-02-26 22:55:33 +00:00
Zachary Turner 13e3520d49 Revert "Emit proper CodeView when -gcodeview is passed without the cl driver."
This reverts commit e17911006548518634fad66bb8648bcad49a1d64.

This is failing on ASAN bots because asan expects column info,
and it's also failing on some linux bots for unknown reasons which
i need to investigate.

llvm-svn: 326116
2018-02-26 19:51:29 +00:00
Zachary Turner 9eee7bb7e5 Emit proper CodeView when -gcodeview is passed without the cl driver.
Windows debuggers don't work properly when column info is emitted
with lines.  We handled this by checking if the driver mode was
cl, but it's possible to cause the gcc driver to emit codeview as
well, and in that path we were emitting column info with codeview.

Differential Revision: https://reviews.llvm.org/D43700

llvm-svn: 326113
2018-02-26 19:25:39 +00:00
Scott Linder a2fbcef8ee [DebugInfo] Support DWARF v5 source code embedding extension
In DWARF v5 the Line Number Program Header is extensible, allowing values with
new content types. This vendor extension to DWARF v5 allows source text to be
embedded directly in the line tables of the debug line section.

Add new flag (-g[no-]embed-source) to Driver and CC1 which indicates
that source should be passed through to LLVM during CodeGen.

Differential Revision: https://reviews.llvm.org/D42766

llvm-svn: 326102
2018-02-26 17:32:31 +00:00
Mandeep Singh Grang ac24bb53bb [RISCV] Enable __int128_t and __uint128_t through clang flag
Summary:
If the flag -fforce-enable-int128 is passed, it will enable support for __int128_t and __uint128_t types.
This flag can then be used to build compiler-rt for RISCV32.

Reviewers: asb, kito-cheng, apazos, efriedma

Reviewed By: asb, efriedma

Subscribers: shiva0217, efriedma, jfb, dschuff, sdardis, sbc100, jgravelle-google, aheejin, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, cfe-commits

Differential Revision: https://reviews.llvm.org/D43105

llvm-svn: 326045
2018-02-25 03:58:23 +00:00
Petr Hosek bf45ecef66 [Driver] Make -fno-common default for Fuchsia
We never want to generate common symbols on Fuchsia.

Differential Revision: https://reviews.llvm.org/D43545

llvm-svn: 325945
2018-02-23 20:10:14 +00:00
Hans Wennborg d43f40df1c Support for the mno-stack-arg-probe flag
Adds support for this flag. There is also another piece for llvm
(separate review). More info:
https://bugs.llvm.org/show_bug.cgi?id=36221

By Ruslan Nikolaev!

Differential Revision: https://reviews.llvm.org/D43108

llvm-svn: 325901
2018-02-23 13:47:36 +00:00
Alexey Sotkin 20f65928e1 [OpenCL] Add '-cl-uniform-work-group-size' compile option
Summary:
OpenCL 2.0 specification defines '-cl-uniform-work-group-size' option,
which requires that the global work-size be a multiple of the work-group
size specified to clEnqueueNDRangeKernel and allows optimizations that
are made possible by this restriction.

The patch introduces the support of this option.

To keep information about whether an OpenCL kernel has uniform work
group size or not, clang generates 'uniform-work-group-size' function
attribute for every kernel:
- "uniform-work-group-size"="true" for OpenCL 1.2 and lower,
- "uniform-work-group-size"="true" for OpenCL 2.0 and higher if
 '-cl-uniform-work-group-size' option was specified,
- "uniform-work-group-size"="false" for OpenCL 2.0 and higher if no
 '-cl-uniform-work-group-size' options was specified.

If the function is not an OpenCL kernel, 'uniform-work-group-size'
attribute isn't generated.

Patch by: krisb

Reviewers: yaxunl, Anastasia, b-sumner

Reviewed By: yaxunl, Anastasia

Subscribers: nhaehnle, yaxunl, Anastasia, cfe-commits

Differential Revision: https://reviews.llvm.org/D43570

llvm-svn: 325771
2018-02-22 11:54:14 +00:00
Eric Fiselier a06ca4bd90 Clean up -fdiscard-value-name handling
llvm-svn: 325171
2018-02-14 20:56:52 +00:00
Jonas Hahnfeld 5379c6d6fd [CUDA] Add option to generate relocatable device code
As a first step, pass '-c/--compile-only' to ptxas so that it
doesn't complain about references to external function. This
will successfully generate object files, but they won't work
at runtime because the registration routines need to adapted.

Differential Revision: https://reviews.llvm.org/D42921

llvm-svn: 324878
2018-02-12 10:46:45 +00:00
Adrian Prantl 70599030f8 Introduce an API for LLDB to compute the default module cache path
LLDB creates Clang modules and had an incomplete copy of the clang
Driver code that compute the -fmodule-cache-path. This patch makes the
clang driver code accessible to LLDB.

Differential Revision: https://reviews.llvm.org/D43128

llvm-svn: 324761
2018-02-09 18:43:10 +00:00
Eric Fiselier cca7dddcd3 Fix r324498: the commit removed the '-' before the disable-llvm-verifier flag
llvm-svn: 324501
2018-02-07 19:17:03 +00:00
Eric Fiselier 123c749ee9 [Driver] Add option to manually control discarding value names in LLVM IR.
Summary:
Currently, assertion-disabled Clang builds emit value names when generating LLVM IR. This is controlled by the `NDEBUG` macro, and is not easily overridable. In order to get IR output containing names from a release build of Clang, the user must manually construct the CC1 invocation w/o the `-discard-value-names` option. This is less than ideal.

For example, Godbolt uses a release build of Clang, and so when asked to emit LLVM IR the result lacks names, making it harder to read. Manually invoking CC1 on Compiler Explorer is not feasible.

This patch adds the driver options `-fdiscard-value-names` and `-fno-discard-value-names` which allow the user to override the default behavior. If neither is specified, the old behavior remains.

Reviewers: erichkeane, aaron.ballman, lebedev.ri

Reviewed By: aaron.ballman

Subscribers: bogner, cfe-commits

Differential Revision: https://reviews.llvm.org/D42887

llvm-svn: 324498
2018-02-07 18:36:51 +00:00
Amara Emerson 4ee9f82a95 [Driver] Add an -fexperimental-isel driver option to enable/disable GlobalISel.
Differential Revision: https://reviews.llvm.org/D42276

llvm-svn: 323485
2018-01-26 00:27:22 +00:00
Artem Belevich c30bcad19c [CUDA] Disable PGO and coverage instrumentation in NVPTX.
NVPTX does not have runtime support necessary for profiling to work
and even call arc collection is prohibitively expensive. Furthermore,
there's no easy way to collect the samples. NVPTX also does not
support global constructors that clang generates if sample/arc collection
is enabled.

Differential Revision: https://reviews.llvm.org/D42452

llvm-svn: 323345
2018-01-24 17:41:02 +00:00
Nico Weber e3712cf5c4 [clang-cl] Let /FA output use intel assembly.
cl's assembly output is in intel syntax, so clang-cl's should be too, PR35031.
https://reviews.llvm.org/D42157

llvm-svn: 322652
2018-01-17 13:34:20 +00:00
Alex Bradbury 71f45455e1 [RISCV] Add the RISCV target and compiler driver
As RV64 codegen has not yet been upstreamed into LLVM, we focus on RV32 driver 
support (RV64 to follow).

Differential Revision: https://reviews.llvm.org/D39963

llvm-svn: 322276
2018-01-11 13:36:56 +00:00
Adrian McCarthy db2736ddd8 Reland "Emit Function IDs table for Control Flow Guard"
Adds option /guard:cf to clang-cl and -cfguard to cc1 to emit function IDs
of functions that have their address taken into a section named .gfids$y for
compatibility with Microsoft's Control Flow Guard feature.

The original patch didn't have the lit.local.cfg file that restricts the new
test to x86, thus the new test was failing on the non-x86 bots.

Differential Revision: https://reviews.llvm.org/D40531

The reverts r322008, which was a revert of r322005.

This reverts commit a05b89f9aca70597dc79fe97bc49b50b51f525ba.

llvm-svn: 322136
2018-01-09 23:49:30 +00:00
Oren Ben Simhon 57cc1a5d77 Added Control Flow Protection Flag
Cf-protection is a target independent flag that instructs the back-end to instrument control flow mechanisms like: Branch, Return, etc.
For example in X86 this flag will be used to instrument Indirect Branch Tracking instructions.

Differential Revision: https://reviews.llvm.org/D40478

Change-Id: I5126e766c0e6b84118cae0ee8a20fe78cc373dea
llvm-svn: 322063
2018-01-09 08:53:59 +00:00
Adrian McCarthy ce63a925cc Revert "Emit Function IDs table for Control Flow Guard"
The new test fails on the Hexagon bot.  Reverting while I investigate.

This reverts https://reviews.llvm.org/rL322005

This reverts commit b7e0026b4385180c378edc658ec91a39566f2942.

llvm-svn: 322008
2018-01-08 17:12:01 +00:00
Adrian McCarthy cf6e6c82c1 Emit Function IDs table for Control Flow Guard
Adds option /guard:cf to clang-cl and -cfguard to cc1 to emit function IDs
of functions that have their address taken into a section named .gfids$y for
compatibility with Microsoft's Control Flow Guard feature.

Differential Revision: https://reviews.llvm.org/D40531

llvm-svn: 322005
2018-01-08 16:33:42 +00:00
Sean Eveson 5110d4f5c0 [Driver] Add flag enabling the function stack size section that was added in r319430
Adds the -fstack-size-section flag to enable the .stack_sizes section. The flag defaults to on for the PS4 triple.

Differential Revision: https://reviews.llvm.org/D40712

llvm-svn: 321992
2018-01-08 13:42:26 +00:00
Alexey Bataev e927ca74ee [OPENMP] Initial support for `-fopenmp-simd` option.
Added basic support for `-fopenmp-simd` options.

llvm-svn: 321558
2017-12-29 17:36:15 +00:00
Benjamin Kramer 3a13ed60ba Avoid int to string conversion in Twine or raw_ostream contexts.
Some output changes from uppercase hex to lowercase hex, no other functionality change intended.

llvm-svn: 321526
2017-12-28 16:58:54 +00:00
Jonas Devlieghere cf73eba142 [clang] -foptimization-record-file= should imply -fsave-optimization-record
The Clang option -foptimization-record-file= controls which file an
optimization record is output to. Optimization records are output if you
use the Clang option -fsave-optimization-record. If you specify the
first option without the second, you get a warning that the command line
argument was unused. Passing -foptimization-record-file= should imply
-fsave-optimization-record.

This fixes PR33670

Patch by: Dmitry Venikov <venikov@phystech.edu>

Differential revision: https://reviews.llvm.org/D39834

llvm-svn: 321090
2017-12-19 17:16:45 +00:00
Sanjay Patel cb8c009801 [Driver, CodeGen] pass through and apply -fassociative-math
There are 2 parts to getting the -fassociative-math command-line flag translated to LLVM FMF:

1. In the driver/frontend, we accept the flag and its 'no' inverse and deal with the 
   interactions with other flags like -ffast-math -fno-signed-zeros -fno-trapping-math. 
   This was mostly already done - we just need to translate the flag as a codegen option. 
   The test file is complicated because there are many potential combinations of flags here.
   Note that we are matching gcc's behavior that requires 'nsz' and no-trapping-math.

2. In codegen, we map the codegen option to FMF in the IR builder. This is simple code and 
   corresponding test.

For the motivating example from PR27372:

float foo(float a, float x) { return ((a + x) - x); }

$ ./clang -O2 27372.c -S -o - -ffast-math  -fno-associative-math -emit-llvm  | egrep 'fadd|fsub'
  %add = fadd nnan ninf nsz arcp contract float %0, %1
  %sub = fsub nnan ninf nsz arcp contract float %add, %2

So 'reassoc' is off as expected (and so is the new 'afn' but that's a different patch). 
This case now works as expected end-to-end although the underlying logic is still wrong:

$ ./clang  -O2 27372.c -S -o - -ffast-math  -fno-associative-math | grep xmm
	addss	%xmm1, %xmm0
	subss	%xmm1, %xmm0

We're not done because the case where 'reassoc' is set is ignored by optimizer passes. Example:

$ ./clang  -O2 27372.c -S -o - -fassociative-math -fno-signed-zeros -fno-trapping-math -emit-llvm  | grep fadd
  %add = fadd reassoc float %0, %1

$ ./clang -O2  27372.c -S -o - -fassociative-math -fno-signed-zeros -fno-trapping-math | grep xmm
	addss	%xmm1, %xmm0
	subss	%xmm1, %xmm0

Differential Revision: https://reviews.llvm.org/D39812

llvm-svn: 320920
2017-12-16 16:11:17 +00:00
Craig Topper 9a724aa38f [Driver][CodeGen] Add -mprefer-vector-width driver option and attribute during CodeGen.
This adds a new command line option -mprefer-vector-width to specify a preferred vector width for the vectorizers. Valid values are 'none' and unsigned integers. The driver will check that it meets those constraints. Specific supported integers will be managed by the targets in the backend.

Clang will take the value and add it as a new function attribute during CodeGen.

This represents the alternate direction proposed by Sanjay in this RFC: http://lists.llvm.org/pipermail/llvm-dev/2017-November/118734.html

The syntax here matches gcc, though gcc treats it as an x86 specific command line argument. gcc only allows values of 128, 256, and 512. I'm not having clang check any values.

Differential Revision: https://reviews.llvm.org/D40230

llvm-svn: 320419
2017-12-11 21:09:19 +00:00
Reid Kleckner 7383b8e4fe Reformat switch statement added in r319297, NFC
llvm-svn: 319364
2017-11-29 21:36:00 +00:00
Martell Malone c950c651a4 Toolchain: Normalize dwarf, sjlj and seh eh
This is a re-apply of r319294.

adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

-fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319297
2017-11-29 07:25:12 +00:00
Martell Malone 2fa25706ed Revert "Toolchain: Normalize dwarf, sjlj and seh eh"
This reverts rL319294.
The windows sanitizer does not like seh on x86.
Will re apply with None type for x86

llvm-svn: 319295
2017-11-29 06:51:27 +00:00
Martell Malone 390cfcb0b1 Toolchain: Normalize dwarf, sjlj and seh eh
adds -fseh-exceptions and -fdwarf-exceptions flags

clang will check if the user has specified an exception model flag,
in the absense of specifying the exception model clang will then check
the driver default and append the model flag for that target to cc1

clang cc1 assumes dwarf is the default if none is passed
and -fno-exceptions has a higher priority then specifying the model

move __SEH__ macro definitions out of Targets into InitPreprocessor
behind the -fseh-exceptions flag

move __ARM_DWARF_EH__ macrodefinitions out of verious targets and into
InitPreprocessor behind the -fdwarf-exceptions flag and arm|thumb check

remove unused USESEHExceptions from the MinGW Driver

fold USESjLjExceptions into a new GetExceptionModel function that
gives the toolchain classes more flexibility with eh models

Reviewers: rnk, mstorsjo

Differential Revision: https://reviews.llvm.org/D39673

llvm-svn: 319294
2017-11-29 06:25:13 +00:00
Petr Hosek 5668d83e0e [Driver] Make the use of relax relocations a per target option
The support for relax relocations is dependent on the linker and
different toolchains within the same compiler can be using different
linkers some of which may or may not support relax relocations.

Give toolchains the option to control whether they want to use relax
relocations in addition to the existing (global) build system option.

Differential Revision: https://reviews.llvm.org/D39831

llvm-svn: 318816
2017-11-22 01:38:31 +00:00
Hans Wennborg 14e8a5a32d Add -finstrument-function-entry-bare flag
This is an instrumentation flag that's similar to
-finstrument-functions, but it only inserts calls on function entry, the
calls are inserted post-inlining, and they don't take any arugments.

This is intended for users who want to instrument function entry with
minimal overhead.

(-pg would be another alternative, but forces frame pointer emission and
affects link flags, so is probably best left alone to be used for
generating gcov data.)

Differential revision: https://reviews.llvm.org/D40276

llvm-svn: 318785
2017-11-21 17:30:34 +00:00
Jonas Hahnfeld 7c78cc5273 [OpenMP] Consistently use cubin extension for nvlink
This was previously done in some places, but for example not for
bundling so that single object compilation with -c failed. In
addition cubin was used for all file types during unbundling which
is incorrect for assembly files that are passed to ptxas.
Tighten up the tests so that we can't regress in that area.

Differential Revision: https://reviews.llvm.org/D40250

llvm-svn: 318763
2017-11-21 14:44:45 +00:00
Peter Smith 931c9fa8fe [ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
Attempt to fix warning picked up by buildbot.

llvm-svn: 318648
2017-11-20 13:53:55 +00:00
Peter Smith 3947cb3cf0 [ARM] For assembler files recognize -Xassembler or -Wa, -mthumb
The Unified Arm Assembler Language is designed so that the majority of
assembler files can be assembled for both Arm and Thumb with the choice
made as a compilation option.

The way this is done in gcc is to pass -mthumb to the assembler with either
-Wa,-mthumb or -Xassembler -mthumb. This change adds support for these
options to clang. There is no assembler equivalent of -mno-thumb, -marm or
-mno-arm so we don't need to recognize these.

Ideally we would do all of the processing in
CollectArgsForIntegratedAssembler(). Unfortunately we need to change the
triple and at that point it is too late. Instead we look for the option
earlier in ComputeLLVMTriple().
    
Fixes PR34519
    
Differential Revision: https://reviews.llvm.org/D40127

llvm-svn: 318647
2017-11-20 13:43:55 +00:00
Hans Wennborg 76c26c1dca Switch -mcount and -finstrument-functions to emit EnterExitInstrumenter attributes
This updates -mcount to use the new attribute names (LLVM r318195), and
switches over -finstrument-functions to also use these attributes rather
than inserting instrumentation in the frontend.

It also adds a new flag, -finstrument-functions-after-inlining, which
makes the cygprofile instrumentation get inserted after inlining rather
than before.

Differential Revision: https://reviews.llvm.org/D39331

llvm-svn: 318199
2017-11-14 21:13:27 +00:00
Konstantin Zhuravlyov 8914a6d50e AMDGPU/NFC: Move getAMDGPUTargetFeatures to AMDGPU toolchain
Differential Revision: https://reviews.llvm.org/D39877

llvm-svn: 317909
2017-11-10 19:09:57 +00:00
Sriraman Tallam 5c65148565 New clang option -fno-plt which avoids the PLT and lazy binding while making external calls.
Differential Revision: https://reviews.llvm.org/D39079

llvm-svn: 317605
2017-11-07 19:37:51 +00:00
Erich Keane a957ffbce3 Add default calling convention support for regcall.
Added support for regcall as default calling convention. Also added code to
exclude main when applying default calling conventions.

Patch-By: eandrews

Differential Revision: https://reviews.llvm.org/D39210

llvm-svn: 317268
2017-11-02 21:08:00 +00:00
Saleem Abdulrasool 8ba8b02879 Driver: default to `unsigned int` `wchar_t` for ARM
AAPCS and AAPCS64 mandate that `wchar_t` with `-fno-short-wchar` is an
`unsigned int` rather than a `signed int`.  Ensure that the driver does
not flip the signedness of `wchar_t` for those targets.

Add additional tests to ensure that this does not regress.

llvm-svn: 316858
2017-10-29 06:01:14 +00:00
Aaron Ballman 6173655639 Fix a typo with -fno-double-square-bracket-attributes and add a test to demonstrate that it works as expected in C++11 mode. Additionally corrected the handling of -fdouble-square-bracket-attributes to be properly passed down to the cc1 option.
llvm-svn: 316275
2017-10-21 20:28:58 +00:00