llvm-project

Commit Graph

Author	SHA1	Message	Date
Scott Michel	41236c0cf3	- Start moving target-dependent nodes that could be represented by an instruction sequence and cannot ordinarily be simplified by DAGcombine into the various target description files or SPUDAGToDAGISel.cpp. This makes some 64-bit operations legal. - Eliminate target-dependent ISD enums. - Update tests. llvm-svn: 61508	2008-12-30 23:28:25 +00:00
Scott Michel	2e5df906f8	CellSPU: (a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to directly zero-extend i32 to i64, but use rotates and shifts for sign extension. Also ensure unified register consistency. (b) Add new test harness for i64 operations: i64ops.ll llvm-svn: 59970	2008-11-24 18:20:46 +00:00

Author

SHA1

Message

Date

Scott Michel

41236c0cf3

- Start moving target-dependent nodes that could be represented by an

instruction sequence and cannot ordinarily be simplified by DAGcombine
  into the various target description files or SPUDAGToDAGISel.cpp.

  This makes some 64-bit operations legal.

- Eliminate target-dependent ISD enums.

- Update tests.

llvm-svn: 61508

2008-12-30 23:28:25 +00:00

Scott Michel

2e5df906f8

CellSPU:

(a) Slight rethink on i64 zero/sign/any extend code - use a shuffle to
    directly zero-extend i32 to i64, but use rotates and shifts for
    sign extension. Also ensure unified register consistency.
(b) Add new test harness for i64 operations: i64ops.ll

llvm-svn: 59970

2008-11-24 18:20:46 +00:00

2 Commits