e7b2a864f2
Add FEMMS and ADDQ. Renamed MMX recipes to prepend the MMX_ to them.
...
llvm-svn: 35616
2007-04-03 06:00:37 +00:00
81e0707552
split some code out into a helper function
...
llvm-svn: 35615
2007-04-03 05:11:24 +00:00
64c764cebc
Split a whole ton of code out of visitICmpInst into visitICmpInstWithInstAndIntCst.
...
llvm-svn: 35614
2007-04-03 04:46:52 +00:00
8b2ec5f506
Fix PR1253 and xor2.ll:test[01]
...
llvm-svn: 35612
2007-04-03 01:47:41 +00:00
f742e2fe70
Arm supports negative strides as well, add them. This lets us compile:
...
CodeGen/ARM/arm-negative-stride.ll to:
LBB1_2: @bb
str r1, [r3, -r0, lsl #2 ]
add r0, r0, #1
cmp r0, r2
bne LBB1_2 @bb
llvm-svn: 35609
2007-04-03 00:13:57 +00:00
f3197a7d53
allow -1 strides to reuse "1" strides.
...
llvm-svn: 35607
2007-04-02 22:51:58 +00:00
16627a542f
1. Insert custom lowering hooks for ISD::ROTR and ISD::ROTL.
...
2. Help DAGCombiner recognize zero/sign/any-extended versions of ROTR and ROTL
patterns. This was motivated by the X86/rotate.ll testcase, which should now
generate code for other platforms (and soon-to-come platforms.) Rewrote code
slightly to make it easier to read.
llvm-svn: 35605
2007-04-02 21:36:32 +00:00
d13786dd82
fix off by 1 error in displacement computation
...
llvm-svn: 35602
2007-04-02 20:31:06 +00:00
8e168a4f36
fix the CodeGen/ARM/2007-03-13-InstrSched.ll regression: allow IV's with scales
...
to be folded into non-store instructions.
llvm-svn: 35601
2007-04-02 18:51:18 +00:00
476fb6a5c9
Ugh. Copy coalescer does not update register numbers.
...
llvm-svn: 35600
2007-04-02 18:49:18 +00:00
6223e83f6d
add support for the 'w' inline asm register class.
...
llvm-svn: 35598
2007-04-02 17:24:08 +00:00
9bc8ab100d
1. Make use of APInt operation instead of using ConstantExpr::getXXX.
...
2. Use cheaper APInt methods.
llvm-svn: 35594
2007-04-02 13:45:30 +00:00
56cda95658
Use uint32_t for bitwidth instead of unsigned.
...
llvm-svn: 35593
2007-04-02 08:20:41 +00:00
28e0e4e11e
Pass the type of the store access, not the type of the store, into the
...
target hook. This allows us to codegen a loop as:
LBB1_1: @cond_next
mov r2, #0
str r2, [r0, +r3, lsl #2 ]
add r3, r3, #1
cmn r3, #1
bne LBB1_1 @cond_next
instead of:
LBB1_1: @cond_next
mov r2, #0
str r2, [r0], #+4
add r3, r3, #1
cmn r3, #1
bne LBB1_1 @cond_next
This looks the same, but has one fewer induction variable (and therefore,
one fewer register) live in the loop.
llvm-svn: 35592
2007-04-02 06:34:44 +00:00
3e21eb7fd7
Fix a bug which caused us to never be able to use signed comparisons for
...
equality comparisons of a constant. This allows us to codegen the 'sintzero'
loop in PR1288 as:
LBB1_1: ;cond_next
li r4, 0
addi r2, r2, 1
stw r4, 0(r3)
addi r3, r3, 4
cmpwi cr0, r2, -1
bne cr0, LBB1_1 ;cond_next
instead of:
LBB1_1: ;cond_next
addi r2, r2, 1
li r4, 0
xoris r5, r2, 65535
stw r4, 0(r3)
addi r3, r3, 4
cmplwi cr0, r5, 65535
bne cr0, LBB1_1 ;cond_next
This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.
llvm-svn: 35590
2007-04-02 05:59:42 +00:00
9d5aacee92
Wrap long line
...
llvm-svn: 35588
2007-04-02 05:48:58 +00:00
50490d54f2
use more obvious function name.
...
llvm-svn: 35587
2007-04-02 05:42:22 +00:00
a3e0bb4ebb
Treat xor of signbit like an add.
...
llvm-svn: 35586
2007-04-02 05:41:38 +00:00
b24acc7bee
simplify (x+c)^signbit as (x+c+signbit), pointed out by PR1288. This implements
...
test/Transforms/InstCombine/xor.ll:test28
llvm-svn: 35584
2007-04-02 05:36:22 +00:00
b7b75145f1
reduce use of std::set
...
llvm-svn: 35576
2007-04-02 01:44:59 +00:00
c3748562bd
Various passes before isel split edges and do other CFG-restructuring changes.
...
isel has its own particular features that it wants in the CFG, in order to
reduce the number of times a constant is computed, etc. Make sure that we
clean up the CFG before doing any other things for isel. Doing so can
dramatically reduce the number of split edges and reduce the number of
places that constants get computed. For example, this shrinks
CodeGen/Generic/phi-immediate-factoring.ll from 44 to 37 instructions on X86,
and from 21 to 17 MBB's in the output. This is primarily a code size win,
not a performance win.
This implements CodeGen/Generic/phi-immediate-factoring.ll and PR1296.
llvm-svn: 35575
2007-04-02 01:35:34 +00:00
6be85337b0
- Divides the comparisons in two types: comparisons that only use N and Z
...
flags (ARMISD::CMPNZ) and comparisons that use all flags (ARMISD::CMP).
- Defines the instructions: TST, TEQ (ARM) and TST (Thumb).
llvm-svn: 35573
2007-04-02 01:30:03 +00:00
fad9bd6b92
For PR1297:
...
Make sure that the CTPOP result is casted to i32 as the bit counting
intrinsics all return i32 now (this affects CTLZ and CTTZ as well).
llvm-svn: 35567
2007-04-02 01:01:49 +00:00
8fe3cbe6bd
print the type of an inserted IV in -debug mode.
...
llvm-svn: 35563
2007-04-01 22:21:39 +00:00
c3eeb42809
simplify this code, make it work for ap ints
...
llvm-svn: 35561
2007-04-01 20:57:36 +00:00
59a6fa7af6
fix breakage from last night, simplify code.
...
llvm-svn: 35560
2007-04-01 20:49:36 +00:00
add6123405
The bit counting intrinsics return i32 not the operand type. This fixes
...
last night's regression in SingleSource/UnitTests/2005-05-11-Popcount-ffs-fls
llvm-svn: 35556
2007-04-01 18:42:20 +00:00
150f3bbab2
Avoid unnecessary APInt construction.
...
llvm-svn: 35555
2007-04-01 17:13:37 +00:00
17d48a8bc2
Add i16 address mode.
...
llvm-svn: 35551
2007-04-01 08:06:46 +00:00
6bba6c8143
For PR1297:
...
Support overloaded intrinsics bswap, ctpop, cttz, ctlz.
llvm-svn: 35547
2007-04-01 07:35:23 +00:00
3a0843e734
For PR1297:
...
Adjust for changes in the bit counting intrinsics. They all return i32
now so we have to trunc/zext the DAG node accordingly.
llvm-svn: 35546
2007-04-01 07:34:11 +00:00
a090ffb2ab
For PR1297:
...
Change getOperationName to return std::string instead of const char*
llvm-svn: 35545
2007-04-01 07:32:19 +00:00
2a2117c82d
For PR1297:
...
Implement "actual" argument types for the Intrinsic member functions. This
involves changing the getName, getType, and getDeclaration methods to have
optional parameters for the actual types. These are necessary in order for
the type/name to be constructed properly for overloaded intrinsics. Only
the caller knows the actual argument types desired.
llvm-svn: 35541
2007-04-01 07:25:33 +00:00
7c57b88b27
For PR1297:
...
1. Clear up confusion between "GotBits" and "ExpectBits". GotBits is the
type actually provided. ExpectedBits is the type expected for the
intrinsics. Before this patch, it was reversed!
2. Implement checks for overloaded intrinsics. This involves computing the
suffix expected and making sure the suffix matches the function name. It
also includes some intrinsic-specific checks such as ensuring that the
bswap parameter and result are the same width and an even number of bytes.
llvm-svn: 35540
2007-04-01 07:22:57 +00:00
0427799531
Fix InstCombine/2007-03-31-InfiniteLoop.ll
...
llvm-svn: 35536
2007-04-01 05:36:37 +00:00
f22938af1b
Implement union of wrapped sets.
...
llvm-svn: 35534
2007-04-01 03:47:44 +00:00
427ec7fa51
Readme
...
llvm-svn: 35533
2007-03-31 15:05:44 +00:00
a8cc1ebae1
Consistency with native compilers
...
llvm-svn: 35532
2007-03-31 13:11:52 +00:00
b72fcddd23
Fix comment.
...
llvm-svn: 35531
2007-03-31 09:36:12 +00:00
075b4db621
add a note
...
llvm-svn: 35530
2007-03-31 07:06:25 +00:00
f6a6d3c8b0
move a bunch of code out of the sdisel pass into its own opt pass "codegenprepare".
...
llvm-svn: 35529
2007-03-31 04:18:03 +00:00
f2836d17b6
Split the sdisel code munging stuff out into its own opt-pass, CodeGenPrepare.
...
llvm-svn: 35528
2007-03-31 04:06:36 +00:00
f2d71d49e2
switch TL::getValueType to use MVT::getValueType.
...
llvm-svn: 35527
2007-03-31 04:05:24 +00:00
516f38b35f
add a method to turn a type into a VT.
...
llvm-svn: 35526
2007-03-31 04:03:02 +00:00
82c42284f4
Delete dead code.
...
llvm-svn: 35525
2007-03-31 02:50:26 +00:00
4f16402e0d
Use APInt operators to calculate the carry bits, remove this loop.
...
llvm-svn: 35524
2007-03-31 02:38:39 +00:00
afddb2c6f8
Match GCC's MMX calling convention.
...
llvm-svn: 35523
2007-03-31 01:03:53 +00:00
bafc837c83
Add a -print-lsr-output option to LLC, to print the output of the LSR pass.
...
llvm-svn: 35522
2007-03-31 00:24:43 +00:00
1eb94d973a
implement the new addressing mode description hook.
...
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
ac3f81508c
add one addressing mode description hook to rule them all.
...
llvm-svn: 35520
2007-03-30 23:14:50 +00:00
4bbd2eefba
Fix incorrect combination of different loads. Reenable zext-over-truncate
...
combination.
llvm-svn: 35517
2007-03-30 21:38:07 +00:00
9a2a7b174a
Don't add the same MI to register reuse "last def/use" twice if it reads the
...
register more than once.
llvm-svn: 35513
2007-03-30 20:21:35 +00:00
48dd5e7d44
Bug fix for PR1279. When isDead is propagate by copy coalescing, we keep length
...
of dead def live interval at 1 to avoid multiple def's targeting the same
register. The previous patch missed a case where the source operand is live-in.
In that case, remove the whole interval.
llvm-svn: 35512
2007-03-30 20:18:35 +00:00
fd28a33031
Make sure the use of ConstantInt::getZExtValue() for shift amount safe.
...
llvm-svn: 35510
2007-03-30 17:20:39 +00:00
8c3d3dce2b
For PR1293:
...
* Rename the FunctionType* parameter from M to FT on all the functions.
* Implement a fix for PR1293 by just asserting that library functions that
must return pointers should have pointer typed results. This just makes
sure that we don't attempt to use an uninitialized integer or something
later on.
llvm-svn: 35508
2007-03-30 16:41:50 +00:00
b25806fa5f
1. Make sure the use of ConstantInt::getZExtValue() for getting shift
...
amount is safe.
2. Use new method on ConstantInt instead of (? :) operator.
3. Use new method uge() on ConstantInt to simplify codes.
llvm-svn: 35505
2007-03-30 09:29:48 +00:00
5e60a4a6b0
Use APInt operation instead of ConstantExpr::getXX.
...
llvm-svn: 35503
2007-03-30 05:45:18 +00:00
ef01c47512
For PR1289: Regenerate
...
llvm-svn: 35500
2007-03-30 01:37:39 +00:00
cf2ccbff1a
For PR1289:
...
Check at the end of the parse that there are no unresolved types and no
undefined values. Issue errors if there are. This gets rid of the need
for implementation or checkpoint by ensuring you can't finish a parse with
undefined things.
llvm-svn: 35499
2007-03-30 01:37:13 +00:00
2fbcbc16b4
Add MMX calling conventions.
...
llvm-svn: 35489
2007-03-30 00:35:22 +00:00
045414aa8e
New entry.
...
llvm-svn: 35480
2007-03-29 21:40:13 +00:00
cc44b1e743
Can't re-materialize mov r, imm in thumb since mov would clobber the condition code.
...
llvm-svn: 35479
2007-03-29 21:38:31 +00:00
c7f485fd71
Use the stat information in the Path object, if it is already obtained. This
...
avoids a call to ::fstat by MappedFile when the file size information was
already obtained by the Path object.
llvm-svn: 35477
2007-03-29 19:11:22 +00:00
200c6f9c3d
For PR789:
...
Make the sys::Path::getFileStatus function more efficient by having it
return a pointer to the FileStatus structure rather than copy it. Adjust
uses of the function accordingly. Also, fix some memory issues in sys::Path.
llvm-svn: 35476
2007-03-29 19:05:44 +00:00
7c82675afa
the bytecode reader supports dematerializeFunction
...
llvm-svn: 35475
2007-03-29 18:58:08 +00:00
0833b81248
Regenerate.
...
llvm-svn: 35473
2007-03-29 18:50:01 +00:00
01a599a202
Give users a grace period on the implementation keyword. This *will* get
...
removed in a few days.
llvm-svn: 35472
2007-03-29 18:49:28 +00:00
68e93b7c44
MS C does have inlining after all, just uses _inline instead of inline.
...
llvm-svn: 35467
2007-03-29 17:42:21 +00:00
60c5522467
Determine absolute paths the correct way :)
...
llvm-svn: 35464
2007-03-29 17:27:38 +00:00
d394617a55
Add a uniqueID field to the FileStatus structure for Paths. This will map
...
to the inode number on Unix and something far less unique on Windows. The
windows case needs to be improved.
llvm-svn: 35461
2007-03-29 17:00:31 +00:00
78b899f665
For PR789:
...
Updates for change in interface of getFileStatus method of sys::Path class.
llvm-svn: 35458
2007-03-29 16:48:16 +00:00
0f92f0e519
For PR789:
...
* Add a method: bool isAbsolute() const, which determines if the path name
is absolute or not.
* Implement caching of file status information in the Path object. Allow it
to be updated forcefully or lazily re-fetched from the cached value.
llvm-svn: 35456
2007-03-29 16:43:20 +00:00
b3a80b1d70
1. Make more use of APInt::getHighBitsSet/getLowBitsSet.
...
2. Let APInt variable do the binary operation stuff instead of using
ConstantExpr::getXXX.
llvm-svn: 35450
2007-03-29 08:15:12 +00:00
ccee35fd0d
Disable load width reduction xform of variant (zext (truncate load x)) for
...
big endian targets until llvm-gcc build issue has been resolved.
llvm-svn: 35449
2007-03-29 07:56:46 +00:00
8f592160c0
Add support for hidden visibility to darwin/arm.
...
llvm-svn: 35448
2007-03-29 07:49:34 +00:00
444af49cc0
Clean up some codes in InstCombiner::SimplifyDemandedBits().
...
llvm-svn: 35446
2007-03-29 04:45:55 +00:00
86de3a009d
New entries.
...
llvm-svn: 35445
2007-03-29 02:48:56 +00:00
a4475575c0
Clean up codes in InstCombiner::SimplifyDemandedBits():
...
1. Line out nested call of APInt::zext/trunc.
2. Make more use of APInt::getHighBitsSet/getLowBitsSet.
3. Use APInt[] operator instead of expression like "APIntVal & SignBit".
llvm-svn: 35444
2007-03-29 02:26:30 +00:00
4961cf1c06
1. Make the APInt variable do the binary operation stuff if possible
...
instead of using ConstantExpr::getXX.
2. Use constant reference to APInt if possible instead of expensive
APInt copy.
llvm-svn: 35443
2007-03-29 01:57:21 +00:00
cc560c93eb
Fix C Backend to generate code that works with Microsoft C for the benefit of
...
front ends that do not depend on the GCC runtime (someday...).
llvm-svn: 35441
2007-03-28 23:08:37 +00:00
4ad38abd40
Made this into a bug report: PR1286
...
llvm-svn: 35439
2007-03-28 19:07:34 +00:00
0ad22563b8
Oops :)
...
llvm-svn: 35438
2007-03-28 18:38:33 +00:00
7522c9d8e1
Don't allow MatchAddress recurse too much. This trims exponential
...
behaviour in some cases.
llvm-svn: 35437
2007-03-28 18:36:33 +00:00
2ba38c8711
add a note
...
llvm-svn: 35435
2007-03-28 18:17:19 +00:00
bcd38852f2
Compile CodeGen/X86/lea-3.ll:test2 to:
...
_test3:
leaq (,%rdi,4), %rax
orq %rdi, %rax
ret
instead of:
_test2:
movq %rdi, %rax
shlq $2, %rax
orq %rdi, %rax
ret
llvm-svn: 35434
2007-03-28 18:12:31 +00:00
117477e28b
Avoid unnecessary APInt construction.
...
llvm-svn: 35431
2007-03-28 17:38:21 +00:00
a6527d6a61
Dan pointed out that this is done, remove it!
...
llvm-svn: 35430
2007-03-28 17:26:52 +00:00
734077b1f0
First test check-in.
...
llvm-svn: 35429
2007-03-28 17:04:43 +00:00
23f7a1c947
1. Make more use of getLowBitsSet/getHighBitsSet.
...
2. Use APInt[] instead of "X & SignBit".
3. Clean up some codes.
4. Make the expression like "ShiftAmt = ShiftAmtC->getZExtValue()" safe.
llvm-svn: 35424
2007-03-28 15:02:20 +00:00
0b013d578d
It is not possible to determine dominance between two PHI nodes
...
based on their ordering. This is applicable to ETForest::dominates() also.
llvm-svn: 35423
2007-03-28 14:57:43 +00:00
2777a31850
1. Make more use of getLowBitsSet/getHighBitsSet.
...
2. Make the APInt value do the zext/trunc stuff instead of using
ConstantExpr::getZExt().
llvm-svn: 35422
2007-03-28 09:19:01 +00:00
d771485d89
Notes on re-materialization.
...
llvm-svn: 35420
2007-03-28 08:30:04 +00:00
603e49c6da
Move rematerialization out of beta.
...
llvm-svn: 35419
2007-03-28 08:26:40 +00:00
c2d3309b99
Use UnknownBIts[BitWidth-1] instead of UnknownBIts & SignBits.
...
llvm-svn: 35418
2007-03-28 05:15:57 +00:00
18570b1f14
Remove unused APInt variable.
...
llvm-svn: 35414
2007-03-28 03:02:21 +00:00
b7e45e705a
Regenerate.
...
llvm-svn: 35411
2007-03-28 02:37:40 +00:00
2e35a58838
Replace the "implementation" keyword with "checkpoint". This more accurately
...
describes its function as check against unresolved types and definitions.
This is handy for forcing error messages in assembly test cases or otherwise
ensuring that everything is resolved at that point in the assembly.
llvm-svn: 35410
2007-03-28 02:36:42 +00:00
57e3f7324b
Clean up codes in ComputeMaskedBits():
...
1. Line out nested use of zext/trunc.
2. Make more use of getHighBitsSet/getLowBitsSet.
3. Use APInt[] != 0 instead of "(APInt & SignBit) != 0".
llvm-svn: 35408
2007-03-28 02:19:03 +00:00
4388043b25
Scale 1 is always ok.
...
llvm-svn: 35407
2007-03-28 01:55:52 +00:00
c2cba18f2b
Remove isLegalAddressImmediate.
...
llvm-svn: 35406
2007-03-28 01:53:55 +00:00
6d8e75ddb2
No need to generate the implementation keyword any more. Its frivolous.
...
llvm-svn: 35405
2007-03-28 01:53:20 +00:00
07c42d43a2
GEP index sinking fixes:
...
1) Take address scale into consideration. e.g. i32* -> scale 4.
2) Examine all the users of GEP.
3) Generalize to inter-block GEP's (no longer uses loopinfo).
4) Don't do xform if GEP has other variable index(es).
llvm-svn: 35403
2007-03-28 01:49:39 +00:00
a5c18bf798
For PR1280:
...
When converting an add/xor/and triplet into a trunc/sext, only do so if the
intermediate integer type is a bitwidth that the targets can handle.
llvm-svn: 35400
2007-03-28 01:36:16 +00:00
b41697c006
Fix for PR1279. Dead def has a live interval of length 1. Copy coalescing should
...
not violate that.
llvm-svn: 35396
2007-03-28 01:30:37 +00:00
2338e21b2b
Remove cruft I put in there...
...
llvm-svn: 35394
2007-03-28 01:02:54 +00:00
c56e4920d2
Fix a problem building llvm-gcc on amd64-unknown-freebsd6.2, due to the
...
system assembler not groking legal instructions like "leal (,%esi,8), %ecx".
llvm-svn: 35393
2007-03-28 00:58:40 +00:00
ad2db4a4cf
Unbreak mmx arithmetic. It was barfing trying to do v8i8 arithmetic.
...
llvm-svn: 35392
2007-03-28 00:57:11 +00:00
999c77f89c
Add the "unpack low packed data" instructions. This should be the last of
...
the MMX instructions that are needed...
llvm-svn: 35389
2007-03-27 21:20:36 +00:00
5a1bd4045d
Use SmallPtrSet.
...
llvm-svn: 35388
2007-03-27 20:50:46 +00:00
6dff51ae65
Fix so that pandn is emitted instead of an xor/and combo. Add integer
...
comparison operators.
llvm-svn: 35385
2007-03-27 20:22:40 +00:00
a4ed8a512a
Unbreaks non-debug builds.
...
llvm-svn: 35383
2007-03-27 16:44:48 +00:00
682baf2dda
"The C standards do say that "char" may either be a "signed char" or "unsigned
...
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php
llvm-svn: 35382
2007-03-27 16:33:08 +00:00
143b0dff31
bugfix: sometimes the spiller puts a load between the "mov lr, pc" and "bx" of a CALL_NOLINK.
...
llvm-svn: 35381
2007-03-27 16:19:21 +00:00
37a0bfe128
Remove dead code
...
llvm-svn: 35380
2007-03-27 12:05:48 +00:00
3a9d68181a
Split big monster into small helpers. No functionality change.
...
llvm-svn: 35379
2007-03-27 11:29:11 +00:00
c42406b5ad
SDISel does not preserve all, it changes CFG and other info.
...
llvm-svn: 35376
2007-03-27 00:53:36 +00:00
fdbdf43632
Don't call getOperandConstraint() if operand index is greater than
...
TID->numOperands.
llvm-svn: 35375
2007-03-27 00:48:28 +00:00
2850c677af
Spell check.
...
llvm-svn: 35374
2007-03-27 00:16:08 +00:00
54d5b1b8f8
Implement some minor review feedback.
...
llvm-svn: 35373
2007-03-26 23:58:26 +00:00
441486c172
For PR1271:
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Fix another incorrectly converted shift mask.
llvm-svn: 35371
2007-03-26 23:45:51 +00:00
4398e242dd
Reduce malloc/free traffic.
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llvm-svn: 35370
2007-03-26 23:19:29 +00:00
bea581d70c
It is not possible to determie dominance between two PHI nodes
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based on their ordering.
llvm-svn: 35369
2007-03-26 23:18:28 +00:00
55566a972c
Use std::vector<DFCalculateWorkObject> instead of
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std::vector<DFCalculateWorkObject *> to reduce malloc/free traffic.
llvm-svn: 35368
2007-03-26 23:17:19 +00:00
7dbbd00b06
findRegisterUseOperand() changed.
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llvm-svn: 35366
2007-03-26 22:41:48 +00:00
4a09b1b5be
Fix for PR1266. Don't mark a two address operand IsKill.
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llvm-svn: 35365
2007-03-26 22:40:42 +00:00
ec3ac316e2
Change findRegisterUseOperand() to return operand index instead.
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llvm-svn: 35363
2007-03-26 22:37:45 +00:00
fd18a0cdf4
Fix reversed logic in getRegsUsed. Rename RegStates to RegsAvailable to
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hopefully forestall similar errors.
llvm-svn: 35362
2007-03-26 22:23:54 +00:00
d2602d5054
eliminate use of std::set
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llvm-svn: 35361
2007-03-26 20:40:50 +00:00
e20090b88d
Add a comment to explain a folding transform.
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llvm-svn: 35360
2007-03-26 20:09:02 +00:00
755d0e7ffc
Get better debug output by having modified instructions print both the
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original and new instruction. A slight performance hit with ostringstream
but it is only for debug.
Also, clean up an uninitialized variable warning noticed in a release build.
llvm-svn: 35358
2007-03-26 17:44:01 +00:00
769a5a8e0b
Get the number of bits to set in a mask correct for a shl/lshr transform.
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llvm-svn: 35357
2007-03-26 17:18:58 +00:00
158f6092a2
Promote to v1i64 type...
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llvm-svn: 35353
2007-03-26 08:03:33 +00:00
48a24419bf
Updated.
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llvm-svn: 35352
2007-03-26 07:55:58 +00:00
98d2104c6f
Add support for the v1i64 type. This makes better code for this:
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#include <mmintrin.h>
extern __m64 C;
void baz(__v2si *A, __v2si *B)
{
*A = C;
_mm_empty();
}
We get this:
_baz:
call "L1$pb"
"L1$pb":
popl %eax
movl L_C$non_lazy_ptr-"L1$pb"(%eax), %eax
movq (%eax), %mm0
movl 4(%esp), %eax
movq %mm0, (%eax)
emms
ret
GCC gives us this:
_baz:
pushl %ebx
call L3
"L00000000001$pb":
L3:
popl %ebx
subl $8, %esp
movl L_C$non_lazy_ptr-"L00000000001$pb"(%ebx), %eax
movl (%eax), %edx
movl 4(%eax), %ecx
movl 16(%esp), %eax
movl %edx, (%eax)
movl %ecx, 4(%eax)
emms
addl $8, %esp
popl %ebx
ret
llvm-svn: 35351
2007-03-26 07:53:08 +00:00
8275f0e0af
SIGN_EXTEND_INREG requires one extra operand, a ValueType node.
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llvm-svn: 35350
2007-03-26 07:12:51 +00:00
50898607a9
For PR1271:
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Fix SingleSource/Regression/C/2003-05-21-UnionBitFields.c by changing a
getHighBitsSet call to getLowBitsSet call that was incorrectly converted
from the original lshr constant expression.
llvm-svn: 35348
2007-03-26 05:25:00 +00:00
e5866e7b89
Look through bitcast when finding IVs. (Chris' patch really.)
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llvm-svn: 35347
2007-03-26 03:01:27 +00:00
52830327e9
For PR1271:
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Remove a use of getLowBitsSet that caused the mask used for replacement of
shl/lshr pairs with an AND instruction to be computed incorrectly. Its not
clear exactly why this is the case. This solves the disappearing shifts
problem, but it doesn't fix Regression/C/2003-05-21-UnionBitFields. It
seems there is more going on.
llvm-svn: 35342
2007-03-25 21:11:44 +00:00
9bf53ffaa2
implement Transforms/InstCombine/cast2.ll:test3 and PR1263
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llvm-svn: 35341
2007-03-25 20:43:09 +00:00
624766f8a2
Some cleanup from review:
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* Don't assume shift amounts are <= 64 bits
* Avoid creating an extra APInt in SubOne and AddOne by using -- and ++
* Add another use of getLowBitsSet
* Convert a series of if statements to a switch
llvm-svn: 35339
2007-03-25 19:55:33 +00:00
7037826c86
First step of switch lowering refactoring: perform worklist-driven
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strategy, emit JT's where possible.
llvm-svn: 35338
2007-03-25 15:07:15 +00:00
e8ac2fce97
Fix authorship
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llvm-svn: 35337
2007-03-25 13:44:26 +00:00
6d94bb79ac
fold constantexprs more aggressively, fixing PR1265
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llvm-svn: 35336
2007-03-25 05:47:04 +00:00
80263aadf3
Refactor several ConstantExpr::getXXX calls with ConstantInt arguments
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using the facilities of APInt. While this duplicates a tiny fraction of
the constant folding code, it also makes the code easier to read and
avoids large ConstantExpr overhead for simple, known computations.
llvm-svn: 35335
2007-03-25 05:33:51 +00:00
26ad3e7191
add a note
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llvm-svn: 35334
2007-03-25 05:10:46 +00:00
222d5ebfd2
1. Avoid unnecessary APInt construction if possible.
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2. Use isStrictlyPositive() instead of isPositive() in two places where
they need APInt value > 0 not only >=0.
llvm-svn: 35333
2007-03-25 05:01:29 +00:00
77f0479833
Implement support for vector operands to inline asm, implementing
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CodeGen/X86/2007-03-24-InlineAsmVectorOp.ll
llvm-svn: 35332
2007-03-25 05:00:54 +00:00
9c9e2f1af2
add a note
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llvm-svn: 35330
2007-03-25 04:46:28 +00:00
8810241ebc
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
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llvm-svn: 35329
2007-03-25 04:44:03 +00:00
3d7efa2586
implement initial support for the silly X constraint. Testcase here: CodeGen/X86/2007-03-24-InlineAsmXConstraint.ll
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llvm-svn: 35327
2007-03-25 04:35:41 +00:00
Bill Wendling