535bd6d3ba
always lower to RETFLAG, never leave it as just ret.
...
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
77f0a1553c
fix attribution
...
llvm-svn: 34637
2007-02-26 18:56:07 +00:00
5d00a0b8a9
Add a description of the X86-64 calling convention and the return
...
conventions. This doesn't do anything yet, but may in the future.
llvm-svn: 34636
2007-02-26 18:17:14 +00:00
ff19957468
switch to smallvector
...
llvm-svn: 34633
2007-02-26 07:59:53 +00:00
294780829a
initial hack at splitting the x86-64 calling convention info out from the
...
mechanics that process it. I'm still not happy with this, but it's a step
in the right direction.
llvm-svn: 34631
2007-02-26 07:50:02 +00:00
d41bff0f97
the truncate must always be done, it's only the assert that is conditional.
...
llvm-svn: 34628
2007-02-26 05:21:05 +00:00
74f5bcf8eb
add an accessor.
...
llvm-svn: 34625
2007-02-26 04:01:25 +00:00
1db979bae8
in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input.
...
Capture this so that downstream zext/sext's are optimized out. This
compiles:
int test(short X) { return (int)X; }
to:
_test:
movl %edi, %eax
ret
instead of:
_test:
movswl %di, %eax
ret
GCC produces this bizarre code:
_test:
movw %di, -12(%rsp)
movswl -12(%rsp),%eax
ret
llvm-svn: 34623
2007-02-26 03:18:56 +00:00
8924332e22
Fix an X86-64 abi bug. We now compile:
...
void foo(short);
void bar(unsigned short A) {
foo(A);
}
into:
_bar:
subq $8, %rsp
movswl %di, %edi
call _foo
addq $8, %rsp
ret
instead of:
_bar:
subq $8, %rsp
call _foo
addq $8, %rsp
ret
Testcase here: test/CodeGen/X86/x86-64-shortint.ll
llvm-svn: 34615
2007-02-25 23:10:46 +00:00
3e0703357f
fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last
...
night: fastcc returns should only go in XMM0 if we have SSE2 or above.
llvm-svn: 34613
2007-02-25 22:23:46 +00:00
1ee61ab414
no really, this is the right patch
...
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
4d2f5f8740
always promote float varargs to double.
...
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
84ab9a556c
one important bugfix: PPC32 didn't have both elf and macho support for
...
external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
llvm-svn: 34601
2007-02-25 19:20:53 +00:00
c2f3d015e0
cosmetic changes from review of last patch. obvious
...
llvm-svn: 34598
2007-02-25 18:31:31 +00:00
fcee9b5568
fastcc functions that return double values now return them in xmm0 on x86-32.
...
This implements CodeGen/X86/fp-stack-ret.ll:test[23]
llvm-svn: 34592
2007-02-25 09:31:16 +00:00
9d9cc84f5b
allow vectors to be passed to stdcall/fastcall functions
...
llvm-svn: 34590
2007-02-25 09:14:25 +00:00
2fc0d70392
move LowerRET into the 'Return Value Calling Convention Implementation'
...
section of the file.
llvm-svn: 34589
2007-02-25 09:12:39 +00:00
ba474f58a4
make all Lower*CallTo implementations use LowerCallResult to handle their
...
result value stuff. This eliminates a bunch of duplicated code and now
GetRetValueLocs is the sole place that decides where a value is returned.
llvm-svn: 34588
2007-02-25 09:10:05 +00:00
7802f3e2ea
pass the calling convention into Lower*CallTo, instead of using ad-hoc flags.
...
llvm-svn: 34587
2007-02-25 09:06:15 +00:00
0cd9960fe7
factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult
...
function. This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.
llvm-svn: 34586
2007-02-25 08:59:22 +00:00
3c76309a5b
move some code around, pass in calling conv, even though it is unused
...
llvm-svn: 34585
2007-02-25 08:29:00 +00:00
dfda38f7dc
simplify result value lowering by splitting the selection of *where* to return
...
registers out from the logic of *how* to return them.
This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.
llvm-svn: 34582
2007-02-25 08:15:11 +00:00
d6b853ad1b
make void-return not a special case
...
llvm-svn: 34579
2007-02-25 07:18:38 +00:00
35a08551a5
eliminate a bunch more temporary vectors from X86 lowering.
...
llvm-svn: 34578
2007-02-25 07:10:00 +00:00
e56fef9b51
eliminate temporary vectors created during X86 lowering.
...
llvm-svn: 34577
2007-02-25 06:40:16 +00:00
84141d4e99
remove std::vector's in RET lowering.
...
llvm-svn: 34576
2007-02-25 06:21:57 +00:00
43df5b335c
implement support for the linux/ppc function call ABI. Patch by
...
Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
b9bd34f54a
Add XLForm_1_ext template, patch by Nicolas Geoffray.
...
llvm-svn: 34573
2007-02-25 05:07:49 +00:00
249edb8b67
Improve JIT support for linux/ppc: Patch by Nicolas Geoffray!
...
llvm-svn: 34572
2007-02-25 05:04:13 +00:00
e80e31eada
remove crediting of Evan Cheng and me.
...
llvm-svn: 34568
2007-02-25 01:42:36 +00:00
01ee5750f4
Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this
...
from README.
When no water available, use end of block if in range. (More to do here.)
llvm-svn: 34563
2007-02-25 00:47:03 +00:00
77a345f000
PR1164:
...
Generate local names with a "llvm_cbe_" prefix using the actual name of the
variable instead of a temporary name.
llvm-svn: 34540
2007-02-23 22:45:08 +00:00
0eb70ebbe5
bugfix: SP wasn't updated for varargs when frame pointer was eliminated.
...
llvm-svn: 34537
2007-02-23 21:53:48 +00:00
2f28a3cf08
Don't spill LR as a callee saved register.
...
llvm-svn: 34533
2007-02-23 20:34:16 +00:00
3e906c48d3
Fix stack alignment in functions with varargs.
...
llvm-svn: 34532
2007-02-23 20:32:57 +00:00
e18b13b213
rewrite of constant islands
...
llvm-svn: 34523
2007-02-23 05:02:36 +00:00
9f8301413c
Added -march=thumb; removed -enable-thumb.
...
llvm-svn: 34521
2007-02-23 03:14:31 +00:00
d00d344519
80 col. violation.
...
llvm-svn: 34520
2007-02-23 03:03:16 +00:00
01b49ce415
External weak linkage is supported by recent binutils on mingw32.
...
llvm-svn: 34519
2007-02-23 01:58:50 +00:00
df5899258c
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
15af662314
Add option to turn on register scavenger; By default, spills kills the register being stored.
...
llvm-svn: 34514
2007-02-23 01:09:11 +00:00
0416b204c9
remove obsolete file
...
llvm-svn: 34506
2007-02-22 23:48:43 +00:00
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
18fc09723c
Add support for changes in DwarfWriter.
...
llvm-svn: 34478
2007-02-21 22:47:38 +00:00
af76e0e58f
Add TAI field for exception table section.
...
llvm-svn: 34477
2007-02-21 22:43:40 +00:00
84a041eb98
ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer.
...
Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.
llvm-svn: 34470
2007-02-21 21:18:14 +00:00
8c8597c4d9
Fix typos in comments.
...
llvm-svn: 34456
2007-02-20 20:52:03 +00:00
b68a774fd9
How the heck did I forget patterns for llvm.x86.sse2.cmp.sd?
...
llvm-svn: 34434
2007-02-20 00:39:09 +00:00
b6d01caf22
Simplify some code by moving variable declarations into the only block that
...
uses them.
llvm-svn: 34432
2007-02-19 23:30:10 +00:00
421bad0dc5
Implement support for non-standard integer bit widths of any size. The
...
rules alignment is to pick the alignment that corresponds to the smallest
specified alignment that is larger than the bit width of the type or the
largest specified integer alignment if none are larger than the bitwidth
of the type. For the byte size, the size returned is the next larger
multiple of the alignment for that type (using the above rule). This patch
also changes bit widths from "short" to "uint32_t" to ensure there are
enough bits to specify any bit width that LLVM can handle (currently 2^23);
16-bits isn't enough.
llvm-svn: 34431
2007-02-19 22:35:00 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
9865be6d40
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
1f7d60262e
Fix ixaddrs as well, allowing ppc64 to compile to:
...
_test2:
li r2, 0
lis r3, 1
std r2, 9024(r3)
blr
instead of:
_test2:
lis r2, 1
li r3, 0
ori r2, r2, 9024
std r3, 0(r2)
blr
This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2
llvm-svn: 34373
2007-02-17 06:57:26 +00:00
4a9c0bb147
Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to:
...
_test:
lis r2, 743
li r3, 0
stw r3, 32751(r2)
blr
instead of:
_test:
li r2, 0
stw r2, 32751(48693248)
blr
Implement support for ppc64 as well, allowing it to produce better code.
llvm-svn: 34371
2007-02-17 06:44:03 +00:00
04eb16b415
Do not dereference invalid ranges. Generalize targetdata alignment model.
...
This fixes the UnitTests/Vector/sumarray-dbl regressions.
llvm-svn: 34358
2007-02-17 00:41:42 +00:00
dc64b9d379
Fix CodeGen/PowerPC/2007-02-16-AlignPacked.ll
...
llvm-svn: 34356
2007-02-16 23:11:51 +00:00
e4ff249d26
Remove an unnecessary predicate.
...
Patch by Scott Michel.
llvm-svn: 34354
2007-02-16 22:42:40 +00:00
f9122c4512
simplify some code, ensure that packed structures get abi alignment of 1.
...
llvm-svn: 34352
2007-02-16 22:25:34 +00:00
8091f28d1a
fix incorrect encoding of vminsw.
...
llvm-svn: 34351
2007-02-16 21:20:09 +00:00
b8d6fa20bb
This was done recently
...
llvm-svn: 34338
2007-02-16 02:11:59 +00:00
03d4a8a368
For PR1195:
...
PACKED_ALIGN -> VECTOR_ALIGN
llvm-svn: 34330
2007-02-15 22:07:05 +00:00
40aa2fdac6
For PR1202:
...
Make sure we found an existing Alignment before overwriting it.
llvm-svn: 34308
2007-02-15 18:34:36 +00:00
14edd1989b
Use BitVector instead of vector<bool> which can be extremely slow.
...
llvm-svn: 34302
2007-02-15 05:59:24 +00:00
09575bac2e
For PR1195:
...
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.
llvm-svn: 34300
2007-02-15 03:39:18 +00:00
d84d35ba70
For PR1195:
...
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.
llvm-svn: 34293
2007-02-15 02:26:10 +00:00
dad84a7c02
Fixed packed structure breakage from earlier TargetData patch; applied
...
Chris Lattner's code style suggestions.
Patch by Scott Michel!
llvm-svn: 34292
2007-02-15 02:11:06 +00:00
945e437c65
Generalize TargetData strings, to support more interesting forms of data.
...
Patch by Scott Michel.
llvm-svn: 34266
2007-02-14 05:52:17 +00:00
6719d3d0a2
Well this isn't as ugly and it works better. At least gcc bootstraps again
...
llvm-svn: 34254
2007-02-13 23:41:16 +00:00
09a32e42bd
add a note
...
llvm-svn: 34249
2007-02-13 21:44:43 +00:00
50c6a8c3a1
Add space between // and the comment.
...
llvm-svn: 34246
2007-02-13 20:06:15 +00:00
048e16ff8f
Add ABI information to ARM subtarget.
...
llvm-svn: 34245
2007-02-13 19:52:28 +00:00
603f201cba
According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned.
...
llvm-svn: 34241
2007-02-13 14:07:13 +00:00
44e9472fc6
more notes
...
llvm-svn: 34204
2007-02-12 21:20:26 +00:00
b5c89c8d2d
add a note
...
llvm-svn: 34202
2007-02-12 20:26:34 +00:00
fed6f0e571
Switch LayoutInfo to be a DenseMap instead of an std::map. This speeds up
...
-load-vn -gcse by 2.3%.
llvm-svn: 34160
2007-02-10 20:26:17 +00:00
22206711c9
add a typedef
...
llvm-svn: 34159
2007-02-10 20:18:06 +00:00
e472f9c4dc
eliminate the std::vector from StructLayout, allocating the elements immediately
...
after the StructLayout object in memory. This marginally improves locality,
speeding up -load-vn -gcse by ~0.8%.
llvm-svn: 34158
2007-02-10 20:15:41 +00:00
b84892d2d2
encapsulate the rest of the StructLayout members.
...
llvm-svn: 34157
2007-02-10 19:59:22 +00:00
c473d8e431
Privatize StructLayout::MemberOffsets, adding an accessor
...
llvm-svn: 34156
2007-02-10 19:55:17 +00:00
1e692e823c
Use ManagedStatic to manage LayoutInfo, instead of rolling our own.
...
llvm-svn: 34154
2007-02-10 19:43:18 +00:00
336e3962ff
Change TargetData::getIndexedOffset interface to not require indices
...
in a vector.
llvm-svn: 34153
2007-02-10 19:33:15 +00:00
540f5e0d41
These vectors are frequently large. Use std::vector instead.
...
llvm-svn: 34109
2007-02-09 23:59:14 +00:00
8b7700f146
Add reference counting to constantpool entries. Delete the unused ones.
...
llvm-svn: 34105
2007-02-09 20:54:44 +00:00
c9088b4c8e
add a note
...
llvm-svn: 34101
2007-02-09 17:38:01 +00:00
ba52b94fa2
Remove fixed item
...
llvm-svn: 34081
2007-02-09 04:19:54 +00:00
f76bb63555
This is done.
...
llvm-svn: 34072
2007-02-08 23:53:38 +00:00
9a4a1515ee
return addresses, those I already have
...
llvm-svn: 34056
2007-02-08 17:37:41 +00:00
e796b6de45
Fixed comments.
...
llvm-svn: 34040
2007-02-08 06:05:08 +00:00
2aa9a42f24
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
...
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
llvm-svn: 34034
2007-02-08 01:39:44 +00:00
59889ae93f
Added new method to add a "simple" code emitter. That is, to only add
...
the code emitter and not set variables.
llvm-svn: 34033
2007-02-08 01:38:33 +00:00
4e8ad36338
Dead files. Functionality has been taken over by the Add*Writer functions.
...
llvm-svn: 34029
2007-02-08 01:32:51 +00:00
2ff4c973b1
isLowRegister() expects input is a physical register.
...
llvm-svn: 34013
2007-02-07 21:44:33 +00:00
cca9b1d768
Rename.
...
llvm-svn: 34011
2007-02-07 21:24:09 +00:00
ec4c67f0a7
If sp offset will be materialized in a register. Clear the offset field of str / ldr.
...
llvm-svn: 34010
2007-02-07 21:19:58 +00:00
62aef236de
Get rid of references to iostream.
...
llvm-svn: 34009
2007-02-07 21:18:32 +00:00
b216ea1aa6
New entry.
...
llvm-svn: 34000
2007-02-07 09:22:15 +00:00
78c5a9422d
In thumb mode, R3 is reserved, but it can be live in to the function. If
...
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!
llvm-svn: 33999
2007-02-07 09:17:36 +00:00
2ff0d3a2ab
Update
...
llvm-svn: 33998
2007-02-07 08:37:57 +00:00
b5519b5361
- If fp (r7) is used to reference stack objects, use [r, r] address mode.
...
- If there is a dynamic alloca, in the epilogue, restore the value of sp
using r7 - offset.
- Other bug fixes.
llvm-svn: 33997
2007-02-07 08:37:31 +00:00
12cf8ddaea
eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's.
...
llvm-svn: 33975
2007-02-07 02:44:23 +00:00
ec13f826a2
Spill / restore should avoid modifying the condition register.
...
llvm-svn: 33971
2007-02-07 00:06:56 +00:00
a974031ebd
Select add FI, c correctly.
...
llvm-svn: 33960
2007-02-06 09:11:20 +00:00
ea3308aef0
foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers.
...
llvm-svn: 33958
2007-02-06 06:13:29 +00:00
2fc792f86b
eliminateFrameIndex() bug when frame pointer is used as base register.
...
llvm-svn: 33945
2007-02-06 00:23:31 +00:00
650d0672f7
- Store val, [sp, c] must be selected to tSTRsp.
...
- If c does not fit in the offset field, materialize sp + c into a register
using tADDhirr.
llvm-svn: 33944
2007-02-06 00:22:06 +00:00
92b50800f6
Although targets are not required to support integers > 64bits, TargetData
...
must in order for backends that do want to support large integer types to be
able to function. Consequently, don't assert if the bitwidth > 64 bits
when computing the size and alignment. Instead, compute the size by rounding
up to the next even number of bytes for the size. Compute the alignment
as the same as the LongABIAlignment. These provide reasonable defaults
that the target can override.
llvm-svn: 33943
2007-02-05 23:51:43 +00:00
3aaaa0b2bd
For PR411:
...
This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.
llvm-svn: 33918
2007-02-05 20:47:22 +00:00
fe8c530d79
Fix a miscompilation in the addr mode code trying to implement X | C and
...
X + C to promote LEA formation. We would incorrectly apply it in some cases
(test) and miss it in others.
This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll
llvm-svn: 33884
2007-02-04 20:18:17 +00:00
456db39ea9
ARM callseq_end should have a input flag operand so it would be scheduled right after the call.
...
llvm-svn: 33832
2007-02-03 09:11:58 +00:00
4b6c8f7f5e
Fix comments.
...
llvm-svn: 33831
2007-02-03 08:53:01 +00:00
a883f55eca
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
2c350921e2
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
c85e32c730
Put destructor out-of-line.
...
llvm-svn: 33817
2007-02-03 02:40:10 +00:00
36d559d369
- Branch max. displacement calculation bug.
...
- Add debugging info.
llvm-svn: 33811
2007-02-03 02:08:34 +00:00
b739f7d337
bugfix: SP isn't resetted when function has FP and there is no spills.
...
llvm-svn: 33800
2007-02-02 23:08:40 +00:00
f089c99f1d
Another thumb large stack offset codegen bug.
...
llvm-svn: 33795
2007-02-02 21:08:39 +00:00
d9d94700a4
Use MBB.empty() instead of MBB.size() for speed.
...
llvm-svn: 33789
2007-02-02 19:09:19 +00:00
3ad22567b3
Watch out for empty BB.
...
llvm-svn: 33788
2007-02-02 18:49:02 +00:00
fda6550545
Ugh. Only meant to do this in thumb mode.
...
llvm-svn: 33780
2007-02-02 08:58:48 +00:00
2d5b4ac38f
add a note
...
llvm-svn: 33778
2007-02-02 04:36:46 +00:00
2341c22ec7
Changes to support making the shift instructions be true BinaryOperators.
...
This feature is needed in order to support shifts of more than 255 bits
on large integer types. This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
shl i32 %X, 1
instead of
shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.
llvm-svn: 33776
2007-02-02 02:16:23 +00:00
48b094d9dd
Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant.
...
llvm-svn: 33775
2007-02-02 01:53:26 +00:00
9b9e4ae796
Thumb does not have clz.
...
llvm-svn: 33773
2007-02-01 23:34:03 +00:00
2c355da986
Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll)
...
llvm-svn: 33763
2007-02-01 21:43:53 +00:00
fd522996c8
Pasto. Lots of it.
...
llvm-svn: 33762
2007-02-01 20:44:52 +00:00
903e01d407
Fix .thumb_func directive on linux.
...
llvm-svn: 33759
2007-02-01 18:25:34 +00:00
c3de9b4b14
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
f9a4c690de
- Off by one bugs in maximum displacement calculation / testing.
...
- In thumb mode, a new constpool island BB size should be 4 + 2 to
compensate for the potential padding due to alignment requirement.
llvm-svn: 33753
2007-02-01 10:16:15 +00:00
1b4e6015b4
Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only
...
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144
llvm-svn: 33752
2007-02-01 08:39:52 +00:00
06736d0f88
.set pc relative displacement bug: label should be moved down one instruction
...
to just before the add r1, pc:
Before:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
Now:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
mov r1, #PCRELV0
LPCRELL0:
add r1, pc
llvm-svn: 33744
2007-02-01 03:04:49 +00:00
0df1536173
Add a note.
...
llvm-svn: 33743
2007-02-01 02:46:20 +00:00
e724492566
Also set alignment of stack-based structs to 4 in thumb mode.
...
llvm-svn: 33741
2007-02-01 02:18:36 +00:00
e7e966de5e
Special epilogue for vararg functions. We cannot do a pop to pc because
...
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
pop {r4, r5, r6, r7}
pop {r3}
add sp, #3 * 4
bx r3
llvm-svn: 33739
2007-02-01 01:49:46 +00:00
234e031e36
Pessmistically assume the .align 2 before the first constpool entry adds
...
two bytes padding.
llvm-svn: 33734
2007-02-01 01:09:47 +00:00
29f920877d
Possible JT improvements.
...
llvm-svn: 33733
2007-02-01 01:07:48 +00:00
f7937005a3
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
ed81dea45b
Don't emit unnecessary .align directive.
...
llvm-svn: 33729
2007-01-31 23:39:39 +00:00
e5c19993cd
Handle an interesting corner case: the constpool_entry being reference is two
...
instructions away, i.e. its address is equal to PC.
%r0 = tLDRpci <cp#0>
bx
CONSTPOOL_ENTRY 0 <cp#0>, 4
llvm-svn: 33728
2007-01-31 23:35:18 +00:00
b0ff625a31
Don't want to add FramePtr to callee save spill list twice.
...
llvm-svn: 33727
2007-01-31 23:17:29 +00:00
6f1c20a8e6
Darwin ABI requires FP to point to stack slot of prev FP.
...
llvm-svn: 33724
2007-01-31 22:25:33 +00:00
2e309b15a7
Add entry.
...
llvm-svn: 33723
2007-01-31 22:11:38 +00:00
1c5837dc4a
Thumb add sp, #imm requires the immediate value be multiple of 4. For now,
...
change preferred alignment of short, byte, bool to 4.
llvm-svn: 33722
2007-01-31 22:08:40 +00:00
ffe1d9f7fa
Update comment.
...
llvm-svn: 33721
2007-01-31 22:06:44 +00:00
d7e39eb443
Dead comment.
...
llvm-svn: 33719
2007-01-31 21:31:25 +00:00
0584836340
Thumb asm syntax does not want 's' suffix for flag setting opcodes.
...
llvm-svn: 33717
2007-01-31 20:12:31 +00:00
1f3fc4b3f0
When determining whether a pc relative branch / load displacement fits in the
...
instruction field, adjust it for PC value (4 for thumb, 8 for arm).
llvm-svn: 33711
2007-01-31 19:57:44 +00:00
37ebf9317b
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
7169bd8784
Some comments.
...
llvm-svn: 33707
2007-01-31 18:29:27 +00:00
456928bbbc
ConstPool island bug: watch out for cases where UserMI is the last MI of the BB.
...
llvm-svn: 33706
2007-01-31 18:19:07 +00:00
7ae4f5599e
ARM fix: Miscompilation when frame pointer can't be eliminated. Uninitialized frame pointer register is used.
...
llvm-svn: 33703
2007-01-31 13:12:46 +00:00
143576ddd2
Specify the right CC for comparison libcalls.
...
llvm-svn: 33702
2007-01-31 09:30:58 +00:00
491fcdb49b
Observe -soft-float.
...
llvm-svn: 33699
2007-01-31 08:40:13 +00:00
345877e77c
- Added Thumb constpool island support.
...
- Islands are inserted right after the user MI since thumb LDR cannot encode
negative offset.
llvm-svn: 33690
2007-01-31 02:22:22 +00:00
dd7a688bb8
During PEI, if the immediate value of sp + offset is too large (i.e. something
...
that would require > 3 instructions to materialize), load the immediate from a
constpool entry.
llvm-svn: 33667
2007-01-30 23:01:46 +00:00
83f35170fa
- Fix codegen for pc relative constant (e.g. JT) in thumb mode:
...
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
add r1, pc, #PCRELV0
This is not legal since add r1, pc, #c requires the constant be a multiple of 4.
Do the following instead:
.set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
mov r1, #PCRELV0
add r1, pc
- In thumb mode, it's not possible to use .set generate a pc relative stub
address. The stub is ARM code which is in a different section from the thumb
code. Load the value from a constpool instead.
- Some asm printing clean up.
llvm-svn: 33664
2007-01-30 20:37:08 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
95b85e34ff
Copy and paste bug.
...
llvm-svn: 33658
2007-01-30 08:22:33 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
ce8fa3ed83
Misseed thumb jumptable branch.
...
llvm-svn: 33656
2007-01-30 08:03:06 +00:00
e43ca022bf
In thumb mode, round up stack frame size to multiple of 4 since add/sub
...
sp, imm instructions implicitly multiply the offset by 4.
llvm-svn: 33653
2007-01-30 02:57:02 +00:00
c419d983d6
Thumb eliminateFrameIndex fixes.
...
llvm-svn: 33652
2007-01-30 02:36:01 +00:00
1cd3c0efb8
Change the operand orders to t_addrmode_s* to make it easier to morph
...
instructions that use these address modes to instructions that use
t_addrmode_sp.
llvm-svn: 33651
2007-01-30 02:35:32 +00:00
7fa6964dc2
- In thumb mode, if size of MachineFunction is >= 2048, force LR to be
...
spilled (if it is not already).
- If LR is spilled, use BL to implement far jumps. LR is not used as a GPR
in thumb mode so it can be clobbered if it is properly spilled / restored
in prologue / epilogue.
- If LR is force spilled but no far jump has been emitted, try undo'ing the
spill by:
push lr -> delete
pop pc -> bx lr
llvm-svn: 33650
2007-01-30 01:18:38 +00:00
863736b0ad
Use BL to implement Thumb far jumps.
...
llvm-svn: 33649
2007-01-30 01:13:37 +00:00
760c68b8af
Factor GetInstSize() out of constpool island pass.
...
llvm-svn: 33644
2007-01-29 23:45:17 +00:00
3f9f250928
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
e3b09fbbb0
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
52726f5837
rename flag
...
llvm-svn: 33634
2007-01-29 22:40:03 +00:00
8953edc8a5
Comment.
...
llvm-svn: 33633
2007-01-29 22:23:02 +00:00
43e8518d8b
Remember if LR register has been spilled in this function.
...
llvm-svn: 33632
2007-01-29 22:22:24 +00:00
b8d8b82950
Save all registers by default, as they can be used to pass parameters
...
for "inreg" calls
llvm-svn: 33631
2007-01-29 21:28:01 +00:00
17f250005a
Update some of the llvm in the readme
...
llvm-svn: 33630
2007-01-29 21:21:22 +00:00
d1154860a4
Flag to control exception handling.
...
llvm-svn: 33628
2007-01-29 20:48:32 +00:00
b4a2f05d1c
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
1e960cd4fd
Implement use of new IntrinsicLowering interface.
...
llvm-svn: 33619
2007-01-29 17:51:02 +00:00
0c49722b36
Fix compile error "jump to case label crosses initialization".
...
What compiler are people using that accepts this code?
llvm-svn: 33603
2007-01-28 15:39:16 +00:00
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
fa663eec17
Make d'tor out-of-line.
...
llvm-svn: 33585
2007-01-27 11:40:32 +00:00
c1f1035518
Return an X86ELFWriterInfo object.
...
llvm-svn: 33574
2007-01-27 02:56:16 +00:00
2bab162501
X86 implementation of the TargetELFWriterInfo class.
...
llvm-svn: 33571
2007-01-27 02:54:30 +00:00
0cd49bc8a2
New entry.
...
llvm-svn: 33569
2007-01-27 02:33:22 +00:00
0701c5a074
Thumb jumptable support.
...
llvm-svn: 33568
2007-01-27 02:29:45 +00:00
f40b9006a8
Thumb add / sub with carry.
...
llvm-svn: 33562
2007-01-27 00:07:15 +00:00
7d47719af0
Some asm directives fixes for ELF.
...
Now we can compile llvm-gcc on arm-linux-gnueabi!
llvm-svn: 33558
2007-01-26 23:24:43 +00:00
debcb5530c
Fix a spelling error
...
llvm-svn: 33556
2007-01-26 22:40:50 +00:00
f209495e93
Handle multiple functions, properly mangle symbols, and fix support for
...
scattered relocations.
llvm-svn: 33555
2007-01-26 22:39:48 +00:00
add7f164a1
Represent tADDspi and tSUBspi as two-address instructions.
...
llvm-svn: 33551
2007-01-26 21:33:19 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
d45cd5eb81
Fix Data16bitsDirective for ELF.
...
llvm-svn: 33549
2007-01-26 21:20:45 +00:00
3c9dc6bd46
Conditional branch being fixed up is not the last MI in the BB, there is a
...
unconditional branch following it. Simply invert the condition and swap
destinations if the conditional branch can reach the destination of the
unconditional branch:
beq L1
b L2
=>
bne L2
b L1
llvm-svn: 33548
2007-01-26 20:38:26 +00:00
aa26c1ab9d
If the constant pool value is a extern weak symbol, emit the weak reference.
...
llvm-svn: 33543
2007-01-26 19:51:32 +00:00
d02d75c295
extload -> zextload
...
llvm-svn: 33542
2007-01-26 19:13:16 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
3ac38e99b9
For PR761:
...
The Module::setEndianness and Module::setPointerSize methods have been
removed. Instead you can get/set the DataLayout. Adjust thise accordingly.
llvm-svn: 33530
2007-01-26 08:11:39 +00:00
c4fbcb370b
For PR645:
...
Remove the Function::renameLocalSymbols function as it is no longer
needed.
llvm-svn: 33522
2007-01-26 08:01:30 +00:00
1e270b639d
SplitBlockBeforeInstr() insert a unconditional branch to the next BB. This
...
is unnecessary when we are fixing up a conditional branch since we will be
adding a unconditional branch to the destination of the original branch.
llvm-svn: 33517
2007-01-26 02:02:39 +00:00
db7f0591f3
Need to scan the function for branches even if there aren't any constants.
...
llvm-svn: 33515
2007-01-26 01:04:44 +00:00
1d138989f4
Forgot to update this.
...
llvm-svn: 33512
2007-01-25 23:31:04 +00:00
010ae386b8
Add comment, fix typo, reduce memory usage, etc.
...
llvm-svn: 33510
2007-01-25 23:18:59 +00:00
fa824b9f73
I am an idiot.
...
llvm-svn: 33509
2007-01-25 23:18:16 +00:00
313c2937f0
Fix comment.
...
llvm-svn: 33508
2007-01-25 22:48:25 +00:00
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
...
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
4f7d37fe04
Fix elf object definition.
...
llvm-svn: 33502
2007-01-25 20:11:04 +00:00
417260dc11
Doh. Skip JT branches.
...
llvm-svn: 33501
2007-01-25 19:43:52 +00:00
22c7cf504e
Added (preliminary) branch shortening capability to constantpool island pass.
...
llvm-svn: 33497
2007-01-25 03:12:46 +00:00
c1a1bd18e3
Getting rid uses of evil std::set<>
...
llvm-svn: 33496
2007-01-25 03:07:27 +00:00
e4bf50c451
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on X86. The %c modifier
...
says that no $ prefix should be emitted on X86.
llvm-svn: 33495
2007-01-25 02:53:24 +00:00
48518548bd
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on PPC
...
llvm-svn: 33494
2007-01-25 02:52:50 +00:00
c4bdea012b
FTOIT and ITOFT are bit converts, and if we drop 21264s, are always available
...
llvm-svn: 33492
2007-01-24 21:09:16 +00:00
7ad04830b1
Call frames for intel.
...
llvm-svn: 33490
2007-01-24 19:15:24 +00:00
5f24d10381
80 columns
...
llvm-svn: 33489
2007-01-24 18:50:57 +00:00
f6c63fec92
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
...
by value so that clean up is less confusing (these vectors tend to be small.)
llvm-svn: 33488
2007-01-24 18:45:13 +00:00
8a75518f0b
Fix unordered fp on alpha
...
llvm-svn: 33487
2007-01-24 18:43:14 +00:00
197aa9634e
Fix a misencoding of CBW and CWD. This fixes PR1030.
...
llvm-svn: 33486
2007-01-24 18:31:00 +00:00
1526ba50d9
Use PC relative ldr to load from a constantpool in Thumb mode.
...
llvm-svn: 33484
2007-01-24 08:53:17 +00:00
06a03210af
Make ivars private and use getters. Have the MachOWriter return "Mach-O
...
Writer" for the pass name.
llvm-svn: 33483
2007-01-24 07:13:56 +00:00
f5c96fabf9
Renamed getTypeAlignmentShift() to getPreferredTypeAlignmentShift().
...
llvm-svn: 33482
2007-01-24 07:03:39 +00:00
40cb811cf8
Add a field for and construction of the PPCMachOWriterInfo object.
...
llvm-svn: 33480
2007-01-24 03:41:36 +00:00
56f1058309
Move the getJTRelocation method out of here.
...
llvm-svn: 33479
2007-01-24 03:40:33 +00:00
a1b7b8a485
New "TargetMachOWriterInfo" class. It holds target-specific information
...
that the MachOWriter needs in order to do its writing stuff 'n things.
llvm-svn: 33475
2007-01-24 03:36:05 +00:00
8942551dee
Allow [ fi#c, imm ] as ARM load / store addresses.
...
llvm-svn: 33474
2007-01-24 02:45:25 +00:00
139edae4a2
Various Thumb mode load / store isel bug fixes.
...
llvm-svn: 33472
2007-01-24 02:21:22 +00:00
c0b7366cf9
- Reorg Thumb load / store instructions. Combine each rr and ri pair of
...
instructions into one (e.g. tLDRrr, tLDRri -> tLDR).
- Thumb ldrsb and ldrsh only have the [reg, reg] address format. If the
address is not an add, materialize a 0 immediate into a register and use
it as the offset field.
llvm-svn: 33470
2007-01-23 22:59:13 +00:00
2cfbcce102
Darwin HiddenDirective is .private_extern.
...
llvm-svn: 33465
2007-01-23 19:06:03 +00:00
6730e12ae4
PEI is now responsible for adding MaxCallFrameSize to frame size and align the stack. Each target can further adjust the frame size if necessary.
...
llvm-svn: 33460
2007-01-23 09:38:11 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
107015e2fa
ARM AAPCS abi (Linux, etc.) requires 8-byte double / long alignment; Mac
...
requires 4-bytes alignment.
llvm-svn: 33448
2007-01-22 23:13:01 +00:00
9f3a7eb9b2
Double and long preferred alignment set to 8 bytes.
...
llvm-svn: 33447
2007-01-22 23:11:06 +00:00
ca5fb6e4fc
Double and long preferred alignment is 8 byte.
...
llvm-svn: 33446
2007-01-22 23:09:50 +00:00
1efe904cd7
- getTypeAlignmentShift() should be returning preferred alignment, not ABI
...
alignment.
- getPreferredAlignmentLog(): remove Double special case.
llvm-svn: 33445
2007-01-22 23:08:19 +00:00
1281dc32ef
Linux GOT indirect reference is only necessary in PIC mode.
...
llvm-svn: 33441
2007-01-22 21:34:25 +00:00
4abf2e7bcc
Double and Long preferred alignment is 4 for Darwin, 8 for Linux.
...
llvm-svn: 33440
2007-01-22 21:24:13 +00:00
52189b5805
Use bl to call Thumb fuctions directly.
...
llvm-svn: 33433
2007-01-22 19:40:10 +00:00
71e123229c
add a note
...
llvm-svn: 33423
2007-01-21 07:03:37 +00:00
2239163496
Implement a getTypeSizeInBits method. This helps in transforms that want
...
to ensure the bit size of a type is identical before proceeding.
llvm-svn: 33413
2007-01-20 23:32:04 +00:00
e52a235e99
TargetData assumes (and some regression tests depend on it) that the size of
...
an unspecified datatype in the datalayout is capped by the size of a pointer.
llvm-svn: 33411
2007-01-20 23:07:13 +00:00
6e38094235
trivial cleanup
...
llvm-svn: 33410
2007-01-20 22:39:15 +00:00
50ee0e40e5
Teach TargetData to handle 'preferred' alignment for each target, and use
...
these alignment amounts to align scalars when we can. Patch by Scott Michel!
llvm-svn: 33409
2007-01-20 22:35:55 +00:00
e3d8e42e27
Round up stack to multiple of alignment only if it's a leaf function without alloca.
...
llvm-svn: 33401
2007-01-20 10:22:33 +00:00
706b6797a0
One more try...
...
llvm-svn: 33400
2007-01-20 10:17:53 +00:00
b268184363
Last check-in was bogus. There is no need to align the stack if the function is a leaf function (and without alloca).
...
llvm-svn: 33399
2007-01-20 10:11:56 +00:00
a9af4be5ac
Prologue and epilogue bugs for non-Darwin targets.
...
llvm-svn: 33390
2007-01-20 03:24:07 +00:00
aa24f08926
Clean up ARM PEI code.
...
llvm-svn: 33389
2007-01-20 02:09:25 +00:00
86468ccaf3
Backend is reponsible for aligning the stack.
...
llvm-svn: 33388
2007-01-20 02:08:16 +00:00
a94d394ad2
For PR1043:
...
This is the final patch for this PR. It implements some minor cleanup
in the use of IntegerType, to wit:
1. Type::getIntegerTypeMask -> IntegerType::getBitMask
2. Type::Int*Ty changed to IntegerType* from Type*
3. ConstantInt::getType() returns IntegerType* now, not Type*
This also fixes PR1120.
Patch by Sheng Zhou.
llvm-svn: 33370
2007-01-19 21:13:56 +00:00
77c15ded10
Code clean up. Use def : pat instead of defining new instructions.
...
llvm-svn: 33368
2007-01-19 20:27:35 +00:00
bf216c364f
isDarwin -> isTargetDarwin
...
llvm-svn: 33366
2007-01-19 19:28:01 +00:00
Chris Lattner