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6899 Commits

Author SHA1 Message Date
Dale Johannesen 32bc81341b eliminate unnecessary reset of SP in epilog on darwin 
llvm-svn: 34824
 2007-03-02 01:17:17 +00:00
Reid Spencer df30e2a68b Wrap a long line. 
llvm-svn: 34799
 2007-03-01 19:48:16 +00:00
Anton Korobeynikov af8be4458f Ensure that fastcall'ed function is correctly mangled & stack is 
properly aligned

llvm-svn: 34788
 2007-03-01 16:29:22 +00:00
Nicolas Geoffray 75ab9799df Implemented the frameaddress intrinsic for PPC. 
llvm-svn: 34787
 2007-03-01 13:11:38 +00:00
Evan Cheng 2c0fd3ee4c Use a spilled free callee-saved register as scratch register. 
llvm-svn: 34785
 2007-03-01 08:57:52 +00:00
Evan Cheng 6f059e3e0a - Track which callee-saved registers are spilled. 
- Some code clean up.

llvm-svn: 34783
 2007-03-01 08:26:31 +00:00
Evan Cheng 677bb3b460 Switch from std::vector<bool> to BitVector. 
llvm-svn: 34781
 2007-03-01 07:52:44 +00:00
Bill Wendling 65c75b57d4 Get rid of verboten <iostream> include. 
llvm-svn: 34777
 2007-03-01 06:05:39 +00:00
Dale Johannesen 962fa8eb9a Changes requested in review of last pass. Also pulled isThumb into a 
member, instead of resetting in every function that uses it.

llvm-svn: 34764
 2007-02-28 23:20:38 +00:00
Evan Cheng f6ca943638 Doh. ARM::PC is obvious a reserved register. 
llvm-svn: 34763
 2007-02-28 23:12:34 +00:00
Dale Johannesen 440995bd9a Add intelligence about where to break large blocks. 
llvm-svn: 34755
 2007-02-28 18:41:23 +00:00
Chris Lattner 7373f3a351 remove dead option 
llvm-svn: 34754
 2007-02-28 18:39:53 +00:00
Chris Lattner eb09e28ccc bugfix: fastcall does not require the first two params to be marked 'inreg', 
they always get registers.

llvm-svn: 34748
 2007-02-28 18:35:11 +00:00
Nate Begeman e0232ec706 More Mach-O writer improvements. 
llvm-svn: 34740
 2007-02-28 07:40:50 +00:00
Chris Lattner 152bfa103e use high-level functions in CCState 
llvm-svn: 34739
 2007-02-28 07:09:55 +00:00
Chris Lattner 227b6c5d19 make use of helper functions in CCState for analyzing formals and calls. 
llvm-svn: 34737
 2007-02-28 07:00:42 +00:00
Chris Lattner d439e86078 switch LowerFastCCCallTo over to using the new fastcall description. 
llvm-svn: 34734
 2007-02-28 06:26:33 +00:00
Chris Lattner 66e1d1dd7e switch LowerFastCCArguments over to using the autogenerated Fastcall description. 
llvm-svn: 34733
 2007-02-28 06:21:19 +00:00
Chris Lattner 0bc74fd6cc add new CC_X86_32_FastCall calling conv, which describes fastcall on win32. 
Factor out a CC_X86_32_Common convention, which is the part shared between
ccc, stdcall and fastcall

llvm-svn: 34732
 2007-02-28 06:20:01 +00:00
Chris Lattner 3066beccb5 rearrange code 
llvm-svn: 34731
 2007-02-28 06:10:12 +00:00
Chris Lattner 3ed3be3b4a remove fastcc (not fastcall) support 
llvm-svn: 34730
 2007-02-28 06:05:16 +00:00
Chris Lattner b9db225049 switch LowerCCCArguments over to using autogenerated CC. 
llvm-svn: 34729
 2007-02-28 05:46:49 +00:00
Chris Lattner 5958b176f3 simplify sret handling 
llvm-svn: 34728
 2007-02-28 05:39:26 +00:00
Chris Lattner be7995953a switch LowerCCCCallTo over to using an autogenerated callingconv 
llvm-svn: 34727
 2007-02-28 05:31:48 +00:00
Chris Lattner 0c0a7b288e rename stuff 
llvm-svn: 34726
 2007-02-28 05:30:29 +00:00
Chris Lattner 6f287c6e92 rename some CCActions, add CCIfInReg 
llvm-svn: 34725
 2007-02-28 05:29:33 +00:00
Chris Lattner ba3d273122 switch return value passing and the x86-64 calling convention information 
over to being autogenerated from the X86CallingConv.td file.

llvm-svn: 34722
 2007-02-28 04:55:35 +00:00
Chris Lattner 659ca56383 make subtarget references work. 
llvm-svn: 34721
 2007-02-28 04:51:41 +00:00
Evan Cheng e8af69632f Make requiresRegisterScavenging determination on a per MachineFunction basis. 
llvm-svn: 34711
 2007-02-28 00:59:19 +00:00
Evan Cheng 9049cd72e6 Temporary: make R12 available in ARM mode if RegScavenger is being used. 
llvm-svn: 34709
 2007-02-28 00:22:44 +00:00
Evan Cheng 30508919c8 Start making use of RegScavenger. 
llvm-svn: 34708
 2007-02-28 00:21:58 +00:00
Evan Cheng 95ae95a6a6 PEI now passes a RegScavenger ptr to eliminateFrameIndex. 
llvm-svn: 34707
 2007-02-28 00:21:17 +00:00
Evan Cheng ee8aca0cfa Minor tweak. Allocate r0 to r3 in reverse order, r3 is least likely to be livein to a function. 
llvm-svn: 34701
 2007-02-27 23:03:55 +00:00
Chris Lattner c5e2a3a80e reenable generation of CC info 
llvm-svn: 34699
 2007-02-27 22:12:19 +00:00
Evan Cheng 6f0969ecb9 Back out previous commit temporarily. 
llvm-svn: 34694
 2007-02-27 21:47:22 +00:00
Evan Cheng 71a7271b8b Let MRegisterInfo now owns RegScavenger; eliminateFrameIndex must preserve register kill info. 
llvm-svn: 34692
 2007-02-27 21:12:35 +00:00
Chris Lattner aeb9ebe3cf implement CCMatchIfCC in terms of CCMatchIf 
llvm-svn: 34685
 2007-02-27 20:45:02 +00:00
Chris Lattner 98c9bd586e build cc info 
llvm-svn: 34684
 2007-02-27 20:44:31 +00:00
Chris Lattner 2ebb2e99d1 a note 
llvm-svn: 34670
 2007-02-27 17:21:09 +00:00
Nicolas Geoffray b524dfd557 Fix parenthesis for BCTRL_{ELF|Macho} test. 
llvm-svn: 34668
 2007-02-27 13:10:41 +00:00
Nicolas Geoffray 89d81878d2 Differentiate between the MachO and the ELF ABI the CALL instruction. 
llvm-svn: 34667
 2007-02-27 13:01:19 +00:00
Jim Laskey b6e200bd68 Duplicate use of LR, take 2. 
llvm-svn: 34666
 2007-02-27 11:55:45 +00:00
Chris Lattner fa9227ed54 Add calling convention info 
llvm-svn: 34661
 2007-02-27 06:59:52 +00:00
Chris Lattner db2049fb8e move target independent calling convention stuff to TargetCallingConv.td 
llvm-svn: 34659
 2007-02-27 05:57:32 +00:00
Chris Lattner 4c83b98604 fill in some holes 
llvm-svn: 34658
 2007-02-27 05:51:05 +00:00
Chris Lattner c9eed39a5d switch x86-64 return value lowering over to using same mechanism as argument 
lowering uses.

llvm-svn: 34657
 2007-02-27 05:28:59 +00:00
Chris Lattner 9f059194a7 Minor refactoring of CC Lowering interfaces 
llvm-svn: 34656
 2007-02-27 05:13:54 +00:00
Chris Lattner dc3adc83e7 move CC Lowering stuff to its own public interface 
llvm-svn: 34655
 2007-02-27 04:43:02 +00:00
Chris Lattner 2e5e8407ad refactor x86-64 argument lowering yet again, this time eliminating templates, 
'clients', etc, and adding CCValAssign instead.

llvm-svn: 34654
 2007-02-27 04:18:15 +00:00
Evan Cheng 5d7ce57c13 Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping 
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29

llvm-svn: 34652
 2007-02-27 02:55:29 +00:00
Chris Lattner 535bd6d3ba always lower to RETFLAG, never leave it as just ret. 
llvm-svn: 34639
 2007-02-26 19:44:02 +00:00
Chris Lattner 77f0a1553c fix attribution 
llvm-svn: 34637
 2007-02-26 18:56:07 +00:00
Chris Lattner 5d00a0b8a9 Add a description of the X86-64 calling convention and the return 
conventions.  This doesn't do anything yet, but may in the future.

llvm-svn: 34636
 2007-02-26 18:17:14 +00:00
Chris Lattner ff19957468 switch to smallvector 
llvm-svn: 34633
 2007-02-26 07:59:53 +00:00
Chris Lattner 294780829a initial hack at splitting the x86-64 calling convention info out from the 
mechanics that process it.  I'm still not happy with this, but it's a step
in the right direction.

llvm-svn: 34631
 2007-02-26 07:50:02 +00:00
Chris Lattner d41bff0f97 the truncate must always be done, it's only the assert that is conditional. 
llvm-svn: 34628
 2007-02-26 05:21:05 +00:00
Chris Lattner 74f5bcf8eb add an accessor. 
llvm-svn: 34625
 2007-02-26 04:01:25 +00:00
Chris Lattner 1db979bae8 in X86-64 CCC, i8/i16 arguments are already properly zext/sext'd on input. 
Capture this so that downstream zext/sext's are optimized out.  This
compiles:
  int test(short X) { return (int)X; }

to:

_test:
        movl %edi, %eax
        ret

instead of:

_test:
        movswl %di, %eax
        ret


GCC produces this bizarre code:

_test:
        movw    %di, -12(%rsp)
        movswl  -12(%rsp),%eax
        ret

llvm-svn: 34623
 2007-02-26 03:18:56 +00:00
Chris Lattner 8924332e22 Fix an X86-64 abi bug. We now compile: 
void foo(short);
void bar(unsigned short A) {
  foo(A);
}

into:

_bar:
        subq $8, %rsp
        movswl %di, %edi
        call _foo
        addq $8, %rsp
        ret

instead of:

_bar:
        subq $8, %rsp
        call _foo
        addq $8, %rsp
        ret

Testcase here: test/CodeGen/X86/x86-64-shortint.ll

llvm-svn: 34615
 2007-02-25 23:10:46 +00:00
Chris Lattner 3e0703357f fix CodeGen/X86/2007-02-25-FastCCStack.ll, a regression from my patch last 
night:  fastcc returns should only go in XMM0 if we have SSE2 or above.

llvm-svn: 34613
 2007-02-25 22:23:46 +00:00
Chris Lattner 1ee61ab414 no really, this is the right patch 
llvm-svn: 34605
 2007-02-25 20:01:40 +00:00
Chris Lattner 4d2f5f8740 always promote float varargs to double. 
llvm-svn: 34604
 2007-02-25 19:59:18 +00:00
Chris Lattner 84ab9a556c one important bugfix: PPC32 didn't have both elf and macho support for 
external symbols and global addresses.  Add the missing ones.

one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.

llvm-svn: 34601
 2007-02-25 19:20:53 +00:00
Dale Johannesen c2f3d015e0 cosmetic changes from review of last patch. obvious 
llvm-svn: 34598
 2007-02-25 18:31:31 +00:00
Chris Lattner fcee9b5568 fastcc functions that return double values now return them in xmm0 on x86-32. 
This implements CodeGen/X86/fp-stack-ret.ll:test[23]

llvm-svn: 34592
 2007-02-25 09:31:16 +00:00
Chris Lattner 9d9cc84f5b allow vectors to be passed to stdcall/fastcall functions 
llvm-svn: 34590
 2007-02-25 09:14:25 +00:00
Chris Lattner 2fc0d70392 move LowerRET into the 'Return Value Calling Convention Implementation' 
section of the file.

llvm-svn: 34589
 2007-02-25 09:12:39 +00:00
Chris Lattner ba474f58a4 make all Lower*CallTo implementations use LowerCallResult to handle their 
result value stuff.  This eliminates a bunch of duplicated code and now
GetRetValueLocs is the sole place that decides where a value is returned.

llvm-svn: 34588
 2007-02-25 09:10:05 +00:00
Chris Lattner 7802f3e2ea pass the calling convention into Lower*CallTo, instead of using ad-hoc flags. 
llvm-svn: 34587
 2007-02-25 09:06:15 +00:00
Chris Lattner 0cd9960fe7 factor a bunch of code out of LowerCCCCallTo into a new LowerCallResult 
function.  This function now uses GetRetValueLocs to determine *where*
the result values are located and concerns itself with *how* to pull the
values out.

llvm-svn: 34586
 2007-02-25 08:59:22 +00:00
Chris Lattner 3c76309a5b move some code around, pass in calling conv, even though it is unused 
llvm-svn: 34585
 2007-02-25 08:29:00 +00:00
Chris Lattner dfda38f7dc simplify result value lowering by splitting the selection of *where* to return 
registers out from the logic of *how* to return them.

This changes X86-64 to mark EAX live out when returning a 32-bit value,
where before it marked RAX liveout.

llvm-svn: 34582
 2007-02-25 08:15:11 +00:00
Chris Lattner d6b853ad1b make void-return not a special case 
llvm-svn: 34579
 2007-02-25 07:18:38 +00:00
Chris Lattner 35a08551a5 eliminate a bunch more temporary vectors from X86 lowering. 
llvm-svn: 34578
 2007-02-25 07:10:00 +00:00
Chris Lattner e56fef9b51 eliminate temporary vectors created during X86 lowering. 
llvm-svn: 34577
 2007-02-25 06:40:16 +00:00
Chris Lattner 84141d4e99 remove std::vector's in RET lowering. 
llvm-svn: 34576
 2007-02-25 06:21:57 +00:00
Chris Lattner 43df5b335c implement support for the linux/ppc function call ABI. Patch by 
Nicolas Geoffray!

llvm-svn: 34574
 2007-02-25 05:34:32 +00:00
Chris Lattner b9bd34f54a Add XLForm_1_ext template, patch by Nicolas Geoffray. 
llvm-svn: 34573
 2007-02-25 05:07:49 +00:00
Chris Lattner 249edb8b67 Improve JIT support for linux/ppc: Patch by Nicolas Geoffray! 
llvm-svn: 34572
 2007-02-25 05:04:13 +00:00
Dale Johannesen e80e31eada remove crediting of Evan Cheng and me. 
llvm-svn: 34568
 2007-02-25 01:42:36 +00:00
Dale Johannesen 01ee5750f4 Removed WaterListOffset, inserted BBOffsets. Remove TODO item about this 
from README.
When no water available, use end of block if in range.  (More to do here.)

llvm-svn: 34563
 2007-02-25 00:47:03 +00:00
Bill Wendling 77a345f000 PR1164: 
Generate local names with a "llvm_cbe_" prefix using the actual name of the
variable instead of a temporary name.

llvm-svn: 34540
 2007-02-23 22:45:08 +00:00
Lauro Ramos Venancio 0eb70ebbe5 bugfix: SP wasn't updated for varargs when frame pointer was eliminated. 
llvm-svn: 34537
 2007-02-23 21:53:48 +00:00
Jim Laskey 2f28a3cf08 Don't spill LR as a callee saved register. 
llvm-svn: 34533
 2007-02-23 20:34:16 +00:00
Lauro Ramos Venancio 3e906c48d3 Fix stack alignment in functions with varargs. 
llvm-svn: 34532
 2007-02-23 20:32:57 +00:00
Dale Johannesen e18b13b213 rewrite of constant islands 
llvm-svn: 34523
 2007-02-23 05:02:36 +00:00
Evan Cheng 9f8301413c Added -march=thumb; removed -enable-thumb. 
llvm-svn: 34521
 2007-02-23 03:14:31 +00:00
Evan Cheng d00d344519 80 col. violation. 
llvm-svn: 34520
 2007-02-23 03:03:16 +00:00
Anton Korobeynikov 01b49ce415 External weak linkage is supported by recent binutils on mingw32. 
llvm-svn: 34519
 2007-02-23 01:58:50 +00:00
Evan Cheng df5899258c By default, spills kills the register being stored. 
llvm-svn: 34515
 2007-02-23 01:10:04 +00:00
Evan Cheng 15af662314 Add option to turn on register scavenger; By default, spills kills the register being stored. 
llvm-svn: 34514
 2007-02-23 01:09:11 +00:00
Chris Lattner 0416b204c9 remove obsolete file 
llvm-svn: 34506
 2007-02-22 23:48:43 +00:00
Jim Laskey e0008e23cf Simplify lowering and selection of exception ops. 
llvm-svn: 34488
 2007-02-22 14:56:36 +00:00
Jim Laskey 3796abea0f Support to provide exception and selector registers. 
llvm-svn: 34482
 2007-02-21 22:54:50 +00:00
Jim Laskey 18fc09723c Add support for changes in DwarfWriter. 
llvm-svn: 34478
 2007-02-21 22:47:38 +00:00
Jim Laskey af76e0e58f Add TAI field for exception table section. 
llvm-svn: 34477
 2007-02-21 22:43:40 +00:00
Evan Cheng 84a041eb98 ELF / PIC requires GOT be in the EBX register during calls via PLT GOT pointer. 
Add implicit uses of EBX to calls to ensure liveintervalanalysis does not treat
the GOT in EBX move as dead upon definition.
This should fix PR1207.

llvm-svn: 34470
 2007-02-21 21:18:14 +00:00
Dan Gohman 8c8597c4d9 Fix typos in comments. 
llvm-svn: 34456
 2007-02-20 20:52:03 +00:00
Evan Cheng b68a774fd9 How the heck did I forget patterns for llvm.x86.sse2.cmp.sd? 
llvm-svn: 34434
 2007-02-20 00:39:09 +00:00
Reid Spencer b6d01caf22 Simplify some code by moving variable declarations into the only block that 
uses them.

llvm-svn: 34432
 2007-02-19 23:30:10 +00:00
Reid Spencer 421bad0dc5 Implement support for non-standard integer bit widths of any size. The 
rules alignment is to pick the alignment that corresponds to the smallest
specified alignment that is larger than the bit width of the type or the
largest specified integer alignment if none are larger than the bitwidth
of the type. For the byte size, the size returned is the next larger
multiple of the alignment for that type (using the above rule). This patch
also changes bit widths from "short" to "uint32_t" to ensure there are
enough bits to specify any bit width that LLVM can handle (currently 2^23);
16-bits isn't enough.

llvm-svn: 34431
 2007-02-19 22:35:00 +00:00
Evan Cheng f7ed82da10 Re-apply my liveintervalanalysis changes. Now with PR1207 fixes. 
llvm-svn: 34428
 2007-02-19 21:49:54 +00:00
Reid Spencer da81bf4d3e For PR1207: 
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.

llvm-svn: 34399
 2007-02-19 03:20:00 +00:00
Evan Cheng 9865be6d40 Added getReservedRegs(). 
llvm-svn: 34376
 2007-02-17 11:06:00 +00:00
Chris Lattner 1f7d60262e Fix ixaddrs as well, allowing ppc64 to compile to: 
_test2:
        li r2, 0
        lis r3, 1
        std r2, 9024(r3)
        blr

instead of:

_test2:
        lis r2, 1
        li r3, 0
        ori r2, r2, 9024
        std r3, 0(r2)
        blr

This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2

llvm-svn: 34373
 2007-02-17 06:57:26 +00:00
Chris Lattner 4a9c0bb147 Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to: 
_test:
        lis r2, 743
        li r3, 0
        stw r3, 32751(r2)
        blr

instead of:

_test:
        li r2, 0
        stw r2, 32751(48693248)
        blr

Implement support for ppc64 as well, allowing it to produce better code.

llvm-svn: 34371
 2007-02-17 06:44:03 +00:00
Chris Lattner 04eb16b415 Do not dereference invalid ranges. Generalize targetdata alignment model. 
This fixes the UnitTests/Vector/sumarray-dbl regressions.

llvm-svn: 34358
 2007-02-17 00:41:42 +00:00
Chris Lattner dc64b9d379 Fix CodeGen/PowerPC/2007-02-16-AlignPacked.ll 
llvm-svn: 34356
 2007-02-16 23:11:51 +00:00
Reid Spencer e4ff249d26 Remove an unnecessary predicate. 
Patch by Scott Michel.

llvm-svn: 34354
 2007-02-16 22:42:40 +00:00
Chris Lattner f9122c4512 simplify some code, ensure that packed structures get abi alignment of 1. 
llvm-svn: 34352
 2007-02-16 22:25:34 +00:00
Chris Lattner 8091f28d1a fix incorrect encoding of vminsw. 
llvm-svn: 34351
 2007-02-16 21:20:09 +00:00
Andrew Lenharth b8d6fa20bb This was done recently 
llvm-svn: 34338
 2007-02-16 02:11:59 +00:00
Reid Spencer 03d4a8a368 For PR1195: 
PACKED_ALIGN -> VECTOR_ALIGN

llvm-svn: 34330
 2007-02-15 22:07:05 +00:00
Reid Spencer 40aa2fdac6 For PR1202: 
Make sure we found an existing Alignment before overwriting it.

llvm-svn: 34308
 2007-02-15 18:34:36 +00:00
Evan Cheng 14edd1989b Use BitVector instead of vector<bool> which can be extremely slow. 
llvm-svn: 34302
 2007-02-15 05:59:24 +00:00
Reid Spencer 09575bac2e For PR1195: 
Change use of "packed" term to "vector" in comments, strings, variable
names, etc.

llvm-svn: 34300
 2007-02-15 03:39:18 +00:00
Reid Spencer d84d35ba70 For PR1195: 
Rename PackedType -> VectorType, ConstantPacked -> ConstantVector, and
PackedTyID -> VectorTyID. No functional changes.

llvm-svn: 34293
 2007-02-15 02:26:10 +00:00
Reid Spencer dad84a7c02 Fixed packed structure breakage from earlier TargetData patch; applied 
Chris Lattner's code style suggestions.

Patch by Scott Michel!

llvm-svn: 34292
 2007-02-15 02:11:06 +00:00
Chris Lattner 945e437c65 Generalize TargetData strings, to support more interesting forms of data. 
Patch by Scott Michel.

llvm-svn: 34266
 2007-02-14 05:52:17 +00:00
Andrew Lenharth 6719d3d0a2 Well this isn't as ugly and it works better. At least gcc bootstraps again 
llvm-svn: 34254
 2007-02-13 23:41:16 +00:00
Chris Lattner 09a32e42bd add a note 
llvm-svn: 34249
 2007-02-13 21:44:43 +00:00
Lauro Ramos Venancio 50c6a8c3a1 Add space between // and the comment. 
llvm-svn: 34246
 2007-02-13 20:06:15 +00:00
Lauro Ramos Venancio 048e16ff8f Add ABI information to ARM subtarget. 
llvm-svn: 34245
 2007-02-13 19:52:28 +00:00
Lauro Ramos Venancio 603f201cba According to ARM EABI, 8-bytes function arguments must be 8-bytes aligned. 
llvm-svn: 34241
 2007-02-13 14:07:13 +00:00
Chris Lattner 44e9472fc6 more notes 
llvm-svn: 34204
 2007-02-12 21:20:26 +00:00
Chris Lattner b5c89c8d2d add a note 
llvm-svn: 34202
 2007-02-12 20:26:34 +00:00
Chris Lattner fed6f0e571 Switch LayoutInfo to be a DenseMap instead of an std::map. This speeds up 
-load-vn -gcse by 2.3%.

llvm-svn: 34160
 2007-02-10 20:26:17 +00:00
Chris Lattner 22206711c9 add a typedef 
llvm-svn: 34159
 2007-02-10 20:18:06 +00:00
Chris Lattner e472f9c4dc eliminate the std::vector from StructLayout, allocating the elements immediately 
after the StructLayout object in memory.  This marginally improves locality,
speeding up -load-vn -gcse by ~0.8%.

llvm-svn: 34158
 2007-02-10 20:15:41 +00:00
Chris Lattner b84892d2d2 encapsulate the rest of the StructLayout members. 
llvm-svn: 34157
 2007-02-10 19:59:22 +00:00
Chris Lattner c473d8e431 Privatize StructLayout::MemberOffsets, adding an accessor 
llvm-svn: 34156
 2007-02-10 19:55:17 +00:00
Chris Lattner 1e692e823c Use ManagedStatic to manage LayoutInfo, instead of rolling our own. 
llvm-svn: 34154
 2007-02-10 19:43:18 +00:00
Chris Lattner 336e3962ff Change TargetData::getIndexedOffset interface to not require indices 
in a vector.

llvm-svn: 34153
 2007-02-10 19:33:15 +00:00
Evan Cheng 540f5e0d41 These vectors are frequently large. Use std::vector instead. 
llvm-svn: 34109
 2007-02-09 23:59:14 +00:00
Evan Cheng 8b7700f146 Add reference counting to constantpool entries. Delete the unused ones. 
llvm-svn: 34105
 2007-02-09 20:54:44 +00:00
Chris Lattner c9088b4c8e add a note 
llvm-svn: 34101
 2007-02-09 17:38:01 +00:00
Nate Begeman ba52b94fa2 Remove fixed item 
llvm-svn: 34081
 2007-02-09 04:19:54 +00:00
Evan Cheng f76bb63555 This is done. 
llvm-svn: 34072
 2007-02-08 23:53:38 +00:00
Andrew Lenharth 9a4a1515ee return addresses, those I already have 
llvm-svn: 34056
 2007-02-08 17:37:41 +00:00
Bill Wendling e796b6de45 Fixed comments. 
llvm-svn: 34040
 2007-02-08 06:05:08 +00:00
Bill Wendling 2aa9a42f24 Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the 
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).

llvm-svn: 34034
 2007-02-08 01:39:44 +00:00
Bill Wendling 59889ae93f Added new method to add a "simple" code emitter. That is, to only add 
the code emitter and not set variables.

llvm-svn: 34033
 2007-02-08 01:38:33 +00:00
Bill Wendling 4e8ad36338 Dead files. Functionality has been taken over by the Add*Writer functions. 
llvm-svn: 34029
 2007-02-08 01:32:51 +00:00
Evan Cheng 2ff4c973b1 isLowRegister() expects input is a physical register. 
llvm-svn: 34013
 2007-02-07 21:44:33 +00:00
Evan Cheng cca9b1d768 Rename. 
llvm-svn: 34011
 2007-02-07 21:24:09 +00:00
Evan Cheng ec4c67f0a7 If sp offset will be materialized in a register. Clear the offset field of str / ldr. 
llvm-svn: 34010
 2007-02-07 21:19:58 +00:00
Evan Cheng 62aef236de Get rid of references to iostream. 
llvm-svn: 34009
 2007-02-07 21:18:32 +00:00
Evan Cheng b216ea1aa6 New entry. 
llvm-svn: 34000
 2007-02-07 09:22:15 +00:00
Evan Cheng 78c5a9422d In thumb mode, R3 is reserved, but it can be live in to the function. If 
that is the case, whenever we use it as a scratch register, save it to R12
first and then restore it after the use.
This is a temporary and truly horrible workaround!

llvm-svn: 33999
 2007-02-07 09:17:36 +00:00
Evan Cheng 2ff0d3a2ab Update 
llvm-svn: 33998
 2007-02-07 08:37:57 +00:00
Evan Cheng b5519b5361 - If fp (r7) is used to reference stack objects, use [r, r] address mode. 
- If there is a dynamic alloca, in the epilogue, restore the value of sp
  using r7 - offset.
- Other bug fixes.

llvm-svn: 33997
 2007-02-07 08:37:31 +00:00
Evan Cheng 12cf8ddaea eliminateFrameIndex() is even more complicated if frame ptr is used instead of SP when there are dynamic alloca's. 
llvm-svn: 33975
 2007-02-07 02:44:23 +00:00
Evan Cheng ec13f826a2 Spill / restore should avoid modifying the condition register. 
llvm-svn: 33971
 2007-02-07 00:06:56 +00:00
Evan Cheng a974031ebd Select add FI, c correctly. 
llvm-svn: 33960
 2007-02-06 09:11:20 +00:00
Evan Cheng ea3308aef0 foldMemoryOperand() cannot fold tMOVrr sp into load / store in thumb mode. tLDRspi / tSTRspi cannot target / store high registers. 
llvm-svn: 33958
 2007-02-06 06:13:29 +00:00
Evan Cheng 2fc792f86b eliminateFrameIndex() bug when frame pointer is used as base register. 
llvm-svn: 33945
 2007-02-06 00:23:31 +00:00
Evan Cheng 650d0672f7 - Store val, [sp, c] must be selected to tSTRsp. 
- If c does not fit in the offset field, materialize sp + c into a register
  using tADDhirr.

llvm-svn: 33944
 2007-02-06 00:22:06 +00:00
Reid Spencer 92b50800f6 Although targets are not required to support integers > 64bits, TargetData 
must in order for backends that do want to support large integer types to be
able to function. Consequently, don't assert if the bitwidth > 64 bits
when computing the size and alignment. Instead, compute the size by rounding
up to the next even number of bytes for the size. Compute the alignment
as the same as the LongABIAlignment. These provide reasonable defaults
that the target can override.

llvm-svn: 33943
 2007-02-05 23:51:43 +00:00
Reid Spencer 3aaaa0b2bd For PR411: 
This patch replaces the SymbolTable class with ValueSymbolTable which does
not support types planes. This means that all symbol names in LLVM must now
be unique. The patch addresses the necessary changes to deal with this and
removes code no longer needed as a result. This completes the bulk of the
changes for this PR. Some cleanup patches will follow.

llvm-svn: 33918
 2007-02-05 20:47:22 +00:00
Chris Lattner fe8c530d79 Fix a miscompilation in the addr mode code trying to implement X | C and 
X + C to promote LEA formation.  We would incorrectly apply it in some cases
(test) and miss it in others.

This fixes CodeGen/X86/2007-02-04-OrAddrMode.ll

llvm-svn: 33884
 2007-02-04 20:18:17 +00:00
Evan Cheng 456db39ea9 ARM callseq_end should have a input flag operand so it would be scheduled right after the call. 
llvm-svn: 33832
 2007-02-03 09:11:58 +00:00
Evan Cheng 4b6c8f7f5e Fix comments. 
llvm-svn: 33831
 2007-02-03 08:53:01 +00:00
Bill Wendling a883f55eca Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses 
non-Mach-O-specific information.

llvm-svn: 33819
 2007-02-03 02:41:58 +00:00
Bill Wendling 2c350921e2 Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The 
PPCMachOWriter is now trivial.

llvm-svn: 33818
 2007-02-03 02:40:57 +00:00
Bill Wendling c85e32c730 Put destructor out-of-line. 
llvm-svn: 33817
 2007-02-03 02:40:10 +00:00
Evan Cheng 36d559d369 - Branch max. displacement calculation bug. 
- Add debugging info.

llvm-svn: 33811
 2007-02-03 02:08:34 +00:00
Lauro Ramos Venancio b739f7d337 bugfix: SP isn't resetted when function has FP and there is no spills. 
llvm-svn: 33800
 2007-02-02 23:08:40 +00:00
Evan Cheng f089c99f1d Another thumb large stack offset codegen bug. 
llvm-svn: 33795
 2007-02-02 21:08:39 +00:00
Evan Cheng d9d94700a4 Use MBB.empty() instead of MBB.size() for speed. 
llvm-svn: 33789
 2007-02-02 19:09:19 +00:00
Evan Cheng 3ad22567b3 Watch out for empty BB. 
llvm-svn: 33788
 2007-02-02 18:49:02 +00:00
Evan Cheng fda6550545 Ugh. Only meant to do this in thumb mode. 
llvm-svn: 33780
 2007-02-02 08:58:48 +00:00
Chris Lattner 2d5b4ac38f add a note 
llvm-svn: 33778
 2007-02-02 04:36:46 +00:00
Reid Spencer 2341c22ec7 Changes to support making the shift instructions be true BinaryOperators. 
This feature is needed in order to support shifts of more than 255 bits
on large integer types.  This changes the syntax for llvm assembly to
make shl, ashr and lshr instructions look like a binary operator:
   shl i32 %X, 1
instead of
   shl i32 %X, i8 1
Additionally, this should help a few passes perform additional optimizations.

llvm-svn: 33776
 2007-02-02 02:16:23 +00:00
Evan Cheng 48b094d9dd Fix a bug in getARMCMP (which translate CondCode to ARM specific CC) when the RHS is a constant. 
llvm-svn: 33775
 2007-02-02 01:53:26 +00:00
Evan Cheng 9b9e4ae796 Thumb does not have clz. 
llvm-svn: 33773
 2007-02-01 23:34:03 +00:00
Lauro Ramos Venancio 2c355da986 Define PrivateGlobalPrefix for ARM Linux. (Fix CodeGen/ARM/large_stack.ll) 
llvm-svn: 33763
 2007-02-01 21:43:53 +00:00
Evan Cheng fd522996c8 Pasto. Lots of it. 
llvm-svn: 33762
 2007-02-01 20:44:52 +00:00
Lauro Ramos Venancio 903e01d407 Fix .thumb_func directive on linux. 
llvm-svn: 33759
 2007-02-01 18:25:34 +00:00
Jim Laskey c3de9b4b14 Support for non-landing pad exception handling. 
llvm-svn: 33755
 2007-02-01 16:31:34 +00:00
Evan Cheng f9a4c690de - Off by one bugs in maximum displacement calculation / testing. 
- In thumb mode, a new constpool island BB size should be 4 + 2 to
  compensate for the potential padding due to alignment requirement.

llvm-svn: 33753
 2007-02-01 10:16:15 +00:00
Anton Korobeynikov 1b4e6015b4 Fixed uninitialized stuff inside LegalizeDAG. Fortunately, the only 
affected part is codegen of "memove" inside x86 backend. This fixes
PR1144

llvm-svn: 33752
 2007-02-01 08:39:52 +00:00
Evan Cheng 06736d0f88 .set pc relative displacement bug: label should be moved down one instruction 
to just before the add r1, pc:

Before:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
LPCRELL0:
        mov r1, #PCRELV0
        add r1, pc

Now:
        .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
        mov r1, #PCRELV0
LPCRELL0:
        add r1, pc

llvm-svn: 33744
 2007-02-01 03:04:49 +00:00
Evan Cheng 0df1536173 Add a note. 
llvm-svn: 33743
 2007-02-01 02:46:20 +00:00
Evan Cheng e724492566 Also set alignment of stack-based structs to 4 in thumb mode. 
llvm-svn: 33741
 2007-02-01 02:18:36 +00:00
Evan Cheng e7e966de5e Special epilogue for vararg functions. We cannot do a pop to pc because 
there follows a sp increment for the va register save region. Instead issue
a separate pop to another register, increment sp, and then return:
        pop {r4, r5, r6, r7}
        pop {r3}
        add sp, #3 * 4
        bx r3

llvm-svn: 33739
 2007-02-01 01:49:46 +00:00
Evan Cheng 234e031e36 Pessmistically assume the .align 2 before the first constpool entry adds 
two bytes padding.

llvm-svn: 33734
 2007-02-01 01:09:47 +00:00
Evan Cheng 29f920877d Possible JT improvements. 
llvm-svn: 33733
 2007-02-01 01:07:48 +00:00
Chris Lattner f7937005a3 Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll 
llvm-svn: 33732
 2007-02-01 00:39:08 +00:00
Evan Cheng ed81dea45b Don't emit unnecessary .align directive. 
llvm-svn: 33729
 2007-01-31 23:39:39 +00:00
Evan Cheng e5c19993cd Handle an interesting corner case: the constpool_entry being reference is two 
instructions away, i.e. its address is equal to PC.
        %r0 = tLDRpci <cp#0>
        bx
        CONSTPOOL_ENTRY 0 <cp#0>, 4

llvm-svn: 33728
 2007-01-31 23:35:18 +00:00
Evan Cheng b0ff625a31 Don't want to add FramePtr to callee save spill list twice. 
llvm-svn: 33727
 2007-01-31 23:17:29 +00:00
Evan Cheng 6f1c20a8e6 Darwin ABI requires FP to point to stack slot of prev FP. 
llvm-svn: 33724
 2007-01-31 22:25:33 +00:00
Evan Cheng 2e309b15a7 Add entry. 
llvm-svn: 33723
 2007-01-31 22:11:38 +00:00
Evan Cheng 1c5837dc4a Thumb add sp, #imm requires the immediate value be multiple of 4. For now, 
change preferred alignment of short, byte, bool to 4.

llvm-svn: 33722
 2007-01-31 22:08:40 +00:00
Evan Cheng ffe1d9f7fa Update comment. 
llvm-svn: 33721
 2007-01-31 22:06:44 +00:00
Evan Cheng d7e39eb443 Dead comment. 
llvm-svn: 33719
 2007-01-31 21:31:25 +00:00
Evan Cheng 0584836340 Thumb asm syntax does not want 's' suffix for flag setting opcodes. 
llvm-svn: 33717
 2007-01-31 20:12:31 +00:00
Evan Cheng 1f3fc4b3f0 When determining whether a pc relative branch / load displacement fits in the 
instruction field, adjust it for PC value (4 for thumb, 8 for arm).

llvm-svn: 33711
 2007-01-31 19:57:44 +00:00
Chris Lattner 37ebf9317b A relatively simple PPC optimization. 
llvm-svn: 33709
 2007-01-31 19:49:20 +00:00
Evan Cheng 7169bd8784 Some comments. 
llvm-svn: 33707
 2007-01-31 18:29:27 +00:00