Commit Graph

1184 Commits

Author SHA1 Message Date
Krzysztof Parzyszek 89fb44147b [Hexagon] Recognize "s" constraint in inline-asm
llvm-svn: 270216
2016-05-20 13:50:32 +00:00
Artem Belevich ffa5fc51b8 [CUDA] Allow sm_50,52,53 GPUs
LLVM accepts them since r233575.

Differential Revision: http://reviews.llvm.org/D20405

llvm-svn: 270084
2016-05-19 17:47:47 +00:00
Krzysztof Parzyszek e0026e4e21 [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
Clang follow-up to r269933.

llvm-svn: 269934
2016-05-18 14:56:14 +00:00
Ashutosh Nema 51c9dd0081 Add new intrinsic support for MONITORX and MWAITX instructions
Summary:
MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and 
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction
execution and enter an implementation-dependent optimized state until
occurrence of a class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper

Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits

Differential Revision: http://reviews.llvm.org/D19796

llvm-svn: 269907
2016-05-18 11:56:23 +00:00
Paul Robinson 9d61361acb [PS4] Change the names of some "environmental" things to what our
licensees actually see in the toolchain we deliver to them.  This will
reduce the set of local patches we have to maintain.  The triple is
not changing.  (The term ORBIS is an internal code name for PS4.)

llvm-svn: 269671
2016-05-16 17:22:25 +00:00
Yaxun Liu 39cf40f6b4 [OpenCL] Add supported OpenCL extensions to target info.
Add supported OpenCL extensions to target info. It serves as default values to save the users of the burden setting each supported extensions and optional core features in command line.

Re-commit after fixing build error due to missing override attribute.

Differential Revision: http://reviews.llvm.org/D19484

llvm-svn: 269670
2016-05-16 17:06:34 +00:00
Tim Northover 862eaf8a12 ARM-MachO: stop claiming to be EABI
Embedded ARM MachO targets are AAPCS but not full EABI (we don't use
__aeabi_whatever and the functions are allowed to be hard-float).

Turns out there was already a test for this, but its original purpose had
become corrupted over the years.

llvm-svn: 269487
2016-05-13 21:26:45 +00:00
Yaxun Liu fa1df45c0d Revert "[OpenCL] Add supported OpenCL extensions to target info."
Revert r269431 due to build failure caused by warning msg:

  llvm/tools/clang/lib/Basic/Targets.cpp:2090:9: error: 'setSupportedOpenCLOpts' overrides a member function but is not marked 'override' [-Werror,-Winconsistent-missing-override]
   void setSupportedOpenCLOpts() {

llvm-svn: 269435
2016-05-13 17:16:26 +00:00
Yaxun Liu 64936ce91d [OpenCL] Add supported OpenCL extensions to target info.
Add supported OpenCL extensions to target info. It serves as default values to save the users of the burden setting each supported extensions and optional core features in command line.

Differential Revision: http://reviews.llvm.org/D19484

llvm-svn: 269431
2016-05-13 15:44:37 +00:00
Reid Kleckner 330fb175d4 Update clang support on recent Haiku
[ Copied from https://llvm.org/bugs/show_bug.cgi?id=26404 ]

clang support on Haiku is lagging a bit, and missing on x86_64.

This patch updates support for x86 and add support for x86_64. It should
apply directly to trunk and it's harmless in the sense that it only
affects Haiku.

Reviewers: rnk, rsmith

Patch by Jérôme Duval

Differential Revision: http://reviews.llvm.org/D16797

llvm-svn: 269201
2016-05-11 16:19:05 +00:00
Nemanja Ivanovic d99f21b0e6 [Power9] Enable -mcpu=pwr9 (-mcpu=power9) in the front end
This patch corresponds to review:
http://reviews.llvm.org/D19684

It simply adds the handling for the option and the corresponding macros.

llvm-svn: 268951
2016-05-09 18:58:02 +00:00
Nemanja Ivanovic bb1ea2d613 Enable support for __float128 in Clang and enable it on pertinent platforms
This patch corresponds to reviews:
http://reviews.llvm.org/D15120
http://reviews.llvm.org/D19125

It adds support for the __float128 keyword, literals and target feature to
enable it. Based on the latter of the two aforementioned reviews, this feature
is enabled on Linux on i386/X86 as well as SystemZ.
This is also the second attempt in commiting this feature. The first attempt
did not enable it on required platforms which caused failures when compiling
type_traits with -std=gnu++11.

If you see failures with compiling this header on your platform after this
commit, it is likely that your platform needs to have this feature enabled.

llvm-svn: 268898
2016-05-09 08:52:33 +00:00
Chris Dewhurst 69fa1926db [Sparc] Implement __builtin_setjmp, __builtin_longjmp back-end.
This code implements builtin_setjmp and builtin_longjmp exception handling intrinsics for 32-bit Sparc back-ends.

The code started as a mash-up of the PowerPC and X86 versions, although there are sufficient differences to both that had to be made for Sparc handling.

Note: I have manual tests running. I'll work on a unit test and add that to the rest of this diff in the next day.

Also, this implementation is only for 32-bit Sparc. I haven't focussed on a 64-bit version, although I have left the code in a prepared state for implementing this, including detecting pointer size and comments indicating where I suspect there may be differences.

Differential Revision: http://reviews.llvm.org/D19798

llvm-svn: 268483
2016-05-04 09:33:30 +00:00
Justin Lebar 76945b2f44 [CUDA] Copy host builtin types to NVPTXTargetInfo.
Summary:
Host and device types must match, otherwise when we pass values back and
forth between the host and device, we will get the wrong result.

This patch makes NVPTXTargetInfo inherit most of its type information
from the host's target info.

Reviewers: rsmith

Subscribers: cfe-commits, jhen, tra

Differential Revision: http://reviews.llvm.org/D19346

llvm-svn: 268131
2016-04-29 23:05:19 +00:00
Chris Bieneman 46977b62aa [Clang][Darwin] Define __ARM_DWARF_EH__ for WatchABI
Summary: The Darwin armv7k ABI uses Dwarf EH, so we need to set the OS define correctly. Without this the gcc_personality fails to build.

Reviewers: t.p.northover

Subscribers: aemerson, cfe-commits, rengolin

Differential Revision: http://reviews.llvm.org/D19693

llvm-svn: 268078
2016-04-29 17:53:00 +00:00
Tim Northover 28fc0e1fcd ARMv7k: define __ARM_PCS_VFP since we're hard-float.
It's a little debateable because we're not truly AAPCS, so I'm
certainly not going to define __ARM_PCS, but __ARM_PCS_VFP seems to be
really an "hard-float" define, which is a useful thing to have.

llvm-svn: 267880
2016-04-28 13:59:55 +00:00
Bryan Chan e3f1ed5805 [SystemZ] Support Swift calling convention
Summary:
Port rL265324 to SystemZ to allow using the 'swiftcall' attribute on that architecture.

Depends on D19414.

Reviewers: kbarton, rjmccall, uweigand

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D19432

llvm-svn: 267879
2016-04-28 13:56:43 +00:00
Silviu Baranga 632fdc5919 PR27216: Only define __ARM_FEATURE_FMA when the target has VFPv4
Summary:
According to the ACLE spec, "__ARM_FEATURE_FMA is defined to 1 if
the hardware floating-point architecture supports fused floating-point
multiply-accumulate".

This changes clang's behaviour from emitting this macro for v7-A and v7-R
cores to only emitting it when the target has VFPv4 (and therefore support
for the floating point multiply-accumulate instruction).

Fixes PR27216

Reviewers: t.p.northover, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D18963

llvm-svn: 267869
2016-04-28 11:29:08 +00:00
Krzysztof Parzyszek a58ff5117a [Hexagon] Define architecture version macros for hexagonv55
llvm-svn: 266989
2016-04-21 14:30:04 +00:00
Krzysztof Parzyszek 7f0756cc1f [Hexagon] Define macros __HVX__ and __HVXDBL__ when appropriate
llvm-svn: 266647
2016-04-18 18:38:11 +00:00
Weiming Zhao b061313c5e [ARM] predefines __ELF__ macro for arm-none-eabi
Summary: predefines __ELF__ macro for arm-none-eabi

Reviewers: silviu.baranga, rengolin

Subscribers: aemerson, rengolin, cfe-commits

Differential Revision: http://reviews.llvm.org/D19225

llvm-svn: 266625
2016-04-18 16:25:46 +00:00
Nemanja Ivanovic d7d45bf8ce Revert 266186 as it breaks anything that includes type_traits on some platforms
Since this patch provided support for the __float128 type but disabled it
on all platforms by default, some platforms can't compile type_traits with
-std=gnu++11 since there is a specialization with __float128.
This reverts the patch until D19125 is approved (i.e. we know which platforms
need this support enabled).

llvm-svn: 266460
2016-04-15 18:04:13 +00:00
Nemanja Ivanovic 50f29e06a1 Enable support for __float128 in Clang
This patch corresponds to review:
http://reviews.llvm.org/D15120

It adds support for the __float128 keyword, literals and a target feature to
enable it. This support is disabled by default on all targets and any target
that has support for this type is free to add it.

Based on feedback that I've received from target maintainers, this appears to
be the right thing for most targets. I have not heard from the maintainers of
X86 which I believe supports this type. I will subsequently investigate the
impact of enabling this on X86.

llvm-svn: 266186
2016-04-13 09:49:45 +00:00
Saleem Abdulrasool c066d9cf55 Basic: fix profiling with GNU EABI
The GNU profiling support indicates that the interface is `_mcount` rather than
`mcount`.  Conditionalise the behaviour according to the `-meabi gnu` flag.

Resolves PR27311

llvm-svn: 266039
2016-04-12 03:05:03 +00:00
Saleem Abdulrasool 2a0932fb45 Correct pg instrumentation for AArch64
It seems that there was a miscommunication between Renato and I, and the
original behaviour of AArch64 was to be preserved and not to mirror the new
behaviour.  Restore the original behaviour for AArch64.  Addresses post-commit
review comments from Renato Golin.

llvm-svn: 265899
2016-04-10 14:29:55 +00:00
Saleem Abdulrasool 9b5ba547f1 Add support for __gnu_mcount_nc as the pg interface
This adds support to optionally support using `__gnu_mcount_nc` as the mcount
interface rather than `mcount` for Linux and EABI.  The other targets do not
provide an implementation for `__gnu_mcount_nc`.  This can be activated via the
`-meabi gnu` flag.

Resolves PR23969.

llvm-svn: 265888
2016-04-10 03:19:47 +00:00
Saleem Abdulrasool e86dd022c6 Basic: thread TargetOptions into TargetInfo
This threads TargetOptions into the TargetInfo hierarchy.  This is a rework of
the original attempt to thread additional information into the TargetInfo to
make decisions based on additional ABI related options.

llvm-svn: 265878
2016-04-09 19:09:25 +00:00
Saleem Abdulrasool 10a4972a8d revert SVN r265702, r265640
Revert the two changes to thread CodeGenOptions into the TargetInfo allocation
and to fix the layering violation by moving CodeGenOptions into Basic.
Code Generation is arguably not particularly "basic".  This addresses Richard's
post-commit review comments.  This change purely does the mechanical revert and
will be followed up with an alternate approach to thread the desired information
into TargetInfo.

llvm-svn: 265806
2016-04-08 16:52:00 +00:00
Saleem Abdulrasool 94cfc603d1 Basic: move CodeGenOptions from Frontend
This is a mechanical move of CodeGenOptions from libFrontend to libBasic.  This
fixes the layering violation introduced earlier by threading CodeGenOptions into
TargetInfo.  It should also fix the modules based self-hosting builds.  NFC.

llvm-svn: 265702
2016-04-07 17:49:44 +00:00
Saleem Abdulrasool 724275ba5f Basic: thread CodeGenOptions into TargetInfo
This threads CodeGenOptions into the TargetInfo hierarchy.  This is motivated by
ARM which can change some target information based on the EABI selected
(-meabi).  Similar options exist for other platforms (e.g. MIPS) and thus is
generally useful.  NFC.

llvm-svn: 265640
2016-04-07 05:41:11 +00:00
Andrey Turetskiy fd259ff9c4 [X86] Introduction of -march=lakemont.
Differential Revision: http://reviews.llvm.org/D18651

llvm-svn: 265405
2016-04-05 15:04:26 +00:00
Akira Hatanaka 68ab7fe1c8 [CodeGenCXX] Fix ItaniumCXXABI::getAlignmentOfExnObject to return 8-byte
alignment on Darwin.

Itanium C++ ABI specifies that _Unwind_Exception should be double-word
aligned (16B). To conform to the ABI, libraries implementing exception
handling declare the struct with __attribute__((aligned)), which aligns
the unwindHeader field (and the end of __cxa_exception) to the default
target alignment (which is typically 16-bytes).

struct __cxa_exception {
  ...
  // struct is declared with __attribute__((aligned)).
  _Unwind_Exception unwindHeader;
};

Based on the assumption that _Unwind_Exception is declared with
__attribute__((aligned)), ItaniumCXXABI::getAlignmentOfExnObject returns
the target default alignment for __attribute__((aligned)). It turns out
that libc++abi, which is used on Darwin, doesn't declare the struct with
the attribute and therefore doesn't guarantee that unwindHeader is
aligned to the alignment specified by the ABI, which in some cases
causes the program to crash because of unaligned memory accesses.

This commit avoids crashes due to unaligned memory accesses by having
getAlignmentOfExnObject return an 8-byte alignment on Darwin. I've only
fixed the problem for Darwin, but we should also figure out whether other
platforms using libc++abi need similar fixes.

rdar://problem/25314277

Differential revision: http://reviews.llvm.org/D18479

llvm-svn: 264998
2016-03-31 06:36:07 +00:00
Matt Arsenault edc7c6b237 AMDGPU: Remove separate r600 double data layout
This is identical to the other r600 datalayout string.

llvm-svn: 264931
2016-03-30 21:32:37 +00:00
Jonas Paulsson 3ace74a414 [SystemZ] Specify required features for builtins.
BuiltinsSystemZ.def is extended to include the required processor
features per intrinsic.

New test test/CodeGen/builtins-systemz-error2.c that checks for
expected errors when instrinsics are used with a subtarget that does
not support the required feature (e.g. vector support).

Reviewed by Ulrich Weigand.

llvm-svn: 264873
2016-03-30 15:51:24 +00:00
Hrvoje Varga 14c42eec54 Add additional Hi/Lo registers to Clang MipsTargetInfoBase
Differential Revision: http://reviews.llvm.org/D17378

llvm-svn: 264727
2016-03-29 12:46:16 +00:00
Jacques Pienaar d964cc22d1 [lanai] Add Lanai backend to clang driver.
Changes to clang to add Lanai backend. Adds a new target, ABI and toolchain.

General Lanai backend discussion on llvm-dev thread "[RFC] Lanai backend" (http://lists.llvm.org/pipermail/llvm-dev/2016-February/095118.html).

Differential Revision: http://reviews.llvm.org/D17002

llvm-svn: 264655
2016-03-28 21:02:54 +00:00
Etienne Bergeron e8ae26fb34 Fix a missing comma between two string literals.
Summary:
The two literals are currently appended.

I'm not sure what was broken by this. Please double check carefully.

Silly bug found by an on-going checker for clang-tidy.

Reviewers: alexfh, arsenm, rnk

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D18454

llvm-svn: 264315
2016-03-24 18:29:24 +00:00
Andrey Turetskiy 5f1cf5fa66 [X86] Add "x87" in x86 target feature map.
Differential Revision: http://reviews.llvm.org/D13980

llvm-svn: 264149
2016-03-23 11:15:10 +00:00
Roman Levenstein 35aa5cecf2 Add attributes for preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end
Till now, preserve_mostcc/preserve_allcc calling convention attributes were only
available at the LLVM IR level. This patch adds attributes for
preserve_mostcc/preserve_allcc calling conventions to the C/C++ front-end.

The code was mostly written by Juergen Ributzka.
I just added support for the AArch64 target and tests.

Differential Revision: http://reviews.llvm.org/D18025

llvm-svn: 263647
2016-03-16 18:00:46 +00:00
Douglas Katzman 6871afcfca Myriad: define __myriad2 macro automatically
llvm-svn: 263596
2016-03-15 22:34:02 +00:00
Joerg Sonnenberger d0be8dcbf8 Implement __builtin_eh_return_data_regno for SPARC and SPARC64.
llvm-svn: 262838
2016-03-07 17:19:15 +00:00
Simon Pilgrim 4aa36fd4e3 [X86] AMD Bobcat CPU (btver1) doesn't support XSAVE
btver1 is a SSSE3/SSE4a only CPU - it doesn't have AVX and doesn't support XSAVE.

Differential Revision: http://reviews.llvm.org/D17682

llvm-svn: 262772
2016-03-05 14:35:44 +00:00
James Y Knight b214cbc785 Make TargetInfo store an actual DataLayout instead of a string.
Use it to calculate UserLabelPrefix, instead of specifying it (often
incorrectly).

Note that the *actual* user label prefix has always come from the
DataLayout, and is handled within LLVM. The main thing clang's
TargetInfo::UserLabelPrefix did was to set the #define value. Having
these be different from each-other is just silly.

Differential Revision: http://reviews.llvm.org/D17183

llvm-svn: 262737
2016-03-04 19:00:41 +00:00
Bhushan D. Attarde bacb988735 [MIPS] initFeatureMap() to handle empty string argument
SUMMARY:
    This patch sets CPU string to its default value when it is not supplied by caller.
    
    Reviewers: vkalintiris, dsanders
    Subscribers: mohit.bhakkad, sagar, jaydeep, cfe-commits
    Differential Revision: http://reviews.llvm.org/D16139

llvm-svn: 262691
2016-03-04 06:56:29 +00:00
Bradley Smith f4affc13c5 [ARM] Add Clang targeting for ARMv8-M Baseline/Mainline
llvm-svn: 262619
2016-03-03 13:52:22 +00:00
John McCall 477f2bb0d5 Semantic analysis for the swiftcall calling convention.
I've tried to keep the infrastructure behind parameter ABI
treatments fairly general.

llvm-svn: 262587
2016-03-03 06:39:32 +00:00
Tom Stellard 2c7cdd25ee AMDGPU: Add missing Volcanic Islands targets
Reviewers: arsenm

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D17645

llvm-svn: 262228
2016-02-29 15:08:56 +00:00
Craig Topper b4f83a00a9 [X86] Disabling avx512f should also disable avx512vbmi and avx512ifma. Enabling avx512vbmi or avx512ifma should enable avx512f. Add command line switches and header defines for avx512ifma and avx512vbmi.
llvm-svn: 262201
2016-02-29 06:51:38 +00:00
Craig Topper 840927e074 [X86] Enabling xsave should not enable AVX. I seem to have done this, but I don't know why.
llvm-svn: 262200
2016-02-29 06:51:34 +00:00
Matt Arsenault 5e020b2628 AMDGPU: Fix broken/confusing predefined macro
amdgcn should not be defining __R600__

llvm-svn: 262124
2016-02-27 09:06:26 +00:00