Commit Graph

87651 Commits

Author SHA1 Message Date
Eli Bendersky f658e92724 Add a largish auto-generated test for the aligned bundling feature, along with
the script generating it. The test should never be modified manually. If anyone
needs to change it, please change the script and re-run it.

The script is placed into utils/testgen - I couldn't think of a better place,
and after some discussion on IRC this looked like a logical location.

llvm-svn: 170720
2012-12-20 19:16:57 +00:00
Eli Bendersky 4c4f11eb0d Tests for the aligned bundling support added in r170718
llvm-svn: 170719
2012-12-20 19:07:30 +00:00
Eli Bendersky f483ff9204 Aligned bundling support. Following the discussion here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2012-December/056754.html

The proposal and implementation are fully documented here:
https://sites.google.com/a/chromium.org/dev/nativeclient/pnacl/aligned-bundling-support-in-llvm

Tests will follow shortly.

llvm-svn: 170718
2012-12-20 19:05:53 +00:00
Jakob Stoklund Olesen 2705333253 Use MachineInstrBuilder for PHI nodes in SelectionDAGISel.
llvm-svn: 170716
2012-12-20 18:46:29 +00:00
Jim Grosbach 759292c93f Fix inadvertant delete of 'has'.
llvm-svn: 170713
2012-12-20 18:09:48 +00:00
Jakob Stoklund Olesen b109a7b430 Use MachineInstrBuilder in InstrEmitter.
This is supposed to be a mechanical change with no functional effects.

InstrEmitter can generate all types of MachineOperands which revealed
that MachineInstrBuilder was missing a few methods, added by this patch.

Besides providing a context pointer to MI::addOperand(),
MachineInstrBuilder seems like a better fit for this code.

llvm-svn: 170712
2012-12-20 18:08:09 +00:00
Jakob Stoklund Olesen f623e9870d Use MachineInstrBuilder in a few CodeGen passes.
This automatically passes a context pointer to MI->addOperand().

llvm-svn: 170711
2012-12-20 18:08:06 +00:00
Rafael Espindola 642c7cd56e Simplify the testcase a bit.
I checked that it would still crash llc before the corresponding fix.

llvm-svn: 170709
2012-12-20 17:47:27 +00:00
Nadav Rotem 8b20c0a814 Loop Vectorizer: turn-off if-conversion.
llvm-svn: 170708
2012-12-20 17:42:53 +00:00
James Molloy 4f6fb953a7 Add a new attribute, 'noduplicate'. If a function contains a noduplicate call, the call cannot be duplicated - Jump threading, loop unrolling, loop unswitching, and loop rotation are inhibited if they would duplicate the call.
Similarly inlining of the function is inhibited, if that would duplicate the call (in particular inlining is still allowed when there is only one callsite and the function has internal linkage).

llvm-svn: 170704
2012-12-20 16:04:27 +00:00
Roman Divacky ff95a1dc12 Remove MCTargetAsmLexer and its derived classes now that edis,
its only user, is gone.

llvm-svn: 170699
2012-12-20 14:43:30 +00:00
Renato Golin 6b2ea4a48f Adding support for llvm.arm.neon.vaddl[su].* and
llvm.arm.neon.vsub[su].* intrinsics.

Patch by Pete Couperus <pjcoup@gmail.com>

llvm-svn: 170694
2012-12-20 13:52:11 +00:00
NAKAMURA Takumi a1d528baa5 llvmbuild/main.py: Let LibraryDependencies.inc deterministic.
FYI, llvm and clang can be built deterministically between stage 2 and stage3, among iterative clean rebuilds, with GNU ar;

configure --disable-timestamps
make AR.Flags=crsD RANLIB=echo

llvm-svn: 170682
2012-12-20 10:35:18 +00:00
Craig Topper ae48cb2e5a Formatting fixes. Remove some unnecessary 'else' after 'return'. No functional change.
llvm-svn: 170676
2012-12-20 07:15:54 +00:00
Craig Topper 9d4171afed Removing trailing whitespace
llvm-svn: 170675
2012-12-20 07:09:41 +00:00
Reed Kotler d11acc7dc0 Implement cfi_def_cfa_offset. "Make check" test case for this comming in the
next few days but it's already tested a lot from test-suite and works fine.
This patch completes almost 100% pass of test-suite for mips 16.

llvm-svn: 170674
2012-12-20 06:59:37 +00:00
Reed Kotler 8965d24a2a There is one more patch to finish large frames. Make sure we assert
on code that has large frames which will not yet compile correctly.

llvm-svn: 170673
2012-12-20 06:57:00 +00:00
Jyotsna Verma 56605448f2 Add constant extender support to GP-relative load/store instructions.
llvm-svn: 170672
2012-12-20 06:52:46 +00:00
Jyotsna Verma bf75aaf53e Add TSFlags to ALU32 type instructions for constant-extender/Relationship maps.
llvm-svn: 170671
2012-12-20 06:45:39 +00:00
Reed Kotler 7bff8f1d7a set register class properly for mips16 here
llvm-svn: 170669
2012-12-20 06:06:35 +00:00
Rafael Espindola fb8ac2df09 Undefine PPC harder.
This was causing a build failure while trying to build on ppc ubuntu 12.10 with
cmake.

llvm-svn: 170668
2012-12-20 05:13:09 +00:00
Reed Kotler 92fc33bc97 This assert is overly restrictive and does not work for mips16.
llvm-svn: 170667
2012-12-20 05:09:15 +00:00
Reed Kotler fd633229f7 Turn on register scavenger for Mips 16
We use an unused Mips 32 register for the emergency slot
instead of using the stack.

llvm-svn: 170665
2012-12-20 04:44:58 +00:00
Akira Hatanaka e7f1acc7c0 [mips] Refactor SLT (set on less than) instructions. Separate encoding
information from the rest. 

llvm-svn: 170664
2012-12-20 04:27:52 +00:00
Akira Hatanaka bbd197e9c4 [mips] Refactor unconditional branch instruction. Separate encoding information
from the rest. 

llvm-svn: 170663
2012-12-20 04:22:39 +00:00
Akira Hatanaka b1527b7505 [mips] Remove asm string parameter from pseudo instructions. Add InstrItinClass
parameter.

llvm-svn: 170661
2012-12-20 04:20:09 +00:00
Akira Hatanaka 14f9ce0f83 [mips] Delete definition of CPRESTORE instruction.
llvm-svn: 170660
2012-12-20 04:15:30 +00:00
Akira Hatanaka c0ea0bb99b [mips] Refactor conditional branch instructions with one register operand.
Separate encoding information from the rest.

llvm-svn: 170659
2012-12-20 04:13:23 +00:00
Richard Smith 4a8e454ab2 Don't use isa<CallInst>(this) in the constructor for CallInst's base class.
This has undefined behavior, because the classof implementation attempts to
access parts of the not-yet-constructed derived class. Found by clang
-fsanitize=vptr.

llvm-svn: 170658
2012-12-20 04:11:02 +00:00
Akira Hatanaka f71ffd29d9 [mips] Refactor conditional branch instructions with two register operands.
Separate encoding information from the rest.

llvm-svn: 170657
2012-12-20 04:10:13 +00:00
Reed Kotler d019dbf75e fix most of remaining issues with large frames.
these patches are tested a lot by test-suite but
make check tests are forthcoming once the next
few patches that complete this are committed.
with the next few patches the pass rate for mips16 is
near 100%

llvm-svn: 170656
2012-12-20 04:07:42 +00:00
Akira Hatanaka f423672117 [mips] Use "or $r0, $r1, $zero" instead of "addu $r0, $zero, $r1" to copy
physical register $r1 to $r0.

GNU disassembler recognizes an "or" instruction as a "move", and this change
makes the disassembled code easier to read.

Original patch by Reed Kotler.

llvm-svn: 170655
2012-12-20 04:06:06 +00:00
Richard Smith 15b1e3727b Fix use-before-construction of X86TargetLowering.
llvm-svn: 170654
2012-12-20 04:04:17 +00:00
Richard Smith e7701ebfec Don't use -1 as a value of an unsigned 7-bit enumeration; that has undefined
behavior and violates the !range constraints we put on loads of this enum.
Found by clang -fsanitize=enum.

llvm-svn: 170653
2012-12-20 04:02:58 +00:00
Richard Smith 3287fac591 Don't leave IsUnsigned uninitialized in a default-constructed APSInt. Copying
such a structure has undefined behavior. Caught by -fsanitize=bool.

llvm-svn: 170652
2012-12-20 03:59:24 +00:00
Akira Hatanaka 7d75f9e3d3 [mips] Change the order of template parameters. Move the default parameters to
the end. 

llvm-svn: 170651
2012-12-20 03:52:08 +00:00
Akira Hatanaka 244f9e874c [mips] Refactor shift instructions with register operands. Separate encoding
information from the rest.

llvm-svn: 170650
2012-12-20 03:48:24 +00:00
Akira Hatanaka 7f96ad325f [mips] Refactor shift immediate instructions. Separate encoding information
from the rest.

llvm-svn: 170649
2012-12-20 03:44:41 +00:00
Akira Hatanaka ab1b715bf2 [mips] Refactor arithmetic and logic instructions with immediate operands.
Separate encoding information from the rest.

llvm-svn: 170648
2012-12-20 03:40:03 +00:00
Akira Hatanaka 1b37c4af01 [mips] Refactor arithmetic and logic instructions. Separate encoding
information from the rest.

llvm-svn: 170647
2012-12-20 03:34:05 +00:00
Sean Silva fe15616449 docs: Show TOC for GettingStarted.rst.
This is a pretty lengthy document, so put the table of contents in your
face so that it's easier to scope out the content.

This document is a mess currently and needs to be
refactored/revised/split-up.

llvm-svn: 170646
2012-12-20 03:32:39 +00:00
Akira Hatanaka 73495897b1 [mips] Delete ArithOverflowR and ArithOverflow and use ArithLogicR and
ArithLogicI as the instruction base classes.

llvm-svn: 170642
2012-12-20 03:00:16 +00:00
Sean Silva 08fd0888cb docs: Clean up adornments.
For whatever reason the usage of '^^^' and '---' adornments were
reversed compared to the "canonical" style of the LLVM docs (which is
currently "the style used in SphinxQuickstartTemplate.rst"). This change
doesn't affect the document structure at all, I'm just doing it for
trivial stylistic consistency (the document content is *much* more
important---thanks Nadav for writing this up!).

Also, trim the adornments to be the same length as the section names.

llvm-svn: 170638
2012-12-20 02:40:45 +00:00
Sean Silva 13ed79c66b docs: ASCII-fy
llvm-svn: 170637
2012-12-20 02:23:25 +00:00
Nadav Rotem 7bdc45b570 Loop Vectorizer: Enable if-conversion.
llvm-svn: 170632
2012-12-20 02:00:02 +00:00
Bill Wendling 4607f4bdad s/AttributesImpl/AttributeImpl/g This is going to apply to Attribute, not Attributes.
llvm-svn: 170631
2012-12-20 01:36:59 +00:00
Bob Wilson 3365b80290 Do not introduce vector operations in functions marked with noimplicitfloat.
<rdar://problem/12879313>

llvm-svn: 170630
2012-12-20 01:36:20 +00:00
Jim Grosbach f9c2e5e450 Clean up some DOxygen comments.
llvm-svn: 170629
2012-12-20 01:14:48 +00:00
Jim Grosbach 23f1f957d5 Clean up some DOxygen comments.
llvm-svn: 170628
2012-12-20 01:14:45 +00:00
Richard Smith a7bb16ad86 Fix an uninitialized member variable, found by -fsanitize=bool.
llvm-svn: 170627
2012-12-20 01:05:39 +00:00