2 Commits

Author	SHA1	Message	Date
Dmitry Preobrazhensky	9e3f86e273	[AMDGPU][MC][NFC][DOC] Updated description of registers ... Corrected list of available register tuples to reflect changes introduced by commits https://reviews.llvm.org/D103672 and https://reviews.llvm.org/D103800 See bug https://bugs.llvm.org/show_bug.cgi?id=51388	2021-09-03 13:09:54 +03:00
Dmitry Preobrazhensky	8ea3e9d9a2	[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description. ... Summary of changes: - Added f16 omod modifier (bug 51386). - Corrected names of data types (bug 48638). - Enabled a16 with most GFX10 MIMG opcodes (see https://reviews.llvm.org/D102231). - Corrected description of integer operands (bug 51130). - Corrected description of 8-bit DS offsets (bug 51536). - Improved PERMLANE op_sel description. - Corrected *SAD* opcode types.	2021-08-27 17:23:20 +03:00