Commit Graph

231241 Commits

Author SHA1 Message Date
Matt Arsenault 891fccc0c1 AMDGPU: Handle alloca promoting with null operands
If the second pointer in a multi-pointer instruction is
a constant, we can replace the type.

llvm-svn: 269945
2016-05-18 15:57:21 +00:00
Matt Arsenault 71fa1f375e AMDGPU: Fix a few slightly broken tests
Fix minor bugs and uses of undef which break when
pointer related optimization passes are run.

llvm-svn: 269944
2016-05-18 15:48:44 +00:00
Matt Arsenault bde80346c1 AMDGPU: Don't run passes that aren't useful
llvm-svn: 269943
2016-05-18 15:41:07 +00:00
Paul Robinson 0531e3d625 [PS4] Clean up some test commentary. NFC
llvm-svn: 269941
2016-05-18 15:35:58 +00:00
Michael Zuckerman 2cacc35343 [Clang][AVX512] completing missing intrinsics [pandnd].
Differential Revision: http://reviews.llvm.org/D20101

llvm-svn: 269939
2016-05-18 15:25:53 +00:00
Matt Arsenault ab3429c2b4 AMDGPU: Fix assert on ttmp registers
Use register class that does not include them when looking
for unallocated registers.

This is hit by the udiv v8i64 test in the opencl integer
conformance test, and takes a few seconds to compile in
a debug build so no test included.

llvm-svn: 269938
2016-05-18 15:19:50 +00:00
Davide Italiano 98f7e0e790 [PM] Port per-function SCCP to the new pass manager.
llvm-svn: 269937
2016-05-18 15:18:25 +00:00
Haojian Wu da5b1131de [ASTMatcher] Fix a ASTMatcher test failure on Windows.
Reviewers: alexfh, aaron.ballman

Subscribers: thakis, cfe-commits, klimek

Differential Revision: http://reviews.llvm.org/D20369

llvm-svn: 269936
2016-05-18 15:15:12 +00:00
Vassil Vassilev 2ee10e6dc6 Teach Sema::MergeFunctionDecl to properly check for an out-of-line definition of a function that is declared as =default in its class definition.
First part of PR27699.

Patch by Cristina Cristescu!

Reviewed by Richard Smith and me.

llvm-svn: 269935
2016-05-18 15:14:46 +00:00
Krzysztof Parzyszek e0026e4e21 [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
Clang follow-up to r269933.

llvm-svn: 269934
2016-05-18 14:56:14 +00:00
Krzysztof Parzyszek ca3b532e2c [Hexagon] Recognize "q" and "v" in inline-asm as register constraints
llvm-svn: 269933
2016-05-18 14:34:51 +00:00
Simon Pilgrim a090864762 Removed duplicate SSE42 builtin tests from avx-builtins.c
llvm-svn: 269932
2016-05-18 14:32:16 +00:00
Simon Pilgrim 519c78f3ae [X86][SSE42] Sync with llvm/test/CodeGen/X86/sse42-intrinsics-fast-isel.ll
llvm-svn: 269931
2016-05-18 14:29:55 +00:00
Dan Gohman b4c3c38276 [WebAssembly] Don't expand divisions by constants.
Don't expand divisions by constants if it would require multiple instructions.
The current assumption is that engines will perform the desired optimizations.

llvm-svn: 269930
2016-05-18 14:29:42 +00:00
Simon Pilgrim 9829df5d56 [X86][SSE42] Added fast-isel tests to sync with clang/test/CodeGen/sse42-builtins.c
llvm-svn: 269929
2016-05-18 14:28:54 +00:00
Haojian Wu 1bc05a681e [clang-tidy] Use unresolvedLookupExpr node matcher from ASTMatcher.
Reviewers: alexfh, aaron.ballman

Subscribers: aaron.ballman, cfe-commits

Differential Revision: http://reviews.llvm.org/D20367

llvm-svn: 269928
2016-05-18 14:11:20 +00:00
Eric Liu c7f3b108e2 [clang-include-fixer] Added Vim integration for clang-include-fixer.
Summary: [clang-include-fixer] Added Vim integration for clang-include-fixer.

Reviewers: hokein, bkramer

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D20329

llvm-svn: 269927
2016-05-18 14:10:16 +00:00
Simon Pilgrim 7a4d7d47c9 [X86][SSE41] Sync with llvm/test/CodeGen/X86/sse41-intrinsics-fast-isel.ll
llvm-svn: 269926
2016-05-18 13:47:16 +00:00
Simon Pilgrim 3b93835f5d [X86][SSE41] Sync with clang/test/CodeGen/sse41-builtins.c
llvm-svn: 269925
2016-05-18 13:46:10 +00:00
Eric Liu baf58c2309 [clang-format] Make formatReplacements() also sort #includes.
Summary: [clang-format] Make formatReplacements() also sort #includes.

Reviewers: bkramer, djasper

Subscribers: klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D20362

llvm-svn: 269924
2016-05-18 13:43:48 +00:00
Benjamin Kramer 6b5160a369 [include-fixer] Don't insert #includes if a fatal error occurred.
This typically happens when the user didn't setup include paths correctly
and the fixer starts adding garbage includes. Avoid that. Disable the error
limit though, as we might hit that easily with missing includes and still
want to fix those cases.

llvm-svn: 269923
2016-05-18 13:32:38 +00:00
Bryan Chan e656f61d1e [SystemZ] Fix register ordering for BinaryRRF instructions
Summary:
The ordering of registers in BinaryRRF instructions are wrong, and
affects the copysign instruction (CPSDR). This results in the wrong
magnitude and sign being set.

Author: zhanjunl

Reviewers: kbarton, uweigand

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D20308

llvm-svn: 269922
2016-05-18 13:24:57 +00:00
Simon Pilgrim 7e148a94a4 [X86][SSE3] Sync with llvm/test/CodeGen/X86/sse3-intrinsics-fast-isel.ll
llvm-svn: 269921
2016-05-18 13:17:39 +00:00
Simon Pilgrim 0b0a583151 [X86][SSE3] Sync with clang/test/CodeGen/sse3-builtins.c
llvm-svn: 269920
2016-05-18 13:16:31 +00:00
Rafael Espindola 3b4ea12e14 White space cleanup.
llvm-svn: 269919
2016-05-18 13:10:27 +00:00
Haojian Wu 4405d5b2cc [clang-tidy] Fix misc-unused-using-decls test failure in windows
buildbot.

llvm-svn: 269918
2016-05-18 13:07:13 +00:00
Kuba Brecka daac6a0083 [sanitizer] Fix a crash when demangling Swift symbols, take 3
The previous patch (r269291) was reverted (commented out) because the patch caused leaks that
were detected by LSan and they broke some lit tests.  The actual reason was that dlsym allocates
an error string buffer in TLS, and some LSan lit tests are intentionally not scanning TLS for
root pointers.  This patch simply makes LSan ignore the allocation from dlsym, because it's
not interesting anyway.

llvm-svn: 269917
2016-05-18 13:00:20 +00:00
Haojian Wu 7751c92582 [ASTMatcher] Add a node matcher for UnresolvedLookupExpr.
Reviewers: alexfh, aaron.ballman

Subscribers: aaron.ballman, klimek, cfe-commits

Differential Revision: http://reviews.llvm.org/D20360

llvm-svn: 269916
2016-05-18 12:53:59 +00:00
Aaron Ballman 54269226ba Removing an unused variable introduced in r269911; NFC.
llvm-svn: 269915
2016-05-18 12:52:04 +00:00
Petar Jovanovic 3ca1622a90 [Mips] Finetuning MIPS32 Android default variants
MIPS32 Android defaults to FPXX ("-fpxx").
MIPS32R6 Android defaults to FP64A ("-mfp64 -mno-odd-spreg").

Differential Revision: http://reviews.llvm.org/D20345

llvm-svn: 269914
2016-05-18 12:46:06 +00:00
Daniel Sanders 016e6c4354 Try again to fix pdbdump-headers.test on big-endian hosts after r269861.
r269898 fixed the problem with HashBuckets but the same issue occurred with
AddressMap and ThunkMap too.

llvm-svn: 269913
2016-05-18 12:36:25 +00:00
Ashutosh Nema 348af9cc6b Add new flag and intrinsic support for MWAITX and MONITORX instructions
Summary:

MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction execution
and enter an implementation-dependent optimized state until occurrence of a
class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper, RKSimon
Subscribers: RKSimon, joker.eph, llvm-commits
Differential Revision: http://reviews.llvm.org/D19795

llvm-svn: 269911
2016-05-18 11:59:12 +00:00
Rafael Espindola e64e230dec Update for llvm change.
llvm-svn: 269910
2016-05-18 11:58:56 +00:00
Rafael Espindola 699281cce7 Don't pass a Reloc::Model to MC.
MC only needs to know if the output is PIC or not. It never has to
decide about creating GOTs and PLTs for example. The only thing that
MC itself uses this information for is expanding "macros" in sparc and
mips. The rest I am pretty sure could be moved to CodeGen.

This is a cleanup and isolates the code from future changes to
Reloc::Model.

llvm-svn: 269909
2016-05-18 11:58:50 +00:00
James Molloy a854c0a0c3 [VectorUtils] Fix nasty use-after-free
In truncateToMinimalBitwidths() we were RAUW'ing an instruction then erasing it. However, that intruction could be cached in the map we're iterating over. The first check is "I->use_empty()" which in most cases would return true, as the (deleted) object was RAUW'd first so would have zero use count. However in some cases the object could have been polluted or written over and this wouldn't be the case. Also it makes valgrind, asan and traditionalists who don't like their compiler to crash sad.

No testcase as there are no externally visible symptoms apart from a crash if the stars align.

Fixes PR26509.

llvm-svn: 269908
2016-05-18 11:57:58 +00:00
Ashutosh Nema 51c9dd0081 Add new intrinsic support for MONITORX and MWAITX instructions
Summary:
MONITORX/MWAITX instructions provide similar capability to the MONITOR/MWAIT
pair while adding a timer function, such that another termination of the MWAITX
instruction occurs when the timer expires. The presence of the MONITORX and 
MWAITX instructions is indicated by CPUID 8000_0001, ECX, bit 29.

The MONITORX and MWAITX instructions are intercepted by the same bits that
intercept MONITOR and MWAIT. MONITORX instruction establishes a range to be
monitored. MWAITX instruction causes the processor to stop instruction
execution and enter an implementation-dependent optimized state until
occurrence of a class of events.

Opcode of MONITORX instruction is "0F 01 FA". Opcode of MWAITX instruction is
"0F 01 FB". These opcode information is used in adding tests for the
disassembler.

These instructions are enabled for AMD's bdver4 architecture.

Patch by Ganesh Gopalasubramanian!

Reviewers: echristo, craig.topper

Subscribers: RKSimon, joker.eph, llvm-commits, cfe-commits

Differential Revision: http://reviews.llvm.org/D19796

llvm-svn: 269907
2016-05-18 11:56:23 +00:00
Haojian Wu 47ea5424d2 [clang-tidy] Fix a template function false positive in misc-unused-using-decls check.
Summary: Ignore warning uninstantiated template function usages.

Reviewers: djasper, alexfh

Subscribers: cfe-commits

Differential Revision: http://reviews.llvm.org/D20326

llvm-svn: 269906
2016-05-18 11:49:34 +00:00
Peter Smith 4df2e14dce Fix typo in comment aligment should be alignment. NFC.
llvm-svn: 269905
2016-05-18 11:40:16 +00:00
Dylan McKay f830f4baa5 [AVR] Remove the 'AVRConfig.h' header
It defined the LLVM_AVR_GCC_COMPAT constant, which would enable/disable
certain GCC-specific behaviours.

There is no point conditionally turning it on/off, as it will always be
turned on, and we have to maintain both code paths anyway.

llvm-svn: 269904
2016-05-18 11:20:48 +00:00
Simon Pilgrim 324d9200d6 [X86][SSSE3] Sync with clang/test/CodeGen/ssse3-builtins.c
llvm-svn: 269903
2016-05-18 11:19:17 +00:00
Simon Pilgrim 102627405c [X86][SSE4A] Sync with clang/test/CodeGen/sse4a-builtins.c
llvm-svn: 269902
2016-05-18 11:14:58 +00:00
Dylan McKay c1ec00fe88 [AVR] Add missing CMake dependencies
llvm-svn: 269901
2016-05-18 11:11:51 +00:00
Dylan McKay f1f1c010e4 [AVR] Fix a few compile errors
llvm-svn: 269900
2016-05-18 11:11:38 +00:00
Simon Dardis 669d8dd8e1 [PATCH] [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they do meet the ISA
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Recommit of rL269893 with reviewers comments.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269899
2016-05-18 10:38:01 +00:00
Daniel Sanders c819d903e1 Attempt to fix pdbdump-headers.test on big-endian hosts after r269861.
llvm-svn: 269898
2016-05-18 09:59:14 +00:00
Simon Dardis b0aa9f2cbe Revert "[mips] Restrict the creation of compact branches"
This reverts commit rL269893.

Incorrect patch applied.

llvm-svn: 269897
2016-05-18 09:51:37 +00:00
Benjamin Kramer 8b55a2b76c [clang-tidy] Fix a functional change from r269656.
Instead of forming char ranges that patch made us form token ranges,
which behave subtly different. Sadly I'm only seeing this as part of a
larger test case that I haven't fully reduced yet.

llvm-svn: 269896
2016-05-18 09:48:46 +00:00
Dylan McKay d56676ed65 [AVR] Convert C style comments to C++
llvm-svn: 269895
2016-05-18 09:43:01 +00:00
Benjamin Kramer 2ecd0902c7 [include-fixer] Run tests with -fno-ms-compatibility.
Something behind that flag makes us get fewer typo correction callbacks,
unbreak the tests on windows for now.

llvm-svn: 269894
2016-05-18 09:28:45 +00:00
Simon Dardis 1549a2f46a [mips] Restrict the creation of compact branches
Restrict the creation of compact branches so that they meet the ISA encoding
requirements. Notably do not permit $zero to be used as a operand for compact
branches and ensure that some other branches fulfil the requirement that
rs != rt.

Fixup cases where $rs > $rt for bnec and beqc.

Reviewers: dsanders, vkalintiris

Differential Review: http://reviews.llvm.org/D20284

llvm-svn: 269893
2016-05-18 09:21:44 +00:00