Commit Graph

2251 Commits

Author SHA1 Message Date
Chad Rosier 75df5680fe [AArch64] Fix v1fx patterns for Floating-point Multiply Extend and Floating-point Compare to Zero.
llvm-svn: 197403
2013-12-16 18:29:54 +00:00
Rafael Espindola ee4b398828 Add tests for all DescriptionString in Targets.cpp.
These right now just test that the same string is present in two files, but will
become more useful as clang's handling of DataLayout is refactored.

llvm-svn: 197347
2013-12-15 17:53:44 +00:00
Rafael Espindola a8df53f4ad Consolidate DataLayout string testing in one file.
llvm-svn: 197276
2013-12-13 21:49:53 +00:00
Rafael Espindola 46ea763e7c Convert test to FileCheck.
llvm-svn: 197269
2013-12-13 20:11:02 +00:00
Rafael Espindola 4c50d46e0c Convert test to FileCheck
llvm-svn: 197267
2013-12-13 19:44:40 +00:00
Rafael Espindola f62bcc0d9c Use a: and s: instead of a0: and s0: in the DataLayout strings.
They are equivalent and the size of 'a' and 's' is unused.

llvm-svn: 197256
2013-12-13 18:40:15 +00:00
Rafael Espindola 14c57ebed5 Convert test to FileCheck and make it more strict.
llvm-svn: 197248
2013-12-13 17:47:34 +00:00
Rafael Espindola 984c9d86cb Add a clang side test for pr18235 too.
llvm-svn: 197242
2013-12-13 16:11:31 +00:00
Kevin Qin daaae418d8 Fix Incorrect CHECK message [0-31]+ in test case.
In regular expression, [0-31]+ equals to [0-3]+, not the number from
0 to 31. So change it to [0-9]+.

llvm-svn: 197112
2013-12-12 02:17:35 +00:00
Reid Kleckner 5dc20b13e7 Update clang MS inline asm tests for r196939
llvm-svn: 196940
2013-12-10 18:27:51 +00:00
Daniel Sanders c309be2f1f [mips][msa] Correct sld and sldi builtins.
Summary: The result register of these instructions is also the first operand.

Reviewers: jacksprat, dsanders

Reviewed By: dsanders

Differential Revision: http://llvm-reviews.chandlerc.com/D2362
Differential Revision: http://llvm-reviews.chandlerc.com/D2363

llvm-svn: 196910
2013-12-10 11:37:00 +00:00
Kevin Qin fb79d7f843 [AArch64 NEON] Support poly128_t and implement relevant intrinsic.
llvm-svn: 196888
2013-12-10 06:49:01 +00:00
Hao Liu 844a7da243 [AArch64]Add missing pair intrinsics such as:
int32_t vminv_s32(int32x2_t a) 
which should be compiled into SMINP Vd.2S,Vn.2S,Vm.2S

llvm-svn: 196750
2013-12-09 03:52:22 +00:00
Ana Pazos 6a8b8b5f0d Implemented vget/vset_lane_f16 intrinsics
llvm-svn: 196535
2013-12-05 21:13:24 +00:00
Alp Toker f6a24ce40f Fix a tranche of comment, test and doc typos
llvm-svn: 196510
2013-12-05 16:25:25 +00:00
Alp Toker d473363876 Correct hyphenations in comments and assert messages
This patch tries to avoid unrelated changes other than fixing a few
hyphen-related ambiguities in nearby lines.

llvm-svn: 196466
2013-12-05 04:47:09 +00:00
Reid Kleckner 739756c0f9 [ms-cxxabi] Construct and destroy call arguments in the correct order
Summary:
MSVC destroys arguments in the callee from left to right.  Because C++
objects have to be destroyed in the reverse order of construction, Clang
has to construct arguments from right to left and destroy arguments from
left to right.

This patch fixes the ordering by reversing the order of evaluation of
all call arguments under the MS C++ ABI.

Fixes PR18035.

Reviewers: rsmith

Differential Revision: http://llvm-reviews.chandlerc.com/D2275

llvm-svn: 196402
2013-12-04 19:23:12 +00:00
Richard Sandiford cdd86884a4 [SystemZ] Fix handling of pass-by-pointer arguments
I'd misunderstood getIndirect() to mean that the argument should be passed
as a pointer at the ABI level, with the ByVal argument choosing caller-copy
semantics over no-caller-copy (callee-copy-on-write) semantics.  But
getIndirect(x) actually means that x is passed by pointer at the IR
level but (at least on all other targets I looked at) directly at the
ABI level.  getIndirect(x, false) selects a pointer to a caller-made
copy, which is what SystemZ was aiming for.

This fixes a miscompilation of c-index-test.  Structure arguments were being
passed by pointer, but no copy was being made, so a write in the callee
stomped over a caller's local variable.

llvm-svn: 196370
2013-12-04 09:59:57 +00:00
Kevin Qin ad53b87c70 [AArch64 NEON] Add ACLE intrinsic vceqz_f64.
llvm-svn: 196361
2013-12-04 08:02:11 +00:00
Kevin Qin 8903f8df4b [AArch64 NEON] Add missing compare intrinsics.
llvm-svn: 196359
2013-12-04 07:53:09 +00:00
NAKAMURA Takumi 0acd8a7561 clang/test: REQUIRES: s/x86-64-registered-target/x86-registered-target/
llvm-svn: 196350
2013-12-04 03:41:33 +00:00
NAKAMURA Takumi 7cbe30fc43 clang/test: REQUIRES: s/ppc{32|64}-registered-target/powerpc-registered-target/
llvm-svn: 196349
2013-12-04 03:41:15 +00:00
NAKAMURA Takumi a1d1388a2b clang/test/CodeGen/builtins-nvptx.c: Prune "REQUIRES: nvptx64-registered-target". "nvptx" should imply it.
llvm-svn: 196348
2013-12-04 03:41:02 +00:00
Hao Liu a5246fde90 [AArch64]Add missing floating point convert, round and misc intrinsics.
E.g. int64x1_t vcvt_s64_f64(float64x1_t a) -> FCVTZS Dd, Dn

llvm-svn: 196211
2013-12-03 06:07:13 +00:00
Hao Liu 38658a8186 AArch64: add missing ACLE intrinsics mapping to general arithmetic operation from VFP instructions.
E.g. float64x1_t vadd_f64(float64x1_t a, float64x1_t b) -> FADD Dd, Dn, Dm.

llvm-svn: 196209
2013-12-03 05:58:49 +00:00
Jiangning Liu e82327ddd3 Patch by Ana Pazos.
Fixed vcopy_laneq_f64 intrinsic implementation.

llvm-svn: 196206
2013-12-03 05:36:55 +00:00
Hao Liu 4b850c5e0d revert r196152.
This is a duplicate implementation.
E.g. this patch defines:
     float64_t vabd_f64(float64_t a, float64_t b)
But there is already a similar intrinsic "vabdd_f64" with the same types.
Also, this intrinsic will be conflicted to the vector type intrinsic as following(Which is implemented by me and will be committed to trunk):
     float64x1_t vabd_f64(float64x1_t a, float64x1_t b).
Two functions shouldn't have a same name in arm_neon.h.
According to ARM ACLE document, such vabd_f64 with float64_t is not existing.
So I revert this commit.

llvm-svn: 196205
2013-12-03 05:35:17 +00:00
Hao Liu ce258820ca AArch64: Add missing scalar pair intrinsics.
E.g. "float32_t vaddv_f32(float32x2_t a)" to be matched into "faddp s0, v1.2s".

llvm-svn: 196199
2013-12-03 03:40:08 +00:00
Jiangning Liu 2d31f6f610 Add some missing AArch64 Neon intrinsics like vuqadd_s64 and friends.
llvm-svn: 196191
2013-12-03 01:33:16 +00:00
Jiangning Liu cc1da2c938 Add some missing AArch64 Neon intrinsics like vmull_high_n_s16 and friends.
llvm-svn: 196189
2013-12-03 01:28:55 +00:00
Chad Rosier 25052adf21 [AArch64] Implemented vcopy_lane patterns using scalar DUP instruction.
Patch by Ana Pazos!

llvm-svn: 196153
2013-12-02 21:07:27 +00:00
Chad Rosier b0574f3bf7 [AArch64] Add missing NEON scalar floating-point to integer convert ACLEs.
llvm-svn: 196152
2013-12-02 21:07:24 +00:00
Hao Liu 8a0099e02c Fix the problem that the range check for scalar narrow shift is too wide.
E.g. the immediate value of vshrns_n_s16 is [1,16], which should be [1,8].

llvm-svn: 195942
2013-11-29 02:13:17 +00:00
Jiangning Liu 24173dd4b1 Add missing intrinsic function vbsl_f64 for AArch64 NEON.
llvm-svn: 195940
2013-11-29 01:38:49 +00:00
Jiangning Liu c8a9d762d3 Add missing intrinsic function vcombine_f64 for AArch64 NEON.
llvm-svn: 195937
2013-11-29 01:29:57 +00:00
Jiangning Liu ee3e08799c Fix the AArch64 NEON bug exposed by checking constant integer argument range of ACLE intrinsics.
llvm-svn: 195844
2013-11-27 14:02:55 +00:00
Chad Rosier 9e59285cc8 [AArch64] Add support for NEON scalar floating-point absolute difference.
llvm-svn: 195804
2013-11-27 01:46:19 +00:00
Chad Rosier 52e31b20cb [AArch64] Add support for NEON scalar floating-point to integer convert
instructions.

llvm-svn: 195789
2013-11-26 22:17:51 +00:00
Manman Ren 4b7f23d885 Debug Info: add a "Debug Info Version" module flag to output the current debug
info version number.

Will error out when modules have different version numbers.

llvm-svn: 195495
2013-11-22 19:42:45 +00:00
Justin Bogner 7fa2eb9f49 Revert r193994 and part of r193995
Not long ago I made the CodeGen of for loops simplify the condition at
-O0 in the same way we do for if and conditionals. Unfortunately this
ties how loops and simple conditions work together too tightly, which
makes features such as instrumentation based PGO awkward.

Ultimately, we should find a more general way to simplify the logic in
a given condition, but for now we'll just avoid using EmitBranchOnBool
for loops, like we already do for while and do loops.

llvm-svn: 195438
2013-11-22 10:20:43 +00:00
Artyom Skrobov be36c42df6 Deleting three tests that are redundant with test/Preprocessor/arm-target-features.c and test/Driver/arm-cortex-cpus.c
llvm-svn: 195430
2013-11-22 09:21:51 +00:00
Jiangning Liu 72b624ac16 For AArch64, intrinsic vget_low_xxx can be optimized away.
llvm-svn: 195409
2013-11-22 02:46:20 +00:00
Ana Pazos dbd1a22496 Implemented Neon scalar vdup_lane intrinsics.
Fixed scalar dup alias and added test case.

llvm-svn: 195329
2013-11-21 08:15:01 +00:00
Ana Pazos 2b02688fd9 Implemented Neon scalar by element intrinsics.
Intrinsics implemented: vqdmull_lane, vqdmulh_lane, vqrdmulh_lane,
vqdmlal_lane, vqdmlsl_lane scalar Neon intrinsics.

llvm-svn: 195326
2013-11-21 07:36:33 +00:00
Justin Holewinski f9329ff650 [NVPTX] Update ABI handling
For PTX, we want the target to handle struct returns directly.

llvm-svn: 195268
2013-11-20 20:35:34 +00:00
Reid Kleckner cc99e26475 Add a mangler entry point for TBAA rather than using RTTI directly
Summary:
RTTI is not yet implemented for the Microsoft C++ ABI and isn't expected
soon.  We could easily add the mangling, but the error is what prevents
us from silently miscompiling code that expects RTTI.

Instead, add a new mangleTypeName entry point that simply forwards to
mangleName or mangleType to produce a string that isn't part of the ABI.
Itanium can continue to use RTTI names to avoid unecessary test
breakage.

This also seems like the right design.  The fact that TBAA names happen
to be RTTI names is now an implementation detail of the mangler, rather
than part of TBAA.

Differential Revision: http://llvm-reviews.chandlerc.com/D2153

llvm-svn: 195168
2013-11-19 23:23:00 +00:00
Hao Liu 171cedf61e Implement AArch64 neon instructions class SIMD lsone and SIMD lone-post.
llvm-svn: 195079
2013-11-19 02:17:31 +00:00
Jiangning Liu fe916e20f2 Implement AArch64 SISD intrinsics for vget_high and vget_low.
llvm-svn: 195073
2013-11-19 01:46:34 +00:00
Jiangning Liu 3311f374a8 Add predicate for AArch64 crypto instructions.
llvm-svn: 195069
2013-11-19 01:38:19 +00:00
Hao Liu 5e4ce1ae9d Implement the newly added AArch64 ACLE functions for ld1/st1 with 2/3/4 vectors.
The functions are like: vst1_s8_x2 ...

llvm-svn: 194991
2013-11-18 06:33:43 +00:00