Commit Graph

357154 Commits

Author SHA1 Message Date
Craig Topper 8885a7640b [X86] Separate imm from relocImm handling.
relocImm was a complexPattern that handled both ConstantSDNode
and X86Wrapper. But it was only applied selectively because using
it would cause patterns to be not importable into FastISel or
GlobalISel. So it only got applied to flag setting instructions,
stores, RMW arithmetic instructions, and rotates.

Most of the test changes are a result of making patterns available
to GlobalISel or FastISel. The absolute-cmp.ll change is due to
this fixing a pattern ordering issue to make an absolute symbol
match to an 8-bit immediate before trying a 32-bit immediate.

I tried to use PatFrags to reduce the repetition, but I was getting
errors from TableGen.
2020-06-13 11:29:28 -07:00
Amanieu d'Antras 6973125cb7 Fix FastISel dropping srcloc metadata from InlineAsm
Summary:
Bugzilla: https://bugs.llvm.org/show_bug.cgi?id=46060

I've also added the Extra_IsConvergent flag which was missing from FastISel.

Reviewers: echristo

Reviewed By: echristo

Subscribers: hiraditya, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80759
2020-06-13 16:52:37 +01:00
Xing GUO 8a2ff19272 [lldb][test] Trying to fix build bot after 0431e4bcb2 2020-06-13 23:53:13 +08:00
Xing GUO 0431e4bcb2 Recommit "[DWARFYAML][debug_line] Replace `InitialLength` with `Format` and `Length`."
This recommits fcc0c186e9
2020-06-13 23:39:11 +08:00
Bruno Ricci c669a1ed63
[clang][NFC] Pack LambdaExpr
This saves sizeof(void *) bytes per LambdaExpr.

Review-after-commit since this is a straightforward change similar
to the work done on other nodes. NFC.
2020-06-13 14:31:13 +01:00
mydeveloperday 0487f6f19c [clang-format] Fix short block when braking after control statement
Summary:
This patch fixes bug #44192

When clang-format is run with option AllowShortBlocksOnASingleLine, it is expected to either succeed in putting the short block with its control statement on a single line or fail and leave the block as is. When brace wrapping after control statement is activated, if the block + the control statement length is superior to column limit but the block alone is not, clang-format puts the block in two lines: one for the control statement and one for the block. This patch removes this unexpected behaviour. Current unittests are updated to check for this behaviour.

Patch By: Bouska

Reviewed By: MyDeveloperDay

Differential Revision: https://reviews.llvm.org/D71512
2020-06-13 14:19:49 +01:00
Bruno Ricci 6a79f5aa5d
[clang][NFC] Add an AST dump test for LambdaExpr
This test illustrate the bug fixed in D81787.
2020-06-13 14:03:25 +01:00
Bruno Ricci f13d704a50
[clang][NFC] Mark CWG 1443 (Default arguments and non-static data members)...
...as done. This is a NAD which has always been implemented correctly.
2020-06-13 13:59:54 +01:00
Bruno Ricci eb614db0a0
[clang][NFC] Mark CWG 974 and 1814 (default argument in a...
...lambda-expression) as done. They have been allowed since at least clang 3.3.
2020-06-13 13:49:07 +01:00
Xing GUO 325f7607b0 Revert "[DWARFYAML][debug_line] Replace `InitialLength` with `Format` and `Length`."
This reverts commit fcc0c186e9.
2020-06-13 17:57:02 +08:00
Xing GUO fcc0c186e9 [DWARFYAML][debug_line] Replace `InitialLength` with `Format` and `Length`. 2020-06-13 17:47:06 +08:00
Nikita Popov f87b785abe Reapply [LVI] Restructure caching to fix non-determinism
This was reverted due to a reported memory usage increase. However,
a test case was never provided, and I wasn't able to reproduce it
myself.

Relative to the original patch, I have moved the block cache
structure behind a unique_ptr, to avoid storing a huge structure
inside a DenseMap.

---

Variant on D70103 to fix https://bugs.llvm.org/show_bug.cgi?id=43909.
The caching is switched to always use a BB to cache entry map, which
then contains per-value caches. A separate set contains value handles
with a deletion callback. This allows us to properly invalidate
overdefined values.

A possible alternative would be to always cache by value first and
have per-BB maps/sets in the each cache entry. In that case we could
use a ValueMap and would avoid the separate value handle set. I went
with the BB indexing at the top level to make it easier to integrate
D69914, but possibly that's not the right choice.

Differential Revision: https://reviews.llvm.org/D70376
2020-06-13 11:31:40 +02:00
Amanieu d'Antras 0c1a135ada [libunwind][RISCV] Track PC separately from RA
Summary:
This allows unwinding to work across signal handler frames where the IP of the previous frame is not the same as the current value of the RA register. This is particularly useful for acquiring backtraces from signal handlers.

I kept the size of the context structure the same to avoid ABI breakage; the PC is stored in the previously unused slot for register 0.

Reviewers: #libunwind, mhorne, lenary, luismarques, arichardson, compnerd

Reviewed By: #libunwind, mhorne, lenary, compnerd

Subscribers: kamleshbhalui, jrtc27, bsdjhb, arichardson, compnerd, simoncook, kito-cheng, shiva0217, rogfer01, rkruppe, psnobl, benna, Jim, s.egerton, sameer.abuasal, evandro, llvm-commits, libcxx-commits

Tags: #libunwind, #llvm

Differential Revision: https://reviews.llvm.org/D78931
2020-06-13 08:15:40 +01:00
Jonas Devlieghere ff058e7331 [lldb] Remove unnecessary c_str() in OutputFormattedHelpText calls (NFC) 2020-06-12 21:13:21 -07:00
Jonas Devlieghere 58e34ede5b [lldb] Small improvements in ValueObjectPrinter::PrintDecl (NFC)
Remove unused argument, simply code and reformat.
2020-06-12 21:05:05 -07:00
Craig Topper 2831f7852f [X86] Remove brand_id check from getHostCPUName.
Brand index was a feature some Pentium III and Pentium 4 CPUs.
It provided an index into a software lookup table to provide a
brand name for the CPU. This is separate from the family/model.

It's unclear to me why this index being non-zero was used to
block checking family/model. I think the effect of this is that
-march=native was not working correctly on the CPUs that have a
non-zero brand index. They are all about 20 years old so this
probably hasn't affected many users.
2020-06-12 20:38:30 -07:00
Craig Topper 033bf61cc5 [X86] Remove brand_id check from cpu_indicator_init.
Brand index was a feature some Pentium III and Pentium 4 CPUs.
It provided an index into a software lookup table to provide a
brand name for the CPU. This is separate from the family/model.

It's unclear to me why this index being non-zero was used to
block checking family/model. None of the CPUs that had a non-zero
brand index are supported by __builtin_cpu_is or target
multi-versioning so this should have no real effect.
2020-06-12 20:35:48 -07:00
Mehdi Amini 339e49e2ca Fix GCC5 build by renaming variable used in 'auto' deduction (NFC)
GCC5 errors out with:

llvm/lib/Analysis/StackSafetyAnalysis.cpp:935:21: error: use of 'KV' before deduction of 'auto'
     for (auto &KV : KV.second.Params) {
                     ^
2020-06-13 03:08:56 +00:00
Dan Gohman 6604295959 [WebAssembly] WebAssembly doesn't support "protected" visibility
Implement the `hasProtectedVisibility()` hook to indicate that, like
Darwin, WebAssembly doesn't support "protected" visibility.

On ELF, "protected" visibility is intended to be an optimization, however
in practice it often [isn't], and ELF documentation generally ranges from
[not mentioning it at all] to [strongly discouraging its use].

[isn't]: https://www.airs.com/blog/archives/307
[not mentioning it at all]: https://gcc.gnu.org/wiki/Visibility
[strongly discouraging its use]: https://www.akkadia.org/drepper/dsohowto.pdf

While here, also mention the new Reactor support in the release notes.
2020-06-12 19:52:35 -07:00
Craig Topper a27d0dcf65 [X86] Combine the three feature variables in getHostCPUName into an array and pass it around as an array reference.
This makes the setting and clearing of bits simpler.
2020-06-12 18:30:41 -07:00
Craig Topper 94ccb2acbf [X86] Combine to two feature variables in __cpu_indicator_init into an array and pass them around as pointer we can treat as an array.
This simplifies the indexing code to set and test bits.
2020-06-12 18:30:41 -07:00
Craig Topper e424a3526a [X86] Explicitly initialize __cpu_features2 global in compiler-rt to 0.
Seems like this may be needed in order for the linker to find the
symbol. At least on my Mac.
2020-06-12 18:30:34 -07:00
Vitaly Buka c1e47b47f8 [StackSafety] Run ThinLTO
Summary:
ThinLTO linking runs dataflow processing on collected
function parameters. Then StackSafetyGlobalInfoWrapperPass
in ThinLTO backend will run as usual looking up to external
symbol in the summary if needed.

Depends on D80985.

Reviewers: eugenis, pcc

Reviewed By: eugenis

Subscribers: inglorion, hiraditya, steven_wu, dexonsmith, cfe-commits, llvm-commits

Tags: #clang, #llvm

Differential Revision: https://reviews.llvm.org/D81242
2020-06-12 18:11:29 -07:00
Vitaly Buka e6ce0dc5de [StackSafety,NFC] Extract addOverflowNever 2020-06-12 17:42:32 -07:00
Eric Schweitz 4741835e03 [flang] Add the helper class for building fir.do_loop operations. A fir.do_loop models the semantics of a Fortran DO loop construct. One can use this operation to explicitly capture a DO loop for passing into the high-level optimizer.
Differential revision: https://reviews.llvm.org/D81692
2020-06-12 17:28:00 -07:00
George Mitenkov cf2b4d5cb6 [MLIR][SPIRVToLLVM] Implemented shift conversion pattern
This patch has shift ops conversion implementation. In SPIR-V dialect,
`Shift` and `Base` may have different bit width. On the contrary,
in LLVM dialect both `Base` and `Shift` have to be of the same bit width.
This leads to the following cases:
- if `Base` has the same bit width as `Shift`, the conversion is
  straightforward.
- if `Base` has a greater bit width than `Shift`, shift is sign/zero
  extended first. Then the extended value is passed to the shift.
- otherwise the conversion is considered to be illegal.

Differential Revision: https://reviews.llvm.org/D81546
2020-06-12 19:04:30 -04:00
Jonas Devlieghere da601ea731 [lldb/Test] Assert that no targets or modules remain after a test completes.
The reproducer intentionally leak every object allocated during replay,
which means that modules never get orphaned. If this were to happen for
another reason, we might not be testing what we think we are. Assert
that there are no targets left at the end of a test and that the global
module cache is empty in the non-reproducer scenario.

Differential revision: https://reviews.llvm.org/D81612
2020-06-12 15:17:44 -07:00
Pete Steinfeld bb2f6f66c7 [flang] Added test for specification expressions
I added a test the exercises all of the cases instances of specification expressions as defined in section 10.1.11.

Summary: [flang] Added test for specification expressions

Reviewers: tskeith, klausler, DavidTruby

Subscribers: llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81759
2020-06-12 15:13:24 -07:00
HazemAbdelhafez d7e6f116f4 [mlir][spirv] Enhance structure type member decoration handling
Modify structure type in SPIR-V dialect to support:
1) Multiple decorations per structure member
2) Key-value based decorations (e.g., MatrixStride)

This commit kept the Offset decoration separate from members'
decorations container for easier implementation and logical clarity.
As such, all references to Structure layoutinfo are now offsetinfo,
and any member layout defining decoration (e.g., RowMajor for Matrix)
will be add to the members' decorations container along with its
value if any.

Differential Revision: https://reviews.llvm.org/D81426
2020-06-12 17:57:14 -04:00
Casey Carter 8b828e9838 [libcxx][test] Silence MSVC signed-to-unsigned implicit conversion warnings 2020-06-12 14:54:51 -07:00
Jonas Devlieghere 8f9eb70353 [lldb/Test] Fix unit test suffixes and add a CMake error.
Lit will only look for unittest targets ending in `Tests`. Add an error
when the target doesn't have the `Tests` suffix.
2020-06-12 14:18:27 -07:00
Thomas Lively d2c394e74f [WebAssembly] Add intrinsic for i64x2.mul
Summary:
This instruction was implemented in 3181273be7, but that commit did
not add an intrinsic for it.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81757
2020-06-12 14:08:18 -07:00
Eric Christopher b422fe7d62 Temporarily revert "[MemCpyOptimizer] Simplify API of processStore and processMem* functions"
as it seems to be causing some internal crashes in AA after
email with the author.

This reverts commit f79e6a8847.
2020-06-12 14:01:27 -07:00
Jonas Devlieghere bfea1df9f0 [lldb/Test] Fix unittest name
Lit looks for the Tests prefix in the unit test name.
2020-06-12 14:01:14 -07:00
Roman Lebedev 17f7654152
[NFCI][MachineCopyPropagation] invalidateRegister(): use SmallSet<8> instead of DenseSet.
This decreases the time consumed by the pass [during RawSpeed unity build]
by 25% (0.0586 s -> 0.04388 s).

While that isn't really impressive overall, that wasn't the goal here.
The memory results here are noticeable.
The baseline results are:
```
total runtime: 55.65s.
calls to allocation functions: 19754254 (354960/s)
temporary memory allocations: 4951609 (88974/s)
peak heap memory consumption: 239.13MB
peak RSS (including heaptrack overhead): 463.79MB
total memory leaked: 198.01MB
```
While with this patch the results are:
```
total runtime: 55.37s.
calls to allocation functions: 19068237 (344403/s)   # -3.47 %
temporary memory allocations: 4261772 (76974/s)      # -13.93 % (!!!)
peak heap memory consumption: 239.13MB
peak RSS (including heaptrack overhead): 463.73MB
total memory leaked: 198.01MB
```

So we get rid of *a lot* of temporary allocations.

Using `SmallSet<8>` makes sense to me because at least here
for x86 BdVer2, the size of that set is *never* more than 3,
over all of llvm test-suite + RawSpeed.

The story might be different on other targets,
not sure if it will ever justify whole DenseSet,
but if it does SmallDenseSet might be a compromise.
2020-06-12 23:10:54 +03:00
Roman Lebedev 7aeb41b3c8
[NFCI] VectorCombine: add statistic for bitcast(shuf()) -> shuf(bitcast()) xform 2020-06-12 23:10:53 +03:00
Roman Lebedev 55eb714a0e
[NFC] OpenMPOpt: add a statistic for num of parallel regions deleted 2020-06-12 23:10:53 +03:00
Kazushi (Jam) Marukawa ca77aa03fe Add GNU idutils tag filename to .gitignore.
Differential Revision: https://reviews.llvm.org/D81331
2020-06-12 16:06:44 -04:00
Ronak Chauhan 480a16d5c8 [MC] Changes to help improve target specific symbol disassembly
Summary:
This commit slightly modifies the MCDisassembler, and llvm-objdump to
allow targets to also decode entire symbols.

WebAssembly uses the onSymbolStart hook it to decode preludes.
WebAssembly partially disassembles the symbol in its target specific
way; and then falls back to the normal flow of llvm-objdump.

AMDGPU needs it to decode kernel descriptors entirely, and move to the
next symbol.

This commit is to split the above task into 2.
- Changes to llvm-objdump and MC-layer without breaking WebAssembly code
  [ this commit ]
- AMDGPU's implementation of onSymbolStart that decodes kernel
  descriptors. [ https://reviews.llvm.org/D80713 ]

Reviewers: scott.linder, t-tye, sunfish, arsenm, jhenderson, MaskRay, aardappel

Reviewed By: scott.linder, jhenderson, aardappel

Subscribers: bcain, dschuff, wdng, tpr, sbc100, jgravelle-google, hiraditya, aheejin, MaskRay, rupprecht, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D80512
2020-06-12 15:51:37 -04:00
Christopher Tetreault 339177d1da [SVE] Break dependency of Type.h on DerivedTypes.h
Summary:
Inline functions in Type.h depended upon inline functions isVectorTy and
getScalarType defined in DerivedTypes.h. Reimplement these functions in
Type.h in terms of Type

Reviewers: rengolin, efriedma, echristo, c-rhodes, david-arm

Reviewed By: echristo

Subscribers: tschuett, rkruppe, psnobl, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81684
2020-06-12 12:43:33 -07:00
David Blaikie 5146fc15fc llvm-dwarfdump: Include unit count in DWP index header dumping
And add comma separators (to be consistent with recent
changes/improvements to the dumping of other section headers) while I'm
here.
2020-06-12 12:40:02 -07:00
Vladimir Vereschaka f8d87ce9ca [CMake] Use 'ssh.py' executor to run the remote library tests.
In order to support the libcxx new format changes SSHExecutor was
replaced with ssh.py script in the following way:

LIBxxx_EXECUTOR="<llvm-root>/libcxx/utils/ssh.py --host <username>@<host>"

See 96e6cbbf94 commit for details.
2020-06-12 12:31:59 -07:00
Michael Liao ec02635d10 [amdgpu] Skip OR combining on 64-bit integer before legalizing ops.
Reviewers: arsenm, rampitec

Subscribers: kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, hiraditya, kerbowa, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D81710
2020-06-12 15:22:38 -04:00
Sterling Augustine e64059828f Revert "[analyzer][NFC] Don't allow dependency checkers to emit diagnostics"
Summary:
This reverts commit 33fb9cbe21.

That commit violates layering by adding a dependency from StaticAnalyzer/Core
back to StaticAnalyzer/FrontEnd, creating a circular dependency.

I can't see a clean way to fix it except refactoring.

Reviewers: echristo, Szelethus, martong

Subscribers: xazax.hun, baloghadamsoftware, szepet, rnkovacs, a.sidorin, mikhail.ramalho, donat.nagy, dkrupp, Charusso, ASDenysPetrov, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D81752
2020-06-12 12:10:13 -07:00
Erich Keane 884fb45ed2 Update Kaleidoscope tutorial inline code
Reported on IRC, the tutorial code at the bottom of the page correctly
namespaces the FunctionPassManager, but the as-you-go code does not.
This patch adds the namespace to those.
2020-06-12 12:02:35 -07:00
Louis Dionne 9c2c698fd4 [libc++] Add missing sitedir to local Lit config
It relied on the site dir being added by a previous config file.
2020-06-12 14:58:54 -04:00
Stanislav Mekhanoshin 58de24ce6c [AMDGPU] Sorted targets in amdgpu-features.cl. NFC. 2020-06-12 11:57:40 -07:00
Casey Carter 6ffa6a300d [libcxx][test] include <algorithm> for is_permutation 2020-06-12 11:54:03 -07:00
Amara Emerson 1cbebd95de [AArch64][GlobalISel] Legalize vector G_PTR_ADD and enable selection.
Differential Revision: https://reviews.llvm.org/D81419
2020-06-12 11:25:17 -07:00
David Green 46529978bf [ARM] Always use reductions intrinsics under MVE
Similar to a recent change to the X86 backend, this changes things so
that we always produce a reduction intrinsics for all reduction types,
not just the legal ones. This gives a better chance in the backend to
custom lower them to something more suitable for MVE. Especially for
something like fadd the in-order reduction produced during DAG lowering
is already better than the shuffles produced in the midend, and we can
do even better with a bit of custom lowering.

Differential Revision: https://reviews.llvm.org/D81398
2020-06-12 19:21:17 +01:00