Commit Graph

2364 Commits

Author SHA1 Message Date
Chris Lattner 3b18762f40 Switch to using Simplified ConstantFP::get API.
llvm-svn: 49977
2008-04-20 00:41:09 +00:00
Duncan Sands 1ec193e90b Implement a bit more softfloat support in
LegalizeTypes.  Correct the load logic so
that it actually works, and also teach it
to handle floating point extending loads.

llvm-svn: 49923
2008-04-18 20:56:03 +00:00
Duncan Sands a8a61562af Add some more FIXME's for indexed loads and stores.
llvm-svn: 49916
2008-04-18 20:27:12 +00:00
Duncan Sands b4e0b24e0a Provide an explicit list of operands to MakeLibcall,
rather than having it suck them out of a node.  Add
a bunch of new libcalls, and remove dead softfloat
code (dead, because FloatToInt is used not Expand
in this case).  Note that indexed stores probably
aren't handled properly, likewise for loads.

llvm-svn: 49915
2008-04-18 20:25:14 +00:00
Dan Gohman 75c895dbc4 Remove the implicit conversion from SDOperandPtr to SDOperand*; this
may fix a build error on Visual Studio.

llvm-svn: 49876
2008-04-17 23:02:12 +00:00
Dan Gohman 9752a8f3b4 Correct the SrcValue information in the Expand code for va_copy.
llvm-svn: 49839
2008-04-17 02:09:26 +00:00
Roman Levenstein a3ee1a38a3 Ongoing work on improving the instruction selection infrastructure:
Rename SDOperandImpl back to SDOperand.
Introduce the SDUse class that represents a use of the SDNode referred by
an SDOperand. Now it is more similar to Use/Value classes.

Patch is approved by Dan Gohman.

llvm-svn: 49795
2008-04-16 16:15:27 +00:00
Dan Gohman 82b6673c44 Fix the new scheduler assertion checks to work when
the scheduler has inserted no-ops. This fixes
the 2006-07-03-schedulers.ll regression on ppc32.

llvm-svn: 49747
2008-04-15 22:40:14 +00:00
Nicolas Geoffray 7000c8f1aa Change Divided flag to Split, as suggested by Evan
llvm-svn: 49715
2008-04-15 08:08:50 +00:00
Dan Gohman 4370f26750 Treat EntryToken nodes as "passive" so that they aren't added to the
ScheduleDAG; they don't correspond to any actual instructions so they
don't need to be scheduled.

This fixes a bug where the EntryToken was being scheduled multiple
times in some cases, though it ended up not causing any trouble because 
EntryToken doesn't expand into anything. With this fixed the schedulers
reliably schedule the expected number of units, so we can check this
with an assertion.

This requires a tweak to test/CodeGen/X86/loop-hoist.ll because it
ends up getting scheduled differently in a trivial way, though it was
enough to fool the prcontext+grep that the test does.

llvm-svn: 49701
2008-04-15 01:22:18 +00:00
Dan Gohman e5f21cea3e In -view-sunit-dags, display "special" chain dependencies as cyan
instead of blue to distinguish them from regular dependencies.

llvm-svn: 49696
2008-04-14 23:15:07 +00:00
Dan Gohman 5b61a288a7 Avoid creating MERGE_VALUES nodes for single values.
llvm-svn: 49676
2008-04-14 18:43:25 +00:00
Dan Gohman 2505d86783 Fix const-correctness issues with the SrcValue handling in the
memory intrinsic expansion code.

llvm-svn: 49666
2008-04-14 17:55:48 +00:00
Nicolas Geoffray db0ea1ff4e Fix /test/CodeGen/PowerPC/big-endian-actual-args.ll for linux/ppc32
llvm-svn: 49652
2008-04-14 17:17:14 +00:00
Duncan Sands 6c503f9a65 Initial libcall support for LegalizeTypes. This is
much simpler than in LegalizeDAG because calls are
not yet expanded into call sequences: that happens
after type legalization has finished.

llvm-svn: 49634
2008-04-14 06:48:48 +00:00
Duncan Sands 0a8a4c4a0c LegalizeTypes can sometimes have deleted nodes
in its maps.  Add some sanity checks that catch
this kind of thing.  Hopefully these can be
removed one day (once all problems are fixed!)
but for the moment it seems wise to have them in.

llvm-svn: 49612
2008-04-13 16:04:03 +00:00
Nicolas Geoffray dcc2eda5fc Add a divided flag for the first piece of an argument divided into mulitple parts. Fixes PR1643
llvm-svn: 49611
2008-04-13 13:40:22 +00:00
Duncan Sands 844d55a42a Factor some libcall code.
llvm-svn: 49583
2008-04-12 17:14:18 +00:00
Dan Gohman 544ab2c50b Drop ISD::MEMSET, ISD::MEMMOVE, and ISD::MEMCPY, which are not Legal
on any current target and aren't optimized in DAGCombiner. Instead
of using intermediate nodes, expand the operations, choosing between
simple loads/stores, target-specific code, and library calls,
immediately.

Previously, the code to emit optimized code for these operations
was only used at initial SelectionDAG construction time; now it is
used at all times. This fixes some cases where rep;movs was being
used for small copies where simple loads/stores would be better.

This also cleans up code that checks for alignments less than 4;
let the targets make that decision instead of doing it in
target-independent code. This allows x86 to use rep;movs in
low-alignment cases.

Also, this fixes a bug that resulted in the use of rep;stos for
memsets of 0 with non-constant memory size when the alignment was
at least 4. It's better to use the library in this case, which
can be significantly faster when the size is large.

This also preserves more SourceValue information when memory
intrinsics are lowered into simple loads/stores.

llvm-svn: 49572
2008-04-12 04:36:06 +00:00
Gabor Greif c422383e08 detabify
llvm-svn: 49524
2008-04-11 09:34:57 +00:00
Dan Gohman 3bc3ddd638 Rename MemOperand to MachineMemOperand. This was suggested by
review feedback from Chris quite a while ago. No functionality
change.

llvm-svn: 49348
2008-04-07 19:35:22 +00:00
Roman Levenstein 51f532f92d Re-commit of the r48822, where the infinite looping problem discovered
by Dan Gohman is fixed.

llvm-svn: 49330
2008-04-07 10:06:32 +00:00
Torok Edwin 613d7afe64 Prefer to expand mask for xor to -1, so we have a chance to turn it into a not.
If it cannot be expanded, it will keep the old behaviour and try to shrink the constant.
Part of enhancement for PR2191.

llvm-svn: 49280
2008-04-06 21:23:02 +00:00
Dale Johannesen 0ce4a7cc44 Make sure both PendingLoads and PendingExports are flushed
before an invoke.  Failure to do this causes references in
the landing pad to variables that were not set.  Fixes
g++.dg/eh/delayslot1.C
g++.dg/eh/fp-regs.C
g++.old-deja/g++.brendan/eh1.C

llvm-svn: 49243
2008-04-04 23:48:31 +00:00
Evan Cheng 916802a78e Start of a series of patches related to implicit_def.
There is no point in creating a long live range defined by an implicit_def. Scheduler now duplicates implicit_def instruction for each of its uses. Therefore, if an implicit_def node has multiple uses, it will become a number of very short live ranges, rather than a long one. This will make coalescer's job easier.

llvm-svn: 49164
2008-04-03 16:36:07 +00:00
Evan Cheng 025cea1126 Backing out 48222 temporarily.
llvm-svn: 49124
2008-04-03 03:13:16 +00:00
Dale Johannesen fd967cf3fa Recommitting EH patch; this should answer most of the
review feedback.
-enable-eh is still accepted but doesn't do anything.
EH intrinsics use Dwarf EH if the target supports that,
and are handled by LowerInvoke otherwise.
The separation of the EH table and frame move data is,
I think, logically figured out, but either one still
causes full EH info to be generated (not sure how to
split the metadata correctly).
MachineModuleInfo::needsFrameInfo is no longer used and
is removed.

llvm-svn: 49064
2008-04-02 00:25:04 +00:00
Dale Johannesen 5e4e051c2a Revert 49006 for the moment.
llvm-svn: 49046
2008-04-01 20:00:57 +00:00
Evan Cheng 0bd72c5ccd More soft fp fixes.
llvm-svn: 49016
2008-04-01 02:18:22 +00:00
Evan Cheng 4cabe4b452 Pasto.
llvm-svn: 49014
2008-04-01 02:00:09 +00:00
Evan Cheng 611abc03ed Add comment.
llvm-svn: 49013
2008-04-01 01:51:26 +00:00
Evan Cheng 86e476b7cb Unbreak ARM / Thumb soft FP support.
llvm-svn: 49012
2008-04-01 01:50:16 +00:00
Dale Johannesen 7d02cf3c9c Emit exception handling info for functions which are
not marked nounwind, or for all functions when -enable-eh
is set, provided the target supports Dwarf EH.

llvm-gcc generates nounwind in the right places; other FEs
will need to do so also.  Given such a FE, -enable-eh should
no longer be needed.

llvm-svn: 49006
2008-03-31 23:40:23 +00:00
Dan Gohman f549b26254 Fix a DAGCombiner optimization to respect volatile qualification.
llvm-svn: 48994
2008-03-31 20:32:52 +00:00
Chris Lattner 0f760dfe09 Fix "Control reaches the end of non-void function" warnings,
patch by David Chisnall.

llvm-svn: 48963
2008-03-30 18:22:13 +00:00
Evan Cheng 16d72072df Cosmetic changes.
llvm-svn: 48947
2008-03-29 18:34:22 +00:00
Chris Lattner a148acdc82 ifdef out a dead function. Should this be removed?
llvm-svn: 48916
2008-03-28 15:36:27 +00:00
Duncan Sands 35c7cdac07 Rename getAnyLoad to getLoad is suggested by Evan.
llvm-svn: 48914
2008-03-28 09:45:24 +00:00
Duncan Sands f740509e58 Implement LegalizeTypes support for softfloat LOAD.
In order to handle indexed nodes I had to introduce
a new constructor, and since I was there I factorized
the code in the various load constructors.

llvm-svn: 48894
2008-03-27 20:23:40 +00:00
Dan Gohman cad51cb671 Avoid creating chain dependencies from CopyToReg nodes to load and store
nodes. This doesn't currently have much impact the generated code, but it
does produce simpler-looking SelectionDAGs, and consequently
simpler-looking ScheduleDAGs, because there are fewer spurious
dependencies.

In particular, CopyValueToVirtualRegister now uses the entry node as the
input chain dependency for new CopyToReg nodes instead of calling getRoot
and depending on the most recent memory reference.

Also, rename UnorderedChains to PendingExports and pull it up from being
a local variable in SelectionDAGISel::BuildSelectionDAG to being a
member variable of SelectionDAGISel, so that it doesn't have to be
passed around to all the places that need it.

llvm-svn: 48893
2008-03-27 19:56:19 +00:00
Roman Levenstein 30d09518b5 Fix spelling. Thanks, Duncan! :-)
llvm-svn: 48873
2008-03-27 09:44:37 +00:00
Roman Levenstein bc674501ba Speed-up the SumOfUnscheduledPredsOfSuccs by introducing a new function
called LimitedSumOfUnscheduledPredsOfSuccs. It terminates the computation
after a given treshold is reached. This new function is always faster, but
brings real wins only on bigger test-cases.

The old function SumOfUnscheduledPredsOfSuccs is left in-place for now and therefore a warning about an unused static function is produced.

llvm-svn: 48872
2008-03-27 09:14:57 +00:00
Roman Levenstein 358e04a185 Use a linked data structure for the uses lists of an SDNode, just like
LLVM Value/Use does and MachineRegisterInfo/MachineOperand does.
This allows constant time for all uses list maintenance operations.

The idea was suggested by Chris. Reviewed by Evan and Dan.
Patch is tested and approved by Dan.

On normal use-cases compilation speed is not affected. On very big basic
blocks there are compilation speedups in the range of 15-20% or even better. 

llvm-svn: 48822
2008-03-26 12:39:26 +00:00
Roman Levenstein 733a4d6e85 Fixed some spelling errors. Thanks, Duncan!
llvm-svn: 48819
2008-03-26 11:23:38 +00:00
Roman Levenstein 7e71b4baaf Some improvements related to the computation of isReachable.
This fixes Bugzilla #1835 (http://llvm.org/bugs/show_bug.cgi?id=1835).
This patched is reviewed by Tanya and Dan. Dan tested and approved it.

The reason for the bad performance of the old algorithm is that it is very naive and scans every
time all nodes of the DAG in the worst case.

This patch introduces  a new algorithm based on the paper "Online algorithms
for maintaining the topological order of a directed acyclic graph" by
David J.Pearce and Paul H.J.Kelly. This is the MNR algorithm. It has a
linear time worst-case and performs much better in most situations.

The paper can be found here:
http://fano.ics.uci.edu/cites/Document/Online-algorithms-for-maintaining-the-topological-order-of-a-directed-acyclic-graph.html

The main idea of the new algorithm is to compute the topological ordering of the SNodes in the
DAG and to maintain it even after DAG modifications. The topological ordering allows for very fast 
node reachability checks. 

Tests on very big  input files with tens of thousands of instructions in a BB indicate huge 
speed-ups (up to 10x compilation time improvement) compared to the old version.

llvm-svn: 48817
2008-03-26 09:18:09 +00:00
Dan Gohman bdc24adaaf A quick nm audit turned up several fixed tables and objects that were
marked read-write. Use const so that they can be allocated in a
read-only segment.

llvm-svn: 48800
2008-03-25 21:45:14 +00:00
Evan Cheng df1690dc7c Handle a special case xor undef, undef -> 0. Technically this should be transformed to undef. But this is such a common idiom (misuse) we are going to handle it.
llvm-svn: 48792
2008-03-25 20:08:07 +00:00
Dan Gohman fd227e9c3a Fix typos.
llvm-svn: 48779
2008-03-25 17:10:29 +00:00
Evan Cheng fe7610f37f Remove an unneeded test.
llvm-svn: 48755
2008-03-24 23:55:16 +00:00
Dan Gohman d8ea040c31 APIntify SelectionDAG's EXTRACT_ELEMENT code.
llvm-svn: 48726
2008-03-24 16:38:05 +00:00
Anton Korobeynikov 2fa75184f3 Another comments fixing
llvm-svn: 48683
2008-03-22 07:53:40 +00:00
Evan Cheng 31604a62f6 Teach DAG combiner to commute commutable binary nodes in order to achieve sdisel CSE.
llvm-svn: 48673
2008-03-22 01:55:50 +00:00
Dan Gohman 30e44a4b40 Fix -view-sunit-dags to support cross-rc-copy nodes.
llvm-svn: 48664
2008-03-21 22:51:06 +00:00
Duncan Sands d97eea372a Introduce a new node for holding call argument
flags.  This is needed by the new legalize types
infrastructure which wants to expand the 64 bit
constants previously used to hold the flags on
32 bit machines.  There are two functional changes:
(1) in LowerArguments, if a parameter has the zext
attribute set then that is marked in the flags;
before it was being ignored; (2) PPC had some bogus
code for handling two word arguments when using the
ELF 32 ABI, which was hard to convert because of
the bogusness.  As suggested by the original author
(Nicolas Geoffray), I've disabled it for the moment.
Tested with "make check" and the Ada ACATS testsuite.

llvm-svn: 48640
2008-03-21 09:14:45 +00:00
Christopher Lamb 3e9f49716e Check even more carefully before applying this DAGCombine transform.
llvm-svn: 48580
2008-03-20 04:31:39 +00:00
Evan Cheng 7a3e750fd2 Fix this xform: (sra (shl X, m), result_size) -> (sign_extend (trunc (shl X, result_size - n - m)))
llvm-svn: 48578
2008-03-20 02:18:41 +00:00
Chris Lattner a7cca362af detabify llvm, patch by Mike Stump!
llvm-svn: 48577
2008-03-20 01:22:40 +00:00
Christopher Lamb 8fe9109469 Fix X86's isTruncateFree to not claim that truncate to i1 is free. This fixes Bill's testcase that failed for r48491.
llvm-svn: 48542
2008-03-19 08:30:06 +00:00
Bill Wendling efb4d9ef80 Temporarily revert r48491. It's breaking test/CodeGen/X86/xorl.ll.
llvm-svn: 48510
2008-03-18 22:29:51 +00:00
Dale Johannesen 12c76db312 Make conversions of i8/i16 to ppcf128 work.
llvm-svn: 48493
2008-03-18 17:28:38 +00:00
Christopher Lamb 3e408d4d82 Target independent DAG transform to use truncate for field extraction + sign extend on targets where this is profitable. Passes nightly on x86-64.
llvm-svn: 48491
2008-03-18 16:46:39 +00:00
Christopher Lamb d3d0ad3f58 Make insert_subreg a two-address instruction, vastly simplifying LowerSubregs pass. Add a new TII, subreg_to_reg, which is like insert_subreg except that it takes an immediate implicit value to insert into rather than a register.
llvm-svn: 48412
2008-03-16 03:12:01 +00:00
Evan Cheng 0e7b00d79f Replace all target specific implicit def instructions with a target independent one: TargetInstrInfo::IMPLICIT_DEF.
llvm-svn: 48380
2008-03-15 00:03:38 +00:00
Duncan Sands 858e6385f7 Do not generate special entries in the dwarf eh
table for nounwind calls.

llvm-svn: 48373
2008-03-14 21:36:24 +00:00
Duncan Sands a06e4f3050 Simplify using getIntPtrConstant.
llvm-svn: 48355
2008-03-14 05:23:57 +00:00
Nate Begeman 63eb03f800 Tabs -> spaces
Use getIntPtrConstant in a couple places to shorten stuff up
Handle splitting vector shuffles with undefs in the mask

llvm-svn: 48351
2008-03-14 00:53:31 +00:00
Evan Cheng db443ca377 Livein copy scheduling fixes: do not coalesce physical register copies, correctly determine the safe location to insert the copies.
llvm-svn: 48348
2008-03-14 00:14:55 +00:00
Dan Gohman b72127ac4c More APInt-ification.
llvm-svn: 48344
2008-03-13 22:13:53 +00:00
Evan Cheng 65e9d5f1a8 Experimental scheduler change to schedule / coalesce the copies added for function livein's. Take 2008-03-10-RegAllocInfLoop.ll, the schedule looks like this after these copies are inserted:
entry: 0x12049d0, LLVM BB @0x1201fd0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1028<def> = MOV32rr %EAX
        %reg1029<def> = MOV32rr %EDX
        %reg1030<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x1201910 + 0]
        %reg1025<def> = MOV32rr %reg1029
        %reg1026<def> = MOV32rr %reg1030
        %reg1024<def> = MOV32rr %reg1028

The copies unnecessarily increase register pressure and it will end up requiring a physical register to be spilled.

With -schedule-livein-copies:
entry: 0x12049d0, LLVM BB @0x1201fa0, ID#0:
Live Ins: %EAX %EDX %ECX
        %reg1031<def> = MOVPC32r 0
        %reg1032<def> = ADD32ri %reg1031, <es:_GLOBAL_OFFSET_TABLE_>, %EFLAGS<imp-def>
        %reg1024<def> = MOV32rr %EAX
        %reg1025<def> = MOV32rr %EDX
        %reg1026<def> = MOV32rr %ECX
        %reg1027<def> = MOV8rm %reg0, 1, %reg0, 0, Mem:LD(1,1) [0x12018e0 + 0]

Much better!

llvm-svn: 48307
2008-03-12 22:19:41 +00:00
Duncan Sands 723849a17f Initial soft-float support for LegalizeTypes. I rewrote
the fcopysign expansion from LegalizeDAG to get rid of
what seems to be a bug: the use of sign extension means
that when copying the sign bit from an f32 to an f64,
the upper 32 bits of the f64 (now an i64) are set, not
just the top bit...  I also generalized it to work for
any sized floating point types, and removed the bogosity:
  SDOperand Mask1 = (SrcVT == MVT::f64)
    ? DAG.getConstantFP(BitsToDouble(1ULL << 63), SrcVT)
    : DAG.getConstantFP(BitsToFloat(1U << 31), SrcVT);
  Mask1 = DAG.getNode(ISD::BIT_CONVERT, SrcNVT, Mask1);
(here SrcNVT is an integer with the same size as SrcVT).
As far as I can see this takes a 1 << 63, converts to
a double, converts that to a floating point constant
then converts that to an integer constant, ending up
with... 1 << 63 as an integer constant!  So I just
generate this integer constant directly.

llvm-svn: 48305
2008-03-12 21:27:04 +00:00
Duncan Sands c54fe97f08 Fix typo.
llvm-svn: 48295
2008-03-12 20:35:19 +00:00
Duncan Sands 87de65fc29 Don't try to extract an i32 from an f64. This
getCopyToParts problem was noticed by the new
LegalizeTypes infrastructure.  In order to avoid
this kind of thing in the future I've added a
check that EXTRACT_ELEMENT is only used with
integers.  Once LegalizeTypes is up and running
most likely BUILD_PAIR and EXTRACT_ELEMENT can
be removed, in favour of using apints instead.

llvm-svn: 48294
2008-03-12 20:30:08 +00:00
Evan Cheng 99ee78ef63 Clean up my own mess.
X86 lowering normalize vector 0 to v4i32. However DAGCombine can fold (sub x, x) -> 0 after legalization. It can create a zero vector of a type that's not expected (e.g. v8i16). We don't want to disable the optimization since leaving a (sub x, x) is really bad. Add isel patterns for other types of vector 0 to ensure correctness. It's highly unlikely to happen other than in bugpoint reduced test cases.

llvm-svn: 48279
2008-03-12 07:02:50 +00:00
Evan Cheng 0903aef2ff Total brain cramp.
llvm-svn: 48274
2008-03-12 02:05:05 +00:00
Anton Korobeynikov e8fa50f63a Correctly propagate thread-local flag from aliasee to alias. This fixes PR2137
llvm-svn: 48257
2008-03-11 22:38:53 +00:00
Dan Gohman 44b4c07cd1 Use the correct value for InSignBit.
llvm-svn: 48245
2008-03-11 21:29:43 +00:00
Dan Gohman 1351025a91 Initial codegen support for functions and calls with multiple return values.
llvm-svn: 48244
2008-03-11 21:11:25 +00:00
Christopher Lamb aa7c2105de Recommitting parts of r48130. These do not appear to cause the observed failures.
llvm-svn: 48223
2008-03-11 10:09:17 +00:00
Evan Cheng e88a625ecd When the register allocator runs out of registers, spill a physical register around the def's and use's of the interval being allocated to make it possible for the interval to target a register and spill it right away and restore a register for uses. This likely generates terrible code but is before than aborting.
llvm-svn: 48218
2008-03-11 07:19:34 +00:00
Duncan Sands b29f93613d Some LegalizeTypes code factorization and minor
enhancements.

llvm-svn: 48215
2008-03-11 06:41:14 +00:00
Chris Lattner 5c7bda440f compile: double test() {}
into:

_test:
	fldz
	ret

instead of:

_test:
	subl	$12, %esp
	#IMPLICIT_DEF %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$12, %esp
	ret

llvm-svn: 48213
2008-03-11 06:21:08 +00:00
Chris Lattner 3e0ec65678 variadic instructions don't have operand info for variadic arguments.
llvm-svn: 48208
2008-03-11 03:14:42 +00:00
Dan Gohman d6819da453 Generalize ExpandIntToFP to handle the case where the operand is legal
and it's the result that requires expansion. This code is a little confusing
because the TargetLoweringInfo tables for [US]INT_TO_FP use the operand type
(the integer type) rather than the result type. 

llvm-svn: 48206
2008-03-11 01:59:03 +00:00
Chris Lattner d3090bcfc8 If a register operand comes from the variadic part of a node, don't
verify the register constraint matches what the instruction expects.

llvm-svn: 48205
2008-03-11 00:59:28 +00:00
Dan Gohman 10f7d850cf More APInt-ification.
llvm-svn: 48201
2008-03-11 00:11:06 +00:00
Dan Gohman 2a3aeb1f72 Correctly clone FlaggedNodes.
llvm-svn: 48196
2008-03-10 23:48:14 +00:00
Dan Gohman 830d86cab8 APInt-ify this.
llvm-svn: 48194
2008-03-10 23:38:17 +00:00
Dan Gohman f4300950f1 Implement more support for fp-to-i128 and i128-to-fp conversions.
llvm-svn: 48189
2008-03-10 23:03:31 +00:00
Dan Gohman 272e234477 Fix mul expansion to check the correct number of bits for
zero extension when checking if an unsigned multiply is
safe.

llvm-svn: 48171
2008-03-10 20:42:19 +00:00
Evan Cheng b9e4280e94 Somewhat better solution.
llvm-svn: 48170
2008-03-10 19:58:22 +00:00
Evan Cheng ae2c56d93e Default ISD::PREFETCH to expand.
llvm-svn: 48169
2008-03-10 19:38:10 +00:00
Evan Cheng d4e1d9eeb2 Revert 48125, 48126, and 48130 for now to unbreak some x86-64 tests.
llvm-svn: 48167
2008-03-10 19:31:26 +00:00
Scott Michel a6729e8666 Give TargetLowering::getSetCCResultType() a parameter so that ISD::SETCC's
return ValueType can depend its operands' ValueType.

This is a cosmetic change, no functionality impacted.

llvm-svn: 48145
2008-03-10 15:42:14 +00:00
Evan Cheng 831ae49599 Doh
llvm-svn: 48140
2008-03-10 07:59:01 +00:00
Evan Cheng b5d11980d9 Avoid creating BUILD_VECTOR of all zero elements of "non-normalized" type (e.g. v8i16 on x86) after legalizer. Instruction selection does not expect to see them. In all likelihood this can only be an issue in a bugpoint reduced test case.
llvm-svn: 48136
2008-03-10 07:19:13 +00:00
Christopher Lamb 4ba3f0430b Allow insert_subreg into implicit, target-specific values.
Change insert/extract subreg instructions to be able to be used in TableGen patterns.
Use the above features to reimplement an x86-64 pseudo instruction as a pattern.

llvm-svn: 48130
2008-03-10 06:12:08 +00:00
Dale Johannesen 4e622ec86d Increase ISD::ParamFlags to 64 bits. Increase the ByValSize
field to 32 bits, thus enabling correct handling of ByVal
structs bigger than 0x1ffff.  Abstract interface a bit.
Fixes gcc.c-torture/execute/pr23135.c and 
gcc.c-torture/execute/pr28982b.c in gcc testsuite (were ICE'ing
on ppc32, quietly producing wrong code on x86-32.)

llvm-svn: 48122
2008-03-10 02:17:22 +00:00
Chris Lattner 4c4234b59c remove an extraneous (and ugly) default argument, thanks Duncan.
llvm-svn: 48117
2008-03-09 20:04:36 +00:00
Chris Lattner ce5f841bb5 fp_round's produced by getCopyFromParts should always be exact, because
they are produced by calls (which are known exact) and by cross block copies
which are known to be produced by extends.

This improves:

define double @test2() {
	%tmp85 = call double asm sideeffect "fld0", "={st(0)}"()
	ret double %tmp85
}

from:

_test2:
	subl	$20, %esp
	# InlineAsm Start
	fld0
	# InlineAsm End
	fstpl	8(%esp)
	movsd	8(%esp), %xmm0
	movsd	%xmm0, (%esp)
	fldl	(%esp)
	addl	$20, %esp
	#FP_REG_KILL
	ret

to:

_test2:
	# InlineAsm Start
	fld0
	# InlineAsm End
	#FP_REG_KILL
	ret

by avoiding a f64 <-> f80 trip

llvm-svn: 48108
2008-03-09 09:38:46 +00:00
Chris Lattner 86829f0ff7 teach X86InstrInfo::copyRegToReg how to copy into ST(0) from
an RFP register class.

Teach ScheduleDAG how to handle CopyToReg with different src/dst 
reg classes.

This allows us to compile trivial inline asms that expect stuff
on the top of x87-fp stack.

llvm-svn: 48107
2008-03-09 09:15:31 +00:00