Commit Graph

292093 Commits

Author SHA1 Message Date
Yaxun Liu fb17bf60dd [AMDGPU] Change enqueue kernel handle type
Currently the handle type is a global pointer which holds 8 bytes.
We need a larger type which hold 16 bytes, therefore change it
to [i64 x 2].

Differential Revision: https://reviews.llvm.org/D48094

llvm-svn: 334625
2018-06-13 17:31:51 +00:00
Alex Shlyapnikov 4bf9b5612a [TSan] Fix madvise(MADV_NOHUGEPAGE) for meta shadow memory
Summary:
Move madvise(MADV_NOHUGEPAGE) for the meta shadow memory after the meta
shadow memory is mapped (currently it silently fails with ENOMEM).

Add a diagnostic message to detect similar problems in the future.

Reviewers: dvyukov

Subscribers: kubamracek, delcypher, #sanitizers, llvm-commits

Differential Revision: https://reviews.llvm.org/D48097

llvm-svn: 334624
2018-06-13 17:18:41 +00:00
Simon Pilgrim 9fd634db22 [CostModel][X86] Test showing failure to recognise REVERSE shuffle mask if the elements come from the second src
llvm-svn: 334623
2018-06-13 17:12:11 +00:00
Dmitry Preobrazhensky 32c6b5cb70 [AMDGPU][MC] Enabled parsing of relocations on VALU instructions
See bug 37566: https://bugs.llvm.org/show_bug.cgi?id=37566

Reviewers: artem.tamazov, arsenm, nhaehnle

Differential Revision: https://reviews.llvm.org/D47884

llvm-svn: 334622
2018-06-13 17:02:03 +00:00
Simon Pilgrim 54a138a0c5 [CostModel] Recognise BROADCAST shuffle mask if the elements come from the second src
llvm-svn: 334620
2018-06-13 16:52:02 +00:00
Benjamin Kramer ffe60e0403 [Basic] Fix -Wreorder warning
Just use field initializers that don't suffer from this problem

llvm-svn: 334619
2018-06-13 16:45:12 +00:00
Jonas Devlieghere 9c1a645adc [FileSpec] Simplify getting extension and stem.
As noted by Pavel on lldb-commits, we don't need the temp path, we can
just pass the filename directly into extension() and path().

llvm-svn: 334618
2018-06-13 16:36:07 +00:00
Andrea Di Biagio d5690628db Revert: [llvm-mca] Flush the output stream before we start the analysis of a new code region. NFC
Not sure why, but it breaks buildbot clang-cmake-armv8-full.
It causes a failure in TEST 'Xray-armhf-linux :: TestCases/Posix/profiling-single-threaded.cc'.

llvm-svn: 334617
2018-06-13 16:33:52 +00:00
Simon Pilgrim 5af0b99ea4 [CostModel][X86] Test showing failure to recognise BROADCAST shuffle mask if the elements come from the second src
llvm-svn: 334616
2018-06-13 16:33:42 +00:00
Jonas Devlieghere ad8d48f903 [FileSpec] Delegate common operations to llvm::sys::path
With the recent changes in FileSpec to use LLVM's path style, it is
possible to delegate a bunch of common path operations to LLVM's path
helpers. This means we only have to maintain a single implementation and
at the same time can benefit from the efforts made by the rest of the
LLVM community.

This is part one of a set of patches. There was no obvious way to split
this so I just worked from top to bottom.

Differential revision: https://reviews.llvm.org/D48084

llvm-svn: 334615
2018-06-13 16:23:21 +00:00
Adrian Prantl 4e8be2c98e Fix/unify the spelling of Objective-C.
llvm-svn: 334614
2018-06-13 16:21:24 +00:00
Stefan Pintilie a6ce3fe72b [PowerPC] The __float128 type should only be available on Power9
Diasble the use of the type __float128 for PPC machines older
than Power9.

The use of -mfloat128 for PPC machine older than Power9 will result
in an error.

Differential Revision: https://reviews.llvm.org/D48088

llvm-svn: 334613
2018-06-13 16:05:05 +00:00
Matt Morehouse cffb235afe [libclang] Make c-index-test.c ISO C90 compliant.
Fixes a build bot breakage caused by r334593.

llvm-svn: 334612
2018-06-13 16:00:39 +00:00
Raphael Isemann 2c77eefe85 Add modules support for lldb headers in include/
Summary:
This patch adds a modulemap which allows compiling the lldb headers into C++ modules
(for example in builds with LLVM_ENABLE_MODULES=On).

Even though most of the affected code has been cleaned up to work with the more strict
C++ module semantics, there are still some workarounds left in the current modulemap
(the most obvious one is the big `lldb` wrapper module).

It also moves the Obj-C++ files in lldb to their own subdirectories. This was necessary
because we need to filter out the modules flags for this code.

Note: With the latest clang and libstdc++ it seems necessary to have a STL C++ module
to get a working LLVM_ENABLE_MODULES build for lldb. Otherwise clang will falsely
detect ODR violations in the textually included STL code inside the lldb modules.

Reviewers: aprantl, bruno

Reviewed By: aprantl, bruno

Subscribers: mgorny, yamaguchi, v.g.vassilev, lldb-commits

Differential Revision: https://reviews.llvm.org/D47929

llvm-svn: 334611
2018-06-13 15:50:45 +00:00
Andrea Di Biagio f6ee0c9071 [llvm-mca] Flush the output stream before we start the analysis of a new code region. NFC
llvm-svn: 334610
2018-06-13 15:43:56 +00:00
Dmitry Preobrazhensky ffbee7acdc [AMDGPU][MC][GFX8][GFX9] Allow LDS direct reads for BUFFER_LOAD_DWORDX2/X3/X4
See bug 37653: https://bugs.llvm.org/show_bug.cgi?id=37653

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D47885

llvm-svn: 334609
2018-06-13 15:32:46 +00:00
Sanjay Patel 7d4929611c [DAGCombiner] remove hasOneUse() check from fadd constants transform
We're constant folding here, so we shouldn't check uses. This matches
the IR optimizer behavior.

The x86 test shows the expected win. The AArch64 test shows something
else. This only seems to happen if the "generic" AArch64 CPU model is 
used by MachineCombiner, so I'll file a bug report to follow-up.

llvm-svn: 334608
2018-06-13 15:22:48 +00:00
Tom Stellard 264c171f36 AMDGPU: Move isSDNodeSourceOfDivergence() implementation to SITargetLowering
Summary:
The code that handles ISD:Register and ISD::CopyFromReg assumes
the target is amdgcn, so this is broken on r600.  We don't
need this analysis on r600 anyway so we can safely move
it to SITargetLowering.

Reviewers: alex-t, arsenm, nhaehnle

Reviewed By: arsenm

Subscribers: msearles, kzhuravl, wdng, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Differential Revision: https://reviews.llvm.org/D46298

llvm-svn: 334607
2018-06-13 15:06:37 +00:00
Aaron Ballman c3fabd98d6 Reverting r334604 due to failing tests.
http://lab.llvm.org:8011/builders/llvm-clang-lld-x86_64-scei-ps4-ubuntu-fast/builds/31500

llvm-svn: 334606
2018-06-13 15:02:34 +00:00
Sanjay Patel 9f3f18d6f6 [x86] add test for fadd with more than one use; NFC
The equivalent AArch64 test added at rL334556 isn't showing
the expected output from the DAGCombiner code change that 
would fix this example. That's a machine combiner bug from 
what I see.

llvm-svn: 334605
2018-06-13 15:01:07 +00:00
Aaron Ballman 0d78a90a7d Add a new class to analyze whether an expression is mutated within a statement.
ExprMutationAnalyzer is a generally useful helper that can be used in different clang-tidy checks for checking whether a given expression is (potentially) mutated within a statement (typically the enclosing compound statement.) This is a more general and more powerful/accurate version of isOnlyUsedAsConst, which is used in ForRangeCopyCheck, UnnecessaryCopyInitialization.

Patch by Shuai Wang

llvm-svn: 334604
2018-06-13 14:41:42 +00:00
Cameron McInally f37bd01ddc [FPEnv] Expand constrained FP operations
Add a helper function to expand constrained FP operations as needed. 
Note that the Strict POWI operation is not handled in this patch since 
the format is slightly different from the others.

Differential Revision: https://reviews.llvm.org/D47491

llvm-svn: 334603
2018-06-13 14:32:12 +00:00
Hans Wennborg 12ba9ec929 Do not enforce absolute path argv0 in windows
Even if we support no-canonical-prefix on
clang-cl(https://reviews.llvm.org/D47480), argv0 becomes absolute path
in clang-cl and that embeds absolute path in /showIncludes.

This patch removes such full path normalization from InitLLVM on
windows, and that removes absolute path from clang-cl output
(obj/stdout/stderr) when debug flag is disabled.

Patch by Takuto Ikuta!

Differential Revision https://reviews.llvm.org/D47578

llvm-svn: 334602
2018-06-13 14:29:26 +00:00
Guillaume Chatelet b391f24303 [llvm-exegesis] Fix buildbot - power was using native target for X86.
Reviewers: courbet

Reviewed By: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48125

llvm-svn: 334601
2018-06-13 14:07:36 +00:00
Piotr Padlewski e368de364e Add -fforce-emit-vtables
Summary:
 In many cases we can't devirtualize
 because definition of vtable is not present. Most of the
 time it is caused by inline virtual function not beeing
 emitted. Forcing emitting of vtable adds a reference of these
 inline virtual functions.
 Note that GCC was always doing it.

Reviewers: rjmccall, rsmith, amharc, kuhar

Subscribers: llvm-commits, cfe-commits

Differential Revision: https://reviews.llvm.org/D47108

Co-authored-by: Krzysztof Pszeniczny <krzysztof.pszeniczny@gmail.com>
llvm-svn: 334600
2018-06-13 13:55:42 +00:00
Guillaume Chatelet 60e3d582f6 [llvm-exegesis] Fix failing assert when creating Snippet for LAHF.
Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48123

llvm-svn: 334599
2018-06-13 13:53:56 +00:00
Krzysztof Parzyszek 3e039f86cc Revert "Improve handling of COPY instructions with identical value numbers"
This reverts r334594, it breaks buildbots and fails with expensive checks.

llvm-svn: 334598
2018-06-13 13:49:06 +00:00
Erich Keane 1d73d1aaa1 Correct behavior of __builtin_*_overflow and constexpr.
Enable these builtins to be called across a lambda
boundary with captureless const/constexpr, as brought up by 
Eli here: https://reviews.llvm.org/D48040

Differential Revision: https://reviews.llvm.org/D48053

llvm-svn: 334597
2018-06-13 13:25:11 +00:00
Guillaume Chatelet c9f727bb85 [llvm-exegesis] Cleaner design without mutable data.
Summary: Previous design was relying on the 'mutate' keyword and was quite confusing. This version separate mutable from immutable data and makes it clearer what changes and what doesn't.

Reviewers: courbet

Subscribers: tschuett, llvm-commits

Differential Revision: https://reviews.llvm.org/D48020

llvm-svn: 334596
2018-06-13 13:24:41 +00:00
Zoran Jovanovic 3a7654c15d [mips][microMIPS] Extending size reduction pass with LWP and SWP
Author: milena.vujosevic.janicic
Reviewers: sdardis
The patch extends size reduction pass for MicroMIPS.
It introduces reduction of two instructions into one instruction:
Two SW instructions are transformed into one SWP instrucition.
Two LW instructions are transformed into one LWP instrucition.
Differential Revision: https://reviews.llvm.org/D39115

llvm-svn: 334595
2018-06-13 12:51:37 +00:00
Krzysztof Parzyszek 36b816f814 Improve handling of COPY instructions with identical value numbers
Differential Revision: https://reviews.llvm.org/D48102

llvm-svn: 334594
2018-06-13 12:47:17 +00:00
Ivan Donchevskii 3957e48a68 [libclang] Optionally add code completion results for arrow instead of dot
Follow up for D41537 - libclang part.

Differential Revision: https://reviews.llvm.org/D46862

llvm-svn: 334593
2018-06-13 12:37:08 +00:00
Sanjay Patel b983ac6fe1 [x86] eliminate even more sign-bit tests with vector select
This shortcoming was noted in D47330, and the test diffs show we already 
had other examples where we failed to fold to a SHRUNKBLEND:

/// Dynamic (non-constant condition) vector blend where only the sign bits
/// of the condition elements are used. This is used to enforce that the
/// condition mask is not valid for generic VSELECT optimizations.

This patch implements an idea from D48043 and would obsolete that patch 
because it catches more cases (notable the AVX1 case that was missed there). 
All we're doing is allowing the existing transform to fire more often by 
removing the post-legalize constraint. All of the relevant feature checks 
and other predicates are left as-is.

Differential Revision: https://reviews.llvm.org/D48078

llvm-svn: 334592
2018-06-13 12:28:32 +00:00
Alex Bradbury 96f492d7df [RISCV] Add codegen support for atomic load/stores with RV32A
Fences are inserted according to table A.6 in the current draft of version 2.3
of the RISC-V Instruction Set Manual, which incorporates the memory model
changes and definitions contributed by the RISC-V Memory Consistency Model
task group.

Instruction selection failures will now occur for 8/16/32-bit atomicrmw and 
cmpxchg operations when targeting RV32IA until lowering for these operations 
is added in a follow-on patch.

Differential Revision: https://reviews.llvm.org/D47589

llvm-svn: 334591
2018-06-13 12:04:51 +00:00
Alex Bradbury dc790dd5d0 [RISCV] Codegen support for atomic operations on RV32I
This patch adds lowering for atomic fences and relies on AtomicExpandPass to
lower atomic loads/stores, atomic rmw, and cmpxchg to __atomic_* libcalls.

test/CodeGen/RISCV/atomic-* are modelled on the exhaustive
test/CodeGen/PPC/atomics-regression.ll, and will prove more useful once RV32A
codegen support is introduced.

Fence mappings are taken from table A.6 in the current draft of version 2.3 of
the RISC-V Instruction Set Manual, which incorporates the memory model changes
and definitions contributed by the RISC-V Memory Consistency Model task group.

Differential Revision: https://reviews.llvm.org/D47587

llvm-svn: 334590
2018-06-13 11:58:46 +00:00
Sam McCall 0f8df3e35a Revert "[clangd] Log completion context type. NFC"
This reverts commit r334572, which has a potential use-after-free.

llvm-svn: 334589
2018-06-13 11:31:20 +00:00
Simon Pilgrim 2c9d2adff5 [SLPVectorizer] getSameOpcode - remove useless cast [NFC]
There's no need to cast the base Value to an Instruction

llvm-svn: 334588
2018-06-13 10:49:24 +00:00
Simon Pilgrim 1224260f83 [SLPVectorizer] getSameOpcode - remove unusued alternate code [NFC]
We early-out for the case where we don't use alternate opcodes, so no need to check for it later.

llvm-svn: 334587
2018-06-13 10:14:27 +00:00
Clement Courbet 5eeed77f87 [TableGen] Emit a fatal error on inconsistencies in resource units vs cycles.
Summary:
For targets I'm not familiar with, I've automatically made the "default to 1 for each resource" behaviour explicit in the td files.
For more obvious cases, I've ventured a fix.

Some notes:
 - Exynos is especially fishy.
 - AArch64SchedThunderX2T99.td had some truncated entries. If I understand correctly, the person who wrote that interpreted the ResourceCycle as a range. I made the decision to use the upper/lower bound for consistency with the 'Latency' value. I'm sure there is a better choice.
 - The change to X86ScheduleBtVer2.td is an NFC, it just makes values more explicit.

Also see PR37310.

Reviewers: RKSimon, craig.topper, javed.absar

Subscribers: kristof.beyls, llvm-commits

Differential Revision: https://reviews.llvm.org/D46356

llvm-svn: 334586
2018-06-13 09:41:49 +00:00
Ilya Biryukov b10ef47a68 [clangd] Move caching of compile args out of ClangdServer.
Summary:
Caching is now handled by ClangdLSPServer and hidden behind the
GlobalCompilationDatabase interface. This simplifies ClangdServer.
This change also removes the SkipCache flag from addDocument,
which is now obsolete.

No behavioral changes are intended, the clangd binary still caches the
compile commands on the first read.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: mgorny, ioeric, MaskRay, jkorous, cfe-commits

Differential Revision: https://reviews.llvm.org/D48068

llvm-svn: 334585
2018-06-13 09:20:41 +00:00
Hans Wennborg 005dd84644 GettingStarted.rst: Fix 'If you you' typo (PR37787)
llvm-svn: 334584
2018-06-13 09:11:10 +00:00
Hiroshi Inoue 0f7f59f073 [PowerPC] fix trivial typos in comment, NFC
llvm-svn: 334583
2018-06-13 08:54:13 +00:00
Hans Wennborg 32e611d1a9 Fix -DLLVM_ENABLE_THREADS=OFF build after r334537
llvm-svn: 334582
2018-06-13 08:43:03 +00:00
Aaron Smith 7e2ea97c9b [WebAssembly] Fix broken build due to missing attributes.inc
WebAssembly depends on attributes.h which includes attributes.inc. 
Unless cmake explicitly specifies this dependency, the .inc file 
is sometimes generated after the build tries to use it.

Patch by Stella Stamenova 

llvm-svn: 334581
2018-06-13 08:38:23 +00:00
Pavel Labath 4b896eb792 Fix "Optional" is ambiguous error on some bots
llvm-svn: 334580
2018-06-13 08:29:19 +00:00
Hiroshi Inoue 9bffc94cf0 [PowerPC] avoid verification failure due to PowerPC VSX Swap Removal pass
This patch fixes a failure in lnt tests with -verify-machineinstrs option.
When VSX Swap Removal pass swaps two register operands, it did not maintain kill flags associated with operands. This patch swaps flags as well as register number to avoid inconsistent kill flags information.

llvm-svn: 334579
2018-06-13 08:25:14 +00:00
Pavel Labath 4adc88ed25 [DWARF/AccelTable] Remove getDIESectionOffset for DWARF v5 entries
Summary:
This method was not correct for entries in DWO files as it assumed it
could just add up the CU and DIE offsets to get the absolute DIE offset.
This is not correct for the DWO files, as here the CU offset will
reference the skeleton unit, whereas the DIE offset will be the offset
in the full unit in the DWO file.

Unfortunately, this means that we are not able to determine the absolute
DIE offset using the information in the .debug_names section alone,
which means we have to offload some of this work to the users of this
class.

To demonstrate how this can be done, I've added/fixed the ability to
lookup entries using accelerator tables in DWO files in llvm-dwarfdump.
To make this happen, I've needed to make two extra changes in other
classes:
- made the DWARFContext method to lookup a CU based on the section
  offset public. I've needed this functionality to lookup a CU, and this
  seems like a useful thing in general.
- made DWARFUnit::getDWOId call extractDIEsIfNeeded. Before this, the
  DWOId was filled in only if the root DIE happened to be parsed
  before we called the accessor. Since the lazy parsing is supposed to
  happen under the hood, calling extractDIEsIfNeeded seems appropriate.

Reviewers: JDevlieghere, aprantl, dblaikie

Subscribers: mgrang, llvm-commits

Differential Revision: https://reviews.llvm.org/D48009

llvm-svn: 334578
2018-06-13 08:14:27 +00:00
Craig Topper 2527c378c6 [X86] Remove masking from avx512vbmi2 concat and shift by immediate builtins. Use select builtins instead.
llvm-svn: 334577
2018-06-13 07:19:28 +00:00
Craig Topper 3829d258ee [X86] Remove masking from avx512vbmi2 concat and shift by immediate intrinsics. Use select in IR instead.
llvm-svn: 334576
2018-06-13 07:19:21 +00:00
Petr Hosek 7252e2a8bd [XRay] Set an explicit dependency on libc++ when needed
When XRay is being built as part of the just built compiler together
with libc++ as part of the runtimes build, we need an explicit
dependency from XRay to libc++ to make sure that the library is
available by the time we start building XRay.

Differential Revision: https://reviews.llvm.org/D48113

llvm-svn: 334575
2018-06-13 07:08:28 +00:00