Commit Graph

362706 Commits

Author SHA1 Message Date
Matt Arsenault 87ce06e315 Add freeze keyword to IR emacs mode 2020-08-06 14:58:28 -04:00
MaheshRavishankar 25e8668e88 [mlir][SPIR-V] Fix wrongly placed Rationale section.
Differential Revision: https://reviews.llvm.org/D85461
2020-08-06 11:51:42 -07:00
Jonas Devlieghere 86aa8e6363 [lldb] Use target.GetLaunchInfo() instead of creating an empty one.
Update tests that were creating an empty LaunchInfo instead of using the
one coming from the target. This ensures target properties are honored.
2020-08-06 11:51:26 -07:00
Aleksandr Platonov 9f24148b21 [clangd] Fix crash in bugprone-bad-signal-to-kill-thread clang-tidy check.
Inside clangd, clang-tidy checks don't see preprocessor events in the preamble.
This leads to `Token::PtrData == nullptr` for tokens that the macro is defined to.
E.g. `#define SIGTERM 15`:
- Token::Kind == tok::numeric_constant (Token::isLiteral() == true)
- Token::UintData == 2
- Token::PtrData == nullptr

As the result of this, bugprone-bad-signal-to-kill-thread check crashes at null-dereference inside clangd.

Reviewed By: hokein

Differential Revision: https://reviews.llvm.org/D85417
2020-08-06 21:45:21 +03:00
dfukalov 4ccc38813e [AMDGPU][CostModel] Add f16, f64 and contract cases to fused costs estimation.
Add cases of fused fmul+fadd/fsub with f16 and f64 operands to cost model.
Also added operations with contract attribute.

Fixed line endings in test.

Reviewed By: rampitec

Differential Revision: https://reviews.llvm.org/D84995
2020-08-06 21:43:27 +03:00
Matt Arsenault e00201539f GlobalISel: Implement fewerElementsVector for G_EXTRACT_VECTOR_ELT
Use the same basic strategy as LegalizeVectorTypes. Try to index into
smaller pieces if there's a constant index, and otherwise fall back to
a stack temporary.
2020-08-06 14:33:16 -04:00
Arthur Eubanks d0acd97c68 [NewPM][LoopUnswitch] Pin loop-unswitch to legacy PM or use simple-loop-unswitch
As mentioned in
http://lists.llvm.org/pipermail/llvm-dev/2020-July/143395.html,
loop-unswitch has not been ported to the NPM. Instead people are using
simple-loop-unswitch.

Pin all tests in Transforms/LoopUnswitch to legacy PM and replace all
other uses of loop-unswitch with simple-loop-unswitch.

One test that didn't fit into the above was
2014-06-21-congruent-constant.ll which seems to only pass with
loop-unswitch. That is also pinned to legacy PM.

Now all tests containing "-loop-unswitch" anywhere in the test succeed with
NPM turned on by default.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85360
2020-08-06 10:56:00 -07:00
Aaron En Ye Shi 96c2d5e99e [HIP] Ignore invalid ar linker options
Instead of accepting the same arguments as regular linker,
the static linker will only accept input files.

Reviewed By: yaxunl

Differential Revision: https://reviews.llvm.org/D85442
2020-08-06 17:39:41 +00:00
Fred Riss 99298c7fc5 [lldb/testsuite] Change get_debugserver_exe to support Rosetta
In order to be able to run the debugserver tests against the Rosetta
debugserver, detect the Rosetta run configuration and return the
system Rosetta debugserver.
2020-08-06 10:38:30 -07:00
Arthur Eubanks 5bb6b8250a [NewPM] Pin -assumption-cache-tracker tests to legacy PM
All tests have corresponding NPM RUN lines.

Reviewed By: ychen

Differential Revision: https://reviews.llvm.org/D85395
2020-08-06 10:38:03 -07:00
Matt Arsenault 1a0c0944c6 AMDGPU: Define raw/struct variants of buffer atomic fadd
Somehow the new FP atomic buffer intrinsics ended up using the legacy
style for buffer intrinsics.
2020-08-06 13:36:19 -04:00
Sterling Augustine 9dbdaea9a0 Remove unused variable "saved_opts".
wattr_get is a macro, and the documentation states:
"The parameter opts is reserved for  future use,
applications must supply a null pointer."

In practice, passing a variable there is harmless, except
that it is unused inside the macro, which causes unused
variable warnings.

The various places where
2020-08-06 10:20:21 -07:00
Matt Arsenault eae9c54148 AArch64/GlobalISel: Fix verifier error after selecting returnaddress
This was caching the wrong register to re-use later.
2020-08-06 13:18:05 -04:00
Simon Pilgrim 3b93464dcf [SLP][X86] Regenerate sdiv test noticed in D83779. NFC. 2020-08-06 18:00:21 +01:00
Mircea Trofin ca7973cf18 [NFC]{MLInliner] Point out the tests' model dependencies 2020-08-06 09:57:26 -07:00
Matt Arsenault 90eb7d5283 AMDGPU: Fix spilling of 96-bit AGPRs 2020-08-06 12:42:07 -04:00
Matt Arsenault 56270d1d42 AMDGPU/GlobalISel: Start trying to handle AGPR bank
Try to use AGPR banks for the various merge/unmerge type
operations. Previously these would introduce copies to VGPR.
2020-08-06 12:39:50 -04:00
Matt Arsenault 34040a4f61 GlobalISel: Define InvalidRegBankID enum value 2020-08-06 12:39:49 -04:00
Alexey Bataev 8d072a4405 [OPENMP]Fix for Windows buildbots, NFC. 2020-08-06 12:36:52 -04:00
Alexey Bataev 0af7835eae [OPENMP]Redesign of OMPExecutableDirective/OMPDeclarativeDirective representation.
Summary:
Introduced OMPChildren class to handle all associated clauses, statement
and child expressions/statements. It allows to represent some directives
more correctly (like flush, depobj etc. with pseudo clauses, ordered
depend directives, which are standalone, and target data directives).
Also, it will make easier to avoid using of CapturedStmt in directives,
if required (atomic, tile etc. directives).
Also, it simplifies serialization/deserialization of the
executable/declarative directives.
Reduces number of allocation operations for mapper declarations.

Reviewers: jdoerfert

Subscribers: yaxunl, guansong, jfb, cfe-commits, sstefan1, aaron.ballman, caomhin

Tags: #clang

Differential Revision: https://reviews.llvm.org/D83261
2020-08-06 12:25:19 -04:00
Simon Pilgrim 8f5b2cb828 [InstCombine] Add tests for mul(add(x,c),negpow2) -> mul(sub(-c,x),pow2) fold
Also fix some undef vector elements in the similar vector tests that I missed.
2020-08-06 17:13:28 +01:00
Mircea Trofin 87fb7aa137 [llvm][MLInliner] Don't log 'mandatory' events
We don't want mandatory events in the training log. We do want to handle
them, to keep the native size accounting accurate, but that's all.

Fixed the code, also expanded the test to capture this.

Differential Revision: https://reviews.llvm.org/D85373
2020-08-06 09:04:15 -07:00
Joel E. Denny 518a27e559 [OpenMP] Fix ref count dec for implicit map of partial data
D85342 broke this case.  The new test case presents an example.

Reviewed By: grokos

Differential Revision: https://reviews.llvm.org/D85369
2020-08-06 11:39:29 -04:00
Raphael Isemann f6913e7440 [lldb][NFC] Document and encapsulate OriginMap in ASTContextMetadata
Just adds the respective accessor functions to ASTContextMetadata instead
of directly exposing the OriginMap to the whole world.
2020-08-06 17:37:29 +02:00
Simon Pilgrim d1a91d947f [InstCombine] Add tests for mul(sub(x,y),negpow2) -> mul(sub(y,x),pow2) fold
Add full vector coverage (that currently are not folded).
2020-08-06 16:31:57 +01:00
Simon Pilgrim b7b1a38d41 PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI.
We already need to include raw_ostream.h, also add missing StringRef.h implicit dependency.
2020-08-06 16:31:56 +01:00
Fangrui Song a6db64ef4a [ELF] Allow sections after a non-SHF_ALLOC section to be covered by PT_LOAD
GNU ld allows sections after a non-SHF_ALLOC section to be covered by PT_LOAD
(PR37607) and assigns addresses to non-SHF_ALLOC output sections (similar to
SHF_ALLOC NOBITS sections. The location counter is not advanced).

This patch tries to fix PR37607 (remove a special case in
`Writer<ELFT>::createPhdrs`). To make the created PT_LOAD meaningful, we cannot
reset dot to 0 for a middle non-SHF_ALLOC output section. This results in
removal of two special cases in LinkerScript::assignOffsets. Non-SHF_ALLOC
non-orphan sections can have non-zero addresses like in GNU ld.

The zero address rule for non-SHF_ALLOC sections is weakened to apply to orphan
only. This results in a special case in createSection and findOrphanPos, respectively.

Reviewed By: jhenderson

Differential Revision: https://reviews.llvm.org/D85100
2020-08-06 08:27:15 -07:00
Matt Arsenault 63cdc9a49f AMDGPU/GlobalISel: Handle llvm.amdgcn.ds.{fadd|fmin|fmax}
These intrinsics are missing mangling for both the pointer and data
type.
2020-08-06 11:09:08 -04:00
Matt Arsenault 63c4be53cf AMDGPU/GlobalISel: Try to promote to use packed saturating add/sub
This produces worse results right now for i8 vectors, but that should
be addressed when we actually try to optimize packed vectors.
2020-08-06 11:08:45 -04:00
Sanjay Patel 60f2c6a94c [PatternMatch] allow intrinsic form of min/max with existing matchers
I skimmed the existing users of these matchers and don't see any problems
(eg, the caller assumes the matched value was a select instruction without checking).

So I think we can generalize the matching to allow the new intrinsics or the cmp+select idioms.

I did not find any unit tests for the matchers, so added some basics there. The instsimplify
tests are adapted from existing tests for the cmp+select pattern and cover the folds in
simplifyICmpWithMinMax().

Differential Revision: https://reviews.llvm.org/D85230
2020-08-06 10:50:24 -04:00
Matt Arsenault dcf3ffb0a8 AMDGPU/GlobalISel: Move frame index selection to patterns
Doesn't really save any code until global value is handled too.
2020-08-06 10:42:15 -04:00
Matt Arsenault d188a608bd AMDGPU: Fix code duplication between the selectors
Not sure this is the right place for this helper.
2020-08-06 10:42:15 -04:00
jasonliu e5062a6caf [XCOFF][AIX] Put each jump table in an independent section if -ffunction-sections is specified
If a function is in a unique section, putting all jump tables in
 .rodata will prevent functions that have a jump table to get
garbage collect by the linker.
Therefore, we need to put jump table into a unique section as well.

Reviewed By: Xiangling_L

Differential Revision: https://reviews.llvm.org/D84761
2020-08-06 14:31:04 +00:00
Matt Arsenault 5a503521e7 AMDGPU/GlobalISel: Implement expansion for rsq.clamp
Not sure why we handle this removed instruction on newer subtargets
for this one and no others, but maintain compatibility with the DAG.
2020-08-06 10:23:25 -04:00
Matt Arsenault c015cbc68b AMDGPU/GlobalISel: Fix trying to widen <3 x s1> boolean ops 2020-08-06 10:07:22 -04:00
Matt Arsenault 28124a0a63 AMDGPU/GlobalISel: Stop using G_EXTRACT in argument lowering
We really need to put this undef padding stuff into a helper
somewhere, but leave that for when this is moved to generic code.
2020-08-06 09:55:35 -04:00
Matt Arsenault 6c7f640bf7 AMDGPU/GlobalISel: Implement LLT version of allowsMisalignedMemoryAccesses 2020-08-06 09:50:36 -04:00
Tim Keith 08c7d570d3 [flang] Add options to control IMPLICIT NONE
Add `-fimplicit-none-type-always` to treat each specification-part
like it has `IMPLICIT NONE`. This is helpful for enforcing good Fortran
programming practices. We might consider something similar for
`IMPLICIT NONE(EXTERNAL)` as well.

Add `-fimplicit-none-type-never` to ignore occurrences of `IMPLICIT NONE`
and `IMPLICIT NONE(TYPE)`. This is to handle cases like the one below,
which violates the standard but it accepted by some compilers:
```
subroutine s(a, n)
  implicit none
  real :: a(n)
  integer :: n
end
```

Differential Revision: https://reviews.llvm.org/D85363
2020-08-06 06:48:01 -07:00
Matt Arsenault 37894ba661 AMDGPU/GlobalISel: Make s16 phi legal
If we were to have an operation with an s16 def that needs to be
executed in a waterfall loop, not having s16 legal would place an
avoidable burden on RegBankSelect to widen it.
2020-08-06 09:41:14 -04:00
Matt Arsenault 5316256709 AMDGPU/GlobalISel: Fix assert on copy to vcc
This was trying to constrain a physical register. By the verifier's
understanding, it's impossible to have a 1-bit copy to vcc/vcc_lo so
don't try to handle physregs.
2020-08-06 09:41:14 -04:00
Raphael Isemann 1de43bd6df Revert "PDBExtras.h - remove unnecessary raw_ostream forward declaration. NFCI."
This reverts commit 87c5437afd.

The commit includes several headers in the middle of a function, which
breaks pretty much everything.
2020-08-06 15:15:43 +02:00
Nicolas Vasilache 1353cbc257 [mlir][Vector] NFC - Use matchAndRewrite in ContractionOp lowering patterns
Replace the use of separate match and rewrite which unnecessarily duplicates logic.

Differential Revision: https://reviews.llvm.org/D85421
2020-08-06 09:02:25 -04:00
Peter Smith 839d974ee0 [DOCS] Add more detail to stack protector documentation
The Clang -fstack-protector documentation mentions what functions are considered
vulnerable but does not mention the details of the implementation such as the use
of a global variable for the guard value. This brings the documentation more in
line with the GCC documentation at:
https://gcc.gnu.org/onlinedocs/gcc/Instrumentation-Options.html
and gives someone using the option more idea about what is protected.

This partly addresses https://bugs.llvm.org/show_bug.cgi?id=42764

Differential Revision: https://reviews.llvm.org/D85239
2020-08-06 13:47:21 +01:00
Xing GUO 40506d5e2f [DWARFYAML][debug_info] Make the 'Values' field optional.
This patch makes the 'Values' field optional. This is useful when we
handcraft the terminating entry of DIEs.

```
debug_info:
  - Version:  4
    ...
    Entries:
      - AbbrCode: 1
        Values:
          - Value: 0x1234
      - AbbrCode: 0 ## Termination
```

Reviewed By: jhenderson, grimar

Differential Revision: https://reviews.llvm.org/D85397
2020-08-06 20:43:52 +08:00
Xing GUO 6616d84cee [obj2yaml] Test dumping an empty .debug_aranges section.
This patch adds one test case that tests dumping an empty .debug_aranges
section.

Reviewed By: jhenderson, grimar

Differential Revision: https://reviews.llvm.org/D85405
2020-08-06 20:40:12 +08:00
David Spickett e82866d5d9 [lldb][AArch64] Correct compile options for Neon corefile
SVE is not required, it has its own test. Note that
there is no "+neon" so "+simd" is used instead.

Also rename the file to match the name of the corefile
it produces.

Reviewed By: omjavaid

Differential Revision: https://reviews.llvm.org/D85134
2020-08-06 13:39:09 +01:00
Muhammad Omair Javaid 94a5919946 [LLDB] Skip test_launch_simple from TestTargetAPI.py on Arm/AArch64 Linux
Recently added TestTargetAPI.py test "test_launch_simple" is failing on
Arm/AArch64 Linux targets. Putting them to skip until fixed.

Differential Revision: https://reviews.llvm.org/D85235
2020-08-06 17:38:20 +05:00
Petar Avramovic d893278bba [GlobalISel][InlineAsm] Fix matching input constraint to physreg
Add given input and mark it as tied.
Doesn't create additional copy compared to
matching input constraint to virtual register.

Differential Revision: https://reviews.llvm.org/D85122
2020-08-06 14:35:51 +02:00
Anatoly Trosinenko 5a07490d76 [ABI][NFC] Fix the confusion of ByVal and ByRef argument names
The second argument of getNaturalAlignIndirect() was `bool ByRef`, but
the implementation was just delegating to getIndirect() with `ByRef`
passed unchanged to `bool ByVal` parameter of getIndirect().

Fix a couple of /*ByRef=*/ comments as well.

Reviewed By: rjmccall

Differential Revision: https://reviews.llvm.org/D85113
2020-08-06 15:20:18 +03:00
Simon Pilgrim 3d10050e37 BitstreamRemarkParser.h - remove unnecessary includes. NFCI.
Remove unused includes, moving to the lib header or cpp file as necessary.
2020-08-06 13:17:53 +01:00