87c7b09d8d
Some ARM implementaions, e.g. A-series, does return stack prediction. That is,
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the processor keeps a return addresses stack (RAS) which stores the address
and the instruction execution state of the instruction after a function-call
type branch instruction.
Calling a "noreturn" function with normal call instructions (e.g. bl) can
corrupt RAS and causes 100% return misprediction so LLVM should use a
unconditional branch instead. i.e.
mov lr, pc
b _foo
The "mov lr, pc" is issued in order to get proper backtrace.
rdar://8979299
llvm-svn: 151623
2012-02-28 06:42:03 +00:00
ccd651cac8
Convert generated intrinsic attributes to use an array lookup as Chris suggested in PR11951.
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llvm-svn: 151622
2012-02-28 06:32:00 +00:00
39b5255df4
Reverted r152620 - DSE: Shorten memset when a later store overwrites the start of it. There were all sorts of buildbot issues
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llvm-svn: 151621
2012-02-28 05:06:24 +00:00
f3862f91de
DSE: Shorten memset when a later store overwrites the start of it
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llvm-svn: 151620
2012-02-28 04:27:10 +00:00
d48b7783e8
Oops...Don't commit the other stuff..
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llvm-svn: 151618
2012-02-28 04:01:21 +00:00
73799f68d8
Modify comment to reflect the importance of this code.
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llvm-svn: 151617
2012-02-28 03:47:09 +00:00
b2b980e628
Add comments.
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llvm-svn: 151615
2012-02-28 03:18:43 +00:00
b8a8e0c262
Do not reserve $gp as a dedicated global base register if the target ABI is not O32.
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llvm-svn: 151614
2012-02-28 03:17:38 +00:00
e56294dbc6
Strip extraneous information, if present, from the linker version string on
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Mac OS X. Patch by Fabian Groffen, with a slight tweak by me.
llvm-svn: 151612
2012-02-28 02:55:41 +00:00
330d901ce3
Add support for floating point base register + offset register addressing mode
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load and store instructions.
llvm-svn: 151611
2012-02-28 02:55:02 +00:00
4c5ad2b812
Handle regmasks in MachineCSE.
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Don't attempt to extend physreg live ranges across calls.
<rdar://problem/10942095>
llvm-svn: 151610
2012-02-28 02:08:50 +00:00
334eaeae8e
Enable -Wcovered-switch-default as it matches the switch style used in llvm.
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llvm-svn: 151609
2012-02-28 02:01:55 +00:00
16c4a972db
Handle regmasks in the machine code verifier.
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llvm-svn: 151607
2012-02-28 01:42:41 +00:00
92c15b2b2c
Enable ARM base pointer when calling functions with large arguments.
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When an outgoing call takes more than 2k of arguments on the stack, we
don't allocate that call frame in the prolog, but adjust the stack
pointer immediately before the call instead.
This causes problems with the emergency spill slot because PEI can't
track stack pointer adjustments on the second pass, and if the outgoing
arguments are too big, SP can't be used to reach the emergency spill
slot at all.
Work around these problems by ensuring there is a base or frame pointer
that can be used to access the emergency spill slot.
<rdar://problem/10917166>
llvm-svn: 151604
2012-02-28 01:15:01 +00:00
8c4729fd44
[Object] Add {begin,end}_dynamic_symbols stubs and implementation for ELF.
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Add -D option to llvm-nm to dump dynamic symbols.
Patch by David Meyer.
llvm-svn: 151600
2012-02-28 00:40:37 +00:00
248c29966c
Fix 80-column violation.
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llvm-svn: 151599
2012-02-28 00:23:01 +00:00
c947412fae
Allow llvm-stress to optionally generate the other floating-point types (half, ppcf128, mmx, etc.)
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llvm-svn: 151596
2012-02-27 23:59:33 +00:00
2b3f61af18
Add back removed code. It still causes LLVM to miscompile. But not having it breaks other things.
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llvm-svn: 151594
2012-02-27 23:48:30 +00:00
a49ef92a76
This patch adds instruction latencies for the SSE instructions
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to the instruction scheduler for the Intel Atom.
llvm-svn: 151590
2012-02-27 23:35:03 +00:00
43b2506e32
test commit.
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llvm-svn: 151588
2012-02-27 23:31:51 +00:00
0774902a00
Duncan pointed out that if the alignment isn't explicitly specified, it defaults to the ABI alignment. Given that, make this code a bit more aggressive in such cases.
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llvm-svn: 151584
2012-02-27 23:16:46 +00:00
cf95bb758c
Delete incorrect reference to inexistent Hexagon architecture manuals.
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llvm-svn: 151582
2012-02-27 23:00:52 +00:00
688793da4a
Don't use #if 0. Just remove until I can address this.
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llvm-svn: 151580
2012-02-27 22:55:40 +00:00
06e4818dd6
XFAIL test until <rdar://problem/10913281> is fixed.
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llvm-svn: 151578
2012-02-27 22:53:42 +00:00
7b4646184b
The code that cleans up multiple, isomorphic types has a subtle error that
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manifests itself when building LLVM with LTO.
<rdar://problem/10913281>
llvm-svn: 151576
2012-02-27 22:34:19 +00:00
15a7b8e26a
Remove duplicate copy of Object/ELF.h that somehow managed to get in.
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Patch by David Meyer.
llvm-svn: 151575
2012-02-27 22:06:44 +00:00
ddeb9d11fe
Fix for PR12090: clear def maps of aliases when visiting a copy. e.g.
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%S5<def> = COPY %S0<kill>
First clear def map of Q1, etc.
No small test case available.
llvm-svn: 151574
2012-02-27 21:46:42 +00:00
7b811d30d9
ARM BL/BLX instruction fixups should use relocations.
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We on the linker to resolve calls to the appropriate BL/BLX instruction
to make interworking function correctly. It uses the symbol in the
relocation to do that, so we need to be careful about being too clever.
To enable this for ARM mode, split the BL/BLX fixup kind off from the
unconditional-branch fixups.
rdar://10927209
llvm-svn: 151571
2012-02-27 21:36:23 +00:00
65545aa904
Move "clang/Analysis/Support/SaveAndRestore.h" to "llvm/ADT/SaveAndRestore.h"
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to make it more widely available.
llvm-svn: 151564
2012-02-27 21:08:33 +00:00
8bc169c3c5
Teach BasicAA about the LLVM IR rules that allow reading past the end of an object given sufficient alignment. Fixes PR12098.
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llvm-svn: 151553
2012-02-27 20:46:07 +00:00
ded7f01062
Test the section specification.
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llvm-svn: 151552
2012-02-27 20:42:19 +00:00
e932a68575
Fix PR12089
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http://llvm.org/bugs/show_bug.cgi?id=12089
llvm-svn: 151550
2012-02-27 20:31:47 +00:00
8fe40cd659
Reapply r151278 with fixes.
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MCize function entry label emission on PowerPC64 properly.
llvm-svn: 151547
2012-02-27 20:20:47 +00:00
a72393a3f9
Add q suffix aliases for the fistp and fisttp mnemonics.
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rdar://10921670
PR11935
llvm-svn: 151543
2012-02-27 19:43:12 +00:00
b260f206d2
Remove unnecessary template parameters.
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llvm-svn: 151540
2012-02-27 19:17:53 +00:00
3c5cab4730
Fix instruction predicates that were not set correctly.
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llvm-svn: 151538
2012-02-27 19:09:08 +00:00
5aafb56dc0
Update machine code verifier.
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After the SlotIndex slot names were updated, it is possible to apply
stricter checks to live intervals.
Also treat bundles as bags of operands when checking live intervals.
llvm-svn: 151531
2012-02-27 18:24:30 +00:00
1489b523c3
Fix the symbolic operand added for the C disassmbler API for the ARM bl
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thumb instruction. The PC adjustment is +4 in Thumb mode and +8 in ARM mode.
llvm-svn: 151530
2012-02-27 18:15:15 +00:00
1f152baef8
Add a MachineOperand iterator class.
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The MIOperands iterator can visit operands on a single instruction, or
all operands in a bundle. This simplifies code like the register
allocator that treats bundles as a set of operands.
llvm-svn: 151529
2012-02-27 18:09:36 +00:00
93887631d9
Plog a memleak in GlobalOpt.
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Found by valgrind.
llvm-svn: 151525
2012-02-27 12:48:24 +00:00
9edea84420
Micro-optimization, no functionality change.
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llvm-svn: 151524
2012-02-27 12:11:41 +00:00
8e9d47c039
Help the compiler to eliminate some dead code when hashing an array of T
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where sizeof (T) is a multiple of 4.
llvm-svn: 151523
2012-02-27 11:00:17 +00:00
1be25a78f7
The value numbering function is recursive, so it is possible for multiple new
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value numbers to be assigned when calculating any particular value number.
Enhance the logic that detects new value numbers to take this into account,
for a tiny compile time speedup. Fix a comment typo while there.
llvm-svn: 151522
2012-02-27 09:54:35 +00:00
27f459519d
When performing a conditional branch depending on the value of a comparison
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%cmp (eg: A==B) we already replace %cmp with "true" under the true edge, and
with "false" under the false edge. This change enhances this to replace the
negated compare (A!=B) with "false" under the true edge and "true" under the
false edge. Reported to improve perlbench results by 1%.
llvm-svn: 151517
2012-02-27 08:14:30 +00:00
317640dfd0
Remove HexagonGenIntrinsics.inc from Hexagon cmake file. It does not appear in the Makefile and the output it produces isn't used. The Hexagon intrinsics are all in the global Intrinsics.gen.
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llvm-svn: 151514
2012-02-27 02:59:43 +00:00
8e76068c6e
Update tblgen command guide. Remove unused tblgen InstrEnumEmitter files.
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llvm-svn: 151513
2012-02-27 02:31:09 +00:00
f6de2daf13
delete useless comment&blank
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llvm-svn: 151512
2012-02-27 02:21:34 +00:00
09a4201d3c
Fix this assert. IP can point to an instruction with strange dominance
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properties (invoke). Just assert that the instruction we return dominates
the insertion point.
llvm-svn: 151511
2012-02-27 02:13:03 +00:00
6491c8020e
X86 disassembler support for jcxz, jecxz, and jrcxz. Fixes PR11643. Patch by Kay Tiong Khoo.
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llvm-svn: 151510
2012-02-27 01:54:29 +00:00
ce50eec7c6
Remove more GCC FE build stuff.
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llvm-svn: 151507
2012-02-26 22:26:37 +00:00
Evan Cheng