Commit Graph

169 Commits

Author SHA1 Message Date
Brian Gaeke 584308b71a Add support for copying bool constants to registers.
Disable the code that copies long constants to registers - it looks fishy.
Implement some simple casts: integral, smaller than longs, and equal-width
 or narrowing only.

llvm-svn: 13413
2004-05-07 21:39:30 +00:00
Brian Gaeke 6f6e4b9f59 I don't think we have to have 4 extra allocated (but unused) bytes on the stack.
llvm-svn: 12905
2004-04-13 18:28:37 +00:00
Brian Gaeke 969795b4ea I started working on casts, but I don't have anything compilable yet.
llvm-svn: 12903
2004-04-13 18:27:46 +00:00
Brian Gaeke 85521d70dd Don't print [%reg + 0], just print [%reg]
llvm-svn: 12759
2004-04-07 17:33:56 +00:00
Brian Gaeke 6d62df5422 First version of code to handle loads. Stub function for handling stores.
llvm-svn: 12758
2004-04-07 17:29:37 +00:00
Brian Gaeke 989c04ab58 Support loading arguments from %I0...%I5 into virtual registers in
function prologues, and fix an off-by-one in visitCallInst that was
putting call args into the wrong registers.

llvm-svn: 12757
2004-04-07 17:04:09 +00:00
Brian Gaeke 7985e56cf9 It's setting up the call args right now, but on the callee side, it's
trying to get incoming args off the stack, instead of the %i0...%i6 regs,
which is wrong.

llvm-svn: 12756
2004-04-07 16:41:22 +00:00
Chris Lattner bd58b3fbe9 This is a start on handling setcc instructions. As the comment notes, we
have no good way of handling this until the code generator is improved.
We should probably just emit V9 instructions in the meantime.

llvm-svn: 12745
2004-04-07 05:04:51 +00:00
Chris Lattner bb22d5a564 andd subcc instructions which is used to create the 'cmp' pseudo instruction
llvm-svn: 12744
2004-04-07 05:04:01 +00:00
Chris Lattner f6245bc8e9 Avoid emitting an extra copy on each 32-bit operation
llvm-svn: 12743
2004-04-07 04:36:53 +00:00
Brian Gaeke 4aac81435f Make generation of stack-slot loads and copies less ugly.
llvm-svn: 12742
2004-04-07 04:29:14 +00:00
Brian Gaeke 3675c30873 Fix bug in printing loads.
llvm-svn: 12741
2004-04-07 04:29:03 +00:00
Chris Lattner 42ffd2e32c Add support for shift instructions, wrap some long lines
llvm-svn: 12740
2004-04-07 04:27:16 +00:00
Chris Lattner 8406cf3046 Fix encoding of existing shift instructions, add rr shifts
llvm-svn: 12739
2004-04-07 04:26:57 +00:00
Chris Lattner fcdf82a19f Add a bunch more instructions
llvm-svn: 12737
2004-04-07 04:06:46 +00:00
Chris Lattner fd8212ef54 Merge my changes with brians
llvm-svn: 12736
2004-04-07 04:05:49 +00:00
Brian Gaeke 37f92b534f Add in some things I forgot, which Chris helpfully reminded me of...
llvm-svn: 12735
2004-04-07 04:05:12 +00:00
Brian Gaeke 322423181b Add support for the "Y" register, used by MUL & DIV.
llvm-svn: 12734
2004-04-07 04:01:11 +00:00
Brian Gaeke 5524d54c02 Add UDIV, SDIV, and a few variants of WR.
llvm-svn: 12733
2004-04-07 04:01:00 +00:00
Brian Gaeke cfbfb8ac57 Preliminary support for getting 64-bit integer constants into registers.
Preliminary support for division. It's gross because you have to initialize
the "Y" register, which is the top 32 bits of the thing you're dividing.

llvm-svn: 12732
2004-04-07 04:00:49 +00:00
Brian Gaeke 589bf05bf4 Prune unnecessary #includes
llvm-svn: 12731
2004-04-06 23:25:07 +00:00
Brian Gaeke b3deed9fae Simple delay slot filler pass.
llvm-svn: 12730
2004-04-06 23:21:45 +00:00
Brian Gaeke 610c685eb6 Add references to delay slot filler pass.
Fill in addPassesToJITCompile method.

llvm-svn: 12729
2004-04-06 23:21:24 +00:00
Brian Gaeke 4bd246aee9 First attempt at handling frame index elimination.
llvm-svn: 12728
2004-04-06 22:10:22 +00:00
Brian Gaeke 3915ad7c02 First attempt at special-casing printing of [%reg + offset] for
ld/st instructions - doesn't seem to work yet, but I think it's
just a typo or something somewhere.

llvm-svn: 12727
2004-04-06 22:10:11 +00:00
Brian Gaeke 5e624b822b Delete reference to "the Mach-O Runtime ABI".
llvm-svn: 12726
2004-04-06 22:09:59 +00:00
Brian Gaeke 2e91a3d650 Deal with call return values.
Don't put NOPs in delay slots at all. We'll have a fix-up pass later.

llvm-svn: 12725
2004-04-06 22:09:23 +00:00
Brian Gaeke d0bdad38f3 Add support for many of the MRegisterInfo callbacks.
Eliminating call-frame pseudo instrs and frame indices are still stubs.
Flesh out the emitPrologue method based on better ABI knowledge.

llvm-svn: 12632
2004-04-02 20:53:37 +00:00
Brian Gaeke d4869e4107 Add load, store, and NOP instructions.
Fix up comments.

llvm-svn: 12631
2004-04-02 20:53:37 +00:00
Brian Gaeke b65254a34d Add support for printing pc-relative displacements of functions (as used in
the CALL instruction).

llvm-svn: 12630
2004-04-02 20:53:35 +00:00
Brian Gaeke 2fd46b6e43 Add support for call instructions (0-ary only for now).
llvm-svn: 12629
2004-04-02 20:53:33 +00:00
Brian Gaeke d962dd5528 The .type directive on Solaris uses the # character instead of @.
llvm-svn: 12454
2004-03-16 22:52:04 +00:00
Brian Gaeke 3fb0e203cd Fix bug in zero-extending of shorts.
llvm-svn: 12453
2004-03-16 22:45:42 +00:00
Brian Gaeke ae22ce5370 Add UMULrr and SMULrr instructions.
llvm-svn: 12452
2004-03-16 22:37:13 +00:00
Brian Gaeke ae0ca8baa6 Use ! for comment char; it works in both Solaris as and GAS.
llvm-svn: 12451
2004-03-16 22:37:12 +00:00
Brian Gaeke 67fcefbfef Make getClass more robust by adding cLong.
Add handling for Mul instruction.

llvm-svn: 12450
2004-03-16 22:37:11 +00:00
Brian Gaeke 3a27bd889b Hmm, who left this sitting around in my tree
llvm-svn: 12255
2004-03-09 04:49:13 +00:00
Chris Lattner 98502aae76 Avoid allocating special registers a bit more robustly
llvm-svn: 12207
2004-03-08 03:48:07 +00:00
Brian Gaeke 4e0669cef0 Support return values of basic integer types.
Emit RETL instruction to return instead of funny JMPL.
Fix indentation.

llvm-svn: 12186
2004-03-06 05:32:28 +00:00
Brian Gaeke c65b97d4f6 Sort stanzas into Sparc V8 book page number order.
Add RET, RETL.  Rename SAVE, RESTORE & JMPL for consistency.

llvm-svn: 12185
2004-03-06 05:32:13 +00:00
Brian Gaeke 84b4c9208d Hack it so we do not try to allocate values to G0.
llvm-svn: 12184
2004-03-06 05:31:32 +00:00
Brian Gaeke 901cfa9e2e Make prolog align stack properly. Make epilog not touch any registers.
llvm-svn: 12183
2004-03-06 05:31:21 +00:00
Brian Gaeke 5a1c7a8be3 Emit register names in lowercase, as required by the assembler.
llvm-svn: 12182
2004-03-06 05:30:21 +00:00
Brian Gaeke 639b04aca3 Teach getRegClassForType where to find FP registers
llvm-svn: 12180
2004-03-06 03:54:13 +00:00
Brian Gaeke 0c76d1146f Asm output is looking a lot better; not correct for all operands yet though.
llvm-svn: 12143
2004-03-05 08:39:09 +00:00
Brian Gaeke 9c609df3c9 Support -print-machineinstrs
llvm-svn: 12124
2004-03-04 19:22:16 +00:00
Brian Gaeke 82ec4a561b Asm printer support, based on x86 - only prints mnemonics for now
llvm-svn: 12113
2004-03-04 06:00:41 +00:00
Brian Gaeke 8ace44fe0d Double-FP pseudo-registers.
llvm-svn: 12112
2004-03-04 05:15:03 +00:00
Brian Gaeke 92c95f812d Subtract instructions; minor cleanups
llvm-svn: 12111
2004-03-04 04:37:45 +00:00
Brian Gaeke d2e89190d9 Floating point regs
llvm-svn: 12110
2004-03-04 04:37:22 +00:00
Brian Gaeke 956fb06a4a Simple copyConstantToReg support, SETHIi and ORri
llvm-svn: 12107
2004-03-04 00:56:25 +00:00
Brian Gaeke 165ff998e0 Support add - note, still missing important copyConstantToRegister stuff
llvm-svn: 12106
2004-03-03 23:03:14 +00:00
Brian Gaeke 427cec1395 TargetCacheInfo has been removed; its only uses were to propagate a constant
(16) into certain areas of the SPARC V9 back-end. I'm fairly sure the US IIIi's
dcache has 32-byte lines, so I'm not sure where the 16 came from. However, in
the interest of not breaking things any more than they already are, I'm going
to leave the constant alone.

llvm-svn: 12043
2004-03-01 06:43:29 +00:00
Chris Lattner ed01da8f0b Adjust to change in TII ctor arguments
llvm-svn: 11987
2004-02-29 06:31:44 +00:00
Chris Lattner ca89812db7 These two virtual methods are never called.
llvm-svn: 11984
2004-02-29 05:59:33 +00:00
Chris Lattner e5f08917ae Implement initial prolog/epilog code insertion methods.
llvm-svn: 11979
2004-02-29 05:18:30 +00:00
Chris Lattner b1862e4d3b Add an instruction selector capable of selecting 'ret void'
llvm-svn: 11973
2004-02-29 00:27:00 +00:00
Chris Lattner 72bb8fcb15 Change this so that LLC actually tries to run the code generator, though it will
immediately abort due to lack of an instruction selector. :)

llvm-svn: 11963
2004-02-28 20:21:45 +00:00
Chris Lattner 1a3ee3e961 Finegrainify namespacification
llvm-svn: 11958
2004-02-28 19:52:49 +00:00
Chris Lattner e40fd90b0b Tab completion is our friend.
llvm-svn: 11957
2004-02-28 19:45:39 +00:00
Chris Lattner 0179fb5881 Clean up rules
llvm-svn: 11956
2004-02-28 19:43:40 +00:00
Chris Lattner 74598091a1 Bring this directory into "it actually compiles" land
llvm-svn: 11955
2004-02-28 19:37:18 +00:00
Chris Lattner 3290952f8b Fix multiple inclusion problem
llvm-svn: 11954
2004-02-28 19:31:32 +00:00
Misha Brukman 1743c4090d Instructions to call and return from functions.
llvm-svn: 11858
2004-02-26 00:37:12 +00:00
Misha Brukman 564654d654 SparcV8 regs are really 32-bit, not 64! Thanks, Chris.
llvm-svn: 11835
2004-02-25 21:03:02 +00:00
Misha Brukman f8dcdcc83b Clean up the tablegen descriptions for SparcV8.
llvm-svn: 11834
2004-02-25 21:02:21 +00:00
Misha Brukman 2122b969f9 Fix the SparcV8 register definitions that were imported from PPC template.
llvm-svn: 11833
2004-02-25 21:00:05 +00:00
Misha Brukman 0e3a7ca53e SparcV8 has different types of instructions, but F1 is only used for CALL.
llvm-svn: 11832
2004-02-25 20:52:20 +00:00
Brian Gaeke 9a5bd7fca7 SparcV8 skeleton
llvm-svn: 11828
2004-02-25 19:28:19 +00:00