llvm-project

Commit Graph

Author	SHA1	Message	Date
John McCall	a8ec7eb9cf	Promote atomic type sizes up to a power of two, capped by MaxAtomicPromoteWidth. Fix a ton of terrible bugs with _Atomic types and (non-intrinsic-mediated) loads and stores thereto. llvm-svn: 176658	2013-03-07 21:37:17 +00:00
David Chisnall	168a15188e	Remove unused check from test. llvm-svn: 176422	2013-03-03 17:50:06 +00:00
David Chisnall	ef78c305fa	Improve C11 atomics support: - Generate atomicrmw operations in most of the cases when it's sensible to do so. - Don't crash in several common cases (and hopefully don't crash in more of them). - Add some better tests. We now generate significantly better code for things like: _Atomic(int) x; ... x++; On MIPS, this now generates a 4-instruction ll/sc loop, where previously it generated about 30 instructions in two nested loops. On x86-64, we generate a single lock incl, instead of a lock cmpxchgl loop (one instruction instead of ten). llvm-svn: 176420	2013-03-03 16:02:42 +00:00

Author

SHA1

Message

Date

John McCall

a8ec7eb9cf

Promote atomic type sizes up to a power of two, capped by

MaxAtomicPromoteWidth.  Fix a ton of terrible bugs with
_Atomic types and (non-intrinsic-mediated) loads and stores
thereto.

llvm-svn: 176658

2013-03-07 21:37:17 +00:00

David Chisnall

168a15188e

Remove unused check from test.

llvm-svn: 176422

2013-03-03 17:50:06 +00:00

David Chisnall

ef78c305fa

Improve C11 atomics support:

- Generate atomicrmw operations in most of the cases when it's sensible to do
  so.
- Don't crash in several common cases (and hopefully don't crash in more of
  them).
- Add some better tests.

We now generate significantly better code for things like:
_Atomic(int) x;
...
x++;

On MIPS, this now generates a 4-instruction ll/sc loop, where previously it
generated about 30 instructions in two nested loops.  On x86-64, we generate a
single lock incl, instead of a lock cmpxchgl loop (one instruction instead of
ten).

llvm-svn: 176420

2013-03-03 16:02:42 +00:00

3 Commits