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Author SHA1 Message Date
Chris Lattner 873ef133ce Significantly revamp allocation of machine code to use free lists, real 
allocation policies and much more.  All this complexity, and we have no
functionality change, woo! :)

llvm-svn: 28225
 2006-05-11 23:08:08 +00:00
Chris Lattner 1443bc52be Refactor some code, making it simpler. 
When doing the initial pass of constant folding, if we get a constantexpr,
simplify the constant expr like we would do if the constant is folded in the
normal loop.

This fixes the missed-optimization regression in
Transforms/InstCombine/getelementptr.ll last night.

llvm-svn: 28224
 2006-05-11 17:11:52 +00:00
Evan Cheng dd7230c9e0 Add MOV16_rm / MOV32_rm and MOV16_mr / MOV32_mr to isLoadFromStackSlot and isStoreToStackSlot 
llvm-svn: 28223
 2006-05-11 07:33:49 +00:00
Evan Cheng 47926aff96 Set weight of zero length intervals to infinite to prevent them from being 
spilled.

llvm-svn: 28220
 2006-05-11 07:29:24 +00:00
Evan Cheng db6aa4896b Backing out previous check-in. 
llvm-svn: 28219
 2006-05-11 07:28:16 +00:00
Evan Cheng 6ad040a6bc If the live interval legnth is essentially zero, i.e. in every live range 
the use follows def immediately, it doesn't make sense to spill it and
hope it will be easier to allocate for this LI.

llvm-svn: 28217
 2006-05-10 22:30:41 +00:00
Chris Lattner a36ee4ea34 Two changes: 
1. Implement InstCombine/deadcode.ll by not adding instructions in unreachable
   blocks (due to constants in conditional branches/switches) to the worklist.
   This causes them to be deleted before instcombine starts up, leading to
   better optimization.

2. In the prepass over instructions, do trivial constprop/dce as we go.  This
   has the effect of improving the effectiveness of #1.  In addition, it
   *significantly* speeds up instcombine on test cases with large amounts of
   constant folding code (for example, that produced by code specialization
   or partial evaluation).  In one example, it speeds up instcombine from
   0.0589s to 0.0224s with a release build (a 2.6x speedup).

llvm-svn: 28215
 2006-05-10 19:00:36 +00:00
Chris Lattner b25cb79604 Fix the PowerPC JIT-only failure on UnitTests/Vector/sumarray-dbl, which is 
really a bad codegen bug that LLC happens to get lucky with. I must chat with
Nate for the proper fix.

llvm-svn: 28213
 2006-05-10 06:38:32 +00:00
Evan Cheng 9665ba053f Templatify RegReductionPriorityQueue 
llvm-svn: 28212
 2006-05-10 06:16:44 +00:00
Chris Lattner bb7ff6690f Add an assertion for a common error 
llvm-svn: 28210
 2006-05-10 04:32:43 +00:00
Nate Begeman 1a225d23ae Fix PR773 
llvm-svn: 28207
 2006-05-09 18:20:51 +00:00
Chris Lattner f801792e08 Fix a regression in my patch from last night that broke the llvmgcc4 build on 
ppc

llvm-svn: 28205
 2006-05-09 16:41:59 +00:00
Chris Lattner 2814134a5d Indent .data/.text in the .s file 
llvm-svn: 28204
 2006-05-09 16:15:00 +00:00
Evan Cheng 7d693898ee Add pseudo dependency to force a def&use operand to be scheduled last (unless 
the distance between the def and another use is much longer). This is under
option control for now "-sched-lower-defnuse".

llvm-svn: 28201
 2006-05-09 07:13:34 +00:00
Evan Cheng 2c74848af1 Debugging info 
llvm-svn: 28200
 2006-05-09 06:55:15 +00:00
Evan Cheng fc532fe1b7 Remove a completed entry. 
llvm-svn: 28199
 2006-05-09 06:54:05 +00:00
Evan Cheng ae45020720 PR 770 - permit coallescing of registers in subset register classes. 
llvm-svn: 28197
 2006-05-09 06:37:48 +00:00
Chris Lattner 4ebc6a2311 Implement MASM sections correctly, without a "has masm sections flag" and a bunch of special case code. 
llvm-svn: 28194
 2006-05-09 05:33:48 +00:00
Chris Lattner 8c2bfc0659 Oh yeah, there are two of these now, unify both. 
llvm-svn: 28192
 2006-05-09 05:24:50 +00:00
Chris Lattner 6341df8069 Setting SwitchToSectionDirective properly in the MASM backend permits a bunch 
of code to be unified.

llvm-svn: 28191
 2006-05-09 05:23:12 +00:00
Chris Lattner 0b7acaf027 MASM doesn't have one of these. 
llvm-svn: 28190
 2006-05-09 05:21:47 +00:00
Chris Lattner d36cc2b610 Don't prefix section directives with a tab. Doing so causes blank lines to 
be emitted to the .s file.

llvm-svn: 28189
 2006-05-09 05:19:59 +00:00
Chris Lattner e64f764d25 Make the masm codepath work like the normal code path. 
llvm-svn: 28188
 2006-05-09 05:15:58 +00:00
Chris Lattner e0006c6794 Preserve prior behavior 
llvm-svn: 28187
 2006-05-09 05:15:24 +00:00
Chris Lattner c0f0dfa56f The MASM asmprinter has been fixed, these hacks are no longer needed. 
llvm-svn: 28186
 2006-05-09 05:13:34 +00:00
Chris Lattner d0201946ad Fix the MASM asmprinter's lies. It does not want to emit code to .text/.data 
it wants it emitted to _text/_data.

llvm-svn: 28185
 2006-05-09 05:12:53 +00:00
Chris Lattner 8488ba2e41 Split SwitchSection into SwitchTo{Text|Data}Section methods. 
llvm-svn: 28184
 2006-05-09 04:59:56 +00:00
Chris Lattner 8587f8885d Some notes and thoughts to myself 
llvm-svn: 28182
 2006-05-09 04:58:46 +00:00
Chris Lattner 4fe87d67c4 Patch to make some xforms preserve each other. Patch contributed by 
Domagoj Babic!

llvm-svn: 28181
 2006-05-09 04:13:41 +00:00
Chris Lattner 6d8dd189f6 Move some methods out of line so that MutexGuard.h isn't needed in a public header. 
llvm-svn: 28179
 2006-05-08 22:00:52 +00:00
Chris Lattner aa193d80a9 Another bad case I noticed 
llvm-svn: 28177
 2006-05-08 21:39:45 +00:00
Chris Lattner 5bcea612f4 add a note 
llvm-svn: 28176
 2006-05-08 21:24:21 +00:00
Chris Lattner 446e1ef26a Make the case I just checked in stronger. Now we compile this: 
short test2(short X, short x) {
  int Y = (short)(X+x);
  return Y >> 1;
}

to:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srawi r3, r2, 1
        blr

instead of:

_test2:
        add r2, r3, r4
        extsh r2, r2
        srwi r2, r2, 1
        extsh r3, r2
        blr

llvm-svn: 28175
 2006-05-08 21:18:59 +00:00
Chris Lattner 29062da0ac Implement and_sext.ll:test3, generating: 
_test4:
        srawi r3, r3, 16
        blr

instead of:

_test4:
        srwi r2, r3, 16
        extsh r3, r2
        blr

for:

short test4(unsigned X) {
  return (X >> 16);
}

llvm-svn: 28174
 2006-05-08 20:59:41 +00:00
Nate Begeman ce6646c366 Yet more readme updating 
llvm-svn: 28172
 2006-05-08 20:54:02 +00:00
Chris Lattner 2935d8190c Compile this: 
short test4(unsigned X) {
  return (X >> 16);
}

to:

_test4:
        movl 4(%esp), %eax
        sarl $16, %eax
        ret

instead of:

_test4:
        movl $-65536, %eax
        andl 4(%esp), %eax
        sarl $16, %eax
        ret

llvm-svn: 28171
 2006-05-08 20:51:54 +00:00
Nate Begeman 68a45419cc New note about something bad happening in target independent optimizers 
llvm-svn: 28170
 2006-05-08 20:08:28 +00:00
Nate Begeman 0eb8f2e496 Proving once again that I am not as smart as the compiler 
llvm-svn: 28169
 2006-05-08 19:09:24 +00:00
Nate Begeman 9b6d4c2968 Fold more shifts into inserts, and update the README 
llvm-svn: 28168
 2006-05-08 17:38:32 +00:00
Chris Lattner 78da6792e7 Fold shifts with undef operands. 
llvm-svn: 28167
 2006-05-08 17:29:49 +00:00
Chris Lattner 10c653744e When tracking demanded bits, if any bits from the sext of an SRA are demanded, 
then so is the input sign bit.  This fixes mediabench/g721 on X86.

llvm-svn: 28166
 2006-05-08 17:22:53 +00:00
Nate Begeman d7a19102d1 Make emission of jump tables a bit less conservative; they are now required 
to be only 31.25% dense, rather than 75% dense.

llvm-svn: 28165
 2006-05-08 16:51:36 +00:00
Evan Cheng 9733bde74c Fixing truncate. Previously we were emitting truncate from r16 to r8 as 
movw. That is we promote the destination operand to r16. So
        %CH = TRUNC_R16_R8 %BP
is emitted as
        movw %bp, %cx.

This is incorrect. If %cl is live, it would be clobbered.
Ideally we want to do the opposite, that is emitted it as
        movb ??, %ch
But this is not possible since %bp does not have a r8 sub-register.

We are now defining a new register class R16_ which is a subclass of R16
containing only those 16-bit registers that have r8 sub-registers (i.e.
AX - DX). We isel the truncate to two instructions, a MOV16to16_ to copy the
value to the R16_ class, followed by a TRUNC_R16_R8.

Due to bug 770, the register colaescer is not going to coalesce between R16 and
R16_. That will be fixed later so we can eliminate the MOV16to16_. Right now, it
can only be eliminated if we are lucky that source and destination registers are
the same.

llvm-svn: 28164
 2006-05-08 08:01:26 +00:00
Nate Begeman dc996b3f6c Update some stuff now that the new rlwimi code has gone in 
llvm-svn: 28162
 2006-05-08 02:52:38 +00:00
Nate Begeman e5ce5bb6da Fix PR772 
llvm-svn: 28161
 2006-05-08 01:35:01 +00:00
Evan Cheng 6732dcd5b3 Typo's 
llvm-svn: 28158
 2006-05-07 10:10:20 +00:00
Jeff Cohen 04196acdcb Unlike Unix, Windows won't let a file be implicitly replaced via renaming without explicit permission. 
llvm-svn: 28157
 2006-05-07 02:51:51 +00:00
Nate Begeman 1333cead5b New rlwimi implementation, which is superior to the old one. There are 
still a couple missed optimizations, but we now generate all the possible
rlwimis for multiple inserts into the same bitfield.  More regression tests
to come.

llvm-svn: 28156
 2006-05-07 00:23:38 +00:00
Chris Lattner cd4a643728 Use ComputeMaskedBits to determine # sign bits as a fallback. This allows us 
to handle all kinds of stuff, including silly things like:
sextinreg(setcc,i16) -> setcc.

llvm-svn: 28155
 2006-05-06 23:48:13 +00:00
Chris Lattner 4f3de3e33c Add some more sign propagation cases 
llvm-svn: 28154
 2006-05-06 23:40:29 +00:00