Commit Graph

9 Commits

Author SHA1 Message Date
Fangrui Song ecd6d7254e [test] llvm/test/: change llvm-objdump single-dash long options to double-dash options
As announced here: http://lists.llvm.org/pipermail/llvm-dev/2019-April/131786.html

Grouped option syntax (POSIX Utility Conventions) does not play well with -long-option
A subsequent change will reject -long-option.
2020-03-15 17:46:23 -07:00
Edward Jones f5177a7db4 [RISCV] Add obsolete aliases of fscsr, frcsr (fssr, frsr)
These old aliases were renamed, but are still used by some projects (eg newlib).

Differential Revision: https://reviews.llvm.org/D68392

llvm-svn: 373618
2019-10-03 15:47:28 +00:00
Sam Elliott d57de491be [RISCV] Support llvm-objdump -M no-aliases and -M numeric
Summary:
Now that llvm-objdump allows target-specific options, we match the
`no-aliases` and `numeric` options for RISC-V, as supported by GNU objdump.

This is done by overriding the variables used for the command-line options, so
that the command-line options are still supported.

This patch updates all tests using `llvm-objdump -riscv-no-aliases` to use
`llvm-objdump -M no-aliases`.

Reviewers: luismarques, asb

Reviewed By: luismarques, asb

Subscribers: pzheng, hiraditya, rbar, johnrusso, simoncook, apazos, sabuasal, niosHD, kito-cheng, shiva0217, jrtc27, MaskRay, zzheng, edward-jones, rogfer01, MartinMosbeck, brucehoult, the_o, rkruppe, PkmX, jocewei, psnobl, benna, Jim, s.egerton, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D66139

llvm-svn: 371534
2019-09-10 16:24:03 +00:00
Alex Bradbury 047170cfc3 [RISCV] Add implied zero offset load/store alias patterns
Allow load/store instructions with implied zero offset for compatibility with
GNU assembler.

Differential Revision: https://reviews.llvm.org/D57141
Patch by James Clarke.

llvm-svn: 354581
2019-02-21 14:09:34 +00:00
Ana Pazos 9d6c55323f [RISCV] Support named operands for CSR instructions.
Reviewers: asb, mgrang

Reviewed By: asb

Subscribers: jocewei, mgorny, jfb, PkmX, MartinMosbeck, brucehoult, the_o, rkruppe, rogfer01, rbar, johnrusso, simoncook, jordy.potman.lists, sabuasal, niosHD, kito-cheng, shiva0217, zzheng, edward-jones

Differential Revision: https://reviews.llvm.org/D46759

llvm-svn: 343822
2018-10-04 21:50:54 +00:00
Alex Bradbury fafdebcfcb [RISCV] Accept fmv.s.x and fmv.x.s as mnemonic aliases for fmv.w.x and fmv.x.w
These instructions were renamed in version 2.2 of the user-level ISA spec, but 
the old name should also be accepted by standard tools.

llvm-svn: 335154
2018-06-20 18:42:25 +00:00
Alex Bradbury 79d2b50ca8 [RISCV] Add InstAlias definitions for fgt.{s|d}, fge.{s|d}
These are produced by GCC and supported by GAS, but not currently contained in 
the pseudoinstruction listing in the RISC-V ISA manual.

llvm-svn: 335127
2018-06-20 14:03:02 +00:00
Alex Bradbury 59136ffab1 [RISCV] Enable emission of alias instructions by default
This patch switches the default for -riscv-no-aliases to false
and updates all affected MC and CodeGen tests. As recommended in
D41071, MC tests use the canonical instructions and the CodeGen
tests use the aliases.

Additionally, for the f and d instructions with rounding mode,
the tests for the aliased versions are moved and tightened such
that they can actually detect if alias emission is enabled.
(see D40902 for context)

Differential Revision: https://reviews.llvm.org/D41225

Patch by Mario Werner.

llvm-svn: 320797
2017-12-15 09:47:01 +00:00
Alex Bradbury fa7e4ec837 [RISCV] Implement floating point assembler pseudo instructions
Adds the assembler aliases for the floating point instructions
which can be mapped to a single canonical instruction. The missing
pseudo instructions (flw, fld, fsw, fsd) are marked as TODO. Other
things, like for example PCREL_LO, have to be implemented first.

This patch builds upon D40902.

Differential Revision: https://reviews.llvm.org/D41071

Patch by Mario Werner.

llvm-svn: 320569
2017-12-13 11:37:19 +00:00