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18 Commits

Author SHA1 Message Date
Asaf Badouh c6f3c82ffc [X86][AVX512] Multiply Packed Unsigned Integers with Round and Scale 
pmulhrsw

review:
http://reviews.llvm.org/D10948

llvm-svn: 241443
 2015-07-06 14:03:40 +00:00
Asaf Badouh 73f26f8ffc [x86][AVX512] add Multiply High Op 
include encoding and intrinsics tests.

review
http://reviews.llvm.org/D10896

llvm-svn: 241406
 2015-07-05 12:23:20 +00:00
Igor Breger a7a8e9a018 AVX-512: Implemented missing encoding and intrinsics for FMA instructions 
Added tests for DAG lowering ,encoding and intrinsics

Differential Revision: http://reviews.llvm.org/D10796

llvm-svn: 240926
 2015-06-29 09:10:00 +00:00
Elena Demikhovsky 5e2f8c4231 AVX-512: Added all forms of VPABS instruction 
Added all intrinsics, tests for encoding, tests for intrinsics.

llvm-svn: 240386
 2015-06-23 08:19:46 +00:00
Elena Demikhovsky 55a997437c AVX-512: added VPSHUFB instruction - all SKX forms 
Added intrinsics and encoding tests.

llvm-svn: 240277
 2015-06-22 13:00:42 +00:00
Elena Demikhovsky e77566112c AVX-512: Added intrinsics for VPERMT2W/D/Q/PS/PD and 
VPERMI2W/D/Q/PS/PD instructions.
Added tests.

llvm-svn: 240256
 2015-06-22 06:45:48 +00:00
Asaf Badouh 81f03c30a5 [AVX512] 
add instructions: VPAVGB and VPAVGW


review
http://reviews.llvm.org/D10504

llvm-svn: 240012
 2015-06-18 12:30:53 +00:00
Asaf Badouh 02d126cb9d [AVX512] add integer min/max intrinsics support. 
review:
http://reviews.llvm.org/D10439

llvm-svn: 239806
 2015-06-16 08:39:27 +00:00
Elena Demikhovsky 3822af0715 AVX-512: Changed CC parameter in "cmp" intrinsic 
from i8 to i32 according to the Intel Spec

by Igor Breger (igor.breger@intel.com)

llvm-svn: 236979
 2015-05-11 09:03:14 +00:00
Elena Demikhovsky 52266388f8 AVX-512: added integer "add" and "sub" instructions with saturation for SKX 
with intrinsics and tests

by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236418
 2015-05-04 12:35:55 +00:00
Elena Demikhovsky 2557a22be7 AVX-512: Added VPACK* instructions forms for KNL and SKX 
and their intrinsics
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 236414
 2015-05-04 09:14:02 +00:00
Elena Demikhovsky 50b88ddb87 AVX-512: Added logical and arithmetic instructions for SKX 
by Asaf Badouh (asaf.badouh@intel.com)

llvm-svn: 235375
 2015-04-21 10:27:40 +00:00
David Blaikie a79ac14fa6 [opaque pointer type] Add textual IR support for explicit type parameter to load instruction 
Essentially the same as the GEP change in r230786.

A similar migration script can be used to update test cases, though a few more
test case improvements/changes were required this time around: (r229269-r229278)

import fileinput
import sys
import re

pat = re.compile(r"((?:=|:|^)\s*load (?:atomic )?(?:volatile )?(.*?))(| addrspace\(\d+\) *)\*($| *(?:%|@|null|undef|blockaddress|getelementptr|addrspacecast|bitcast|inttoptr|\[\[[a-zA-Z]|\{\{).*$)")

for line in sys.stdin:
  sys.stdout.write(re.sub(pat, r"\1, \2\3*\4", line))

Reviewers: rafael, dexonsmith, grosser

Differential Revision: http://reviews.llvm.org/D7649

llvm-svn: 230794
 2015-02-27 21:17:42 +00:00
Craig Topper 29f2e95185 [X86] Use i8 immediate for comparison type on AVX512 packed integer instructions. This matches floating point equivalents. Includes autoupgrade support to convert old code. 
llvm-svn: 227063
 2015-01-25 23:26:02 +00:00
Elena Demikhovsky fcea06acb5 AVX-512: Added FMA instructions, intrinsics an tests for KNL and SKX targets 
by Asaf Badouh

http://reviews.llvm.org/D6456

llvm-svn: 224764
 2014-12-23 10:30:39 +00:00
Robert Khasanov b51bb22611 [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VPCMP/VPCMPU{BWDQ} 
Added CMP_MASK_CC intrinsic type.
Added tests for intrinsics.

Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>

llvm-svn: 219316
 2014-10-08 15:49:26 +00:00
Robert Khasanov 28a7df0b5f [AVX512] Added intrinsics for 128-, 256- and 512-bit versions of VCMPGT{BWDQ}. 
Patch by Sergey Lisitsyn <sergey.lisitsyn@intel.com>

llvm-svn: 218670
 2014-09-30 12:15:52 +00:00
Robert Khasanov 5aa4445bde [AVX512] Added intrinsics for 128- and 256-bit versions of VCMPEQ{BWDQ} 
Fixed lowering of this intrinsics in case when mask is v2i1 and v4i1.
Now cmp intrinsics lower in the following way:
 (i8 (int_x86_avx512_mask_pcmpeq_q_128
             (v2i64 %a), (v2i64 %b), (i8 %mask))) ->
 (i8 (bitcast
   (v8i1 (insert_subvector undef,
           (v2i1 (and (PCMPEQM %a, %b),
                      (extract_subvector
                         (v8i1 (bitcast %mask)), 0))), 0))))

llvm-svn: 218669
 2014-09-30 11:41:54 +00:00