8ea3e9d9a2
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
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Summary of changes:
- Added f16 omod modifier (bug 51386).
- Corrected names of data types (bug 48638).
- Enabled a16 with most GFX10 MIMG opcodes (see https://reviews.llvm.org/D102231 ).
- Corrected description of integer operands (bug 51130).
- Corrected description of 8-bit DS offsets (bug 51536).
- Improved PERMLANE op_sel description.
- Corrected *SAD* opcode types.
2021-08-27 17:23:20 +03:00
3f7985e6ec
[AMDGPU][MC][NFC][DOC] Updated AMD GPU assembler syntax description.
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Summary of changes:
- added description of MTBUF instructions and format modifier;
- described limitations of f16 inline constants when used with integer operands;
- updated description of gfx9+ flat global addressing modes;
- v_accvgpr_write_b32 src0 corrections (gfx908);
- minor bugfixing and improvements.
2020-08-21 14:25:14 +03:00
ddac5c9ba5
[AMDGPU][MC][DOC] Updated AMD GPU assembler description.
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Minor bugfixing and improvements.
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
llvm-svn: 350120
2018-12-28 11:48:23 +00:00
1fa7aaf5a7
[AMDGPU][MC][DOC] A fix for build failure in r349370
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llvm-svn: 349375
2018-12-17 18:53:10 +00:00
47eb63684d
[AMDGPU][MC][DOC] Updated AMD GPU assembler description
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Stage 2: added detailed description of operands
See bug 36572: https://bugs.llvm.org/show_bug.cgi?id=36572
llvm-svn: 349368
2018-12-17 17:38:11 +00:00
Dmitry Preobrazhensky