Commit Graph

342 Commits

Author SHA1 Message Date
Evan Cheng 49e02fc414 Add Cortex-M0 support. It's a ARMv6m device (no ARM mode) with some 32-bit
instructions: dmb, dsb, isb, msr, and mrs.

llvm-svn: 110786
2010-08-11 06:30:38 +00:00
Evan Cheng 6e809de90c - Add subtarget feature -mattr=+db which determine whether an ARM cpu has the
memory and synchronization barrier dmb and dsb instructions.
- Change instruction names to something more sensible (matching name of actual
  instructions).
- Added tests for memory barrier codegen.

llvm-svn: 110785
2010-08-11 06:22:01 +00:00
Evan Cheng 3f251fb26e Re-apply r110655 with fixes. Epilogue must restore sp from fp if the function stack frame has a var-sized object.
Also added a test case to check for the added benefit of this patch: it's optimizing away the unnecessary restore of sp from fp for some non-leaf functions.

llvm-svn: 110707
2010-08-10 19:30:19 +00:00
Daniel Dunbar 0dd47bfca3 Revert r110655, "Fix ARM hasFP() semantics. It should return true whenever FP
register is", it breaks a couple test-suite tests.

llvm-svn: 110701
2010-08-10 18:32:02 +00:00
Evan Cheng 8d5d1c1331 Fix ARM hasFP() semantics. It should return true whenever FP register is
reserved, not available for general allocation. This eliminates all the
extra checks for Darwin.

This change also fixes the use of FP to access frame indices in leaf
functions and cleaned up some confusing code in epilogue emission.

llvm-svn: 110655
2010-08-10 06:26:49 +00:00
Benjamin Kramer 50729ad717 Feed the right output into FileCheck.
llvm-svn: 108523
2010-07-16 10:58:02 +00:00
Dale Johannesen bfd4fd7bb7 The SelectionDAGBuilder's handling of debug info, on rare
occasions, caused code to be generated in a different order.
All cases I've seen involved float softening in the type
legalizer, and this could be perhaps be fixed there, but
it's better not to generate things differently in the first
place.  7797940 (6/29/2010..7/15/2010).

llvm-svn: 108484
2010-07-16 00:02:08 +00:00
Dale Johannesen 4d887f7ca7 Propagate the AlignStack bit in InlineAsm's to the
PrologEpilog code, and use it to determine whether
the asm forces stack alignment or not.  gcc consistently
does not do this for GCC-style asms; Apple gcc inconsistently
sometimes does it for asm blocks.  There is no
convenient place to put a bit in either the SDNode or
the MachineInstr form, so I've added an extra operand
to each; unlovely, but it does allow for expansion for
more bits, should we need it.  PR 5125.  Some
existing testcases are affected.
The operand lists of the SDNode and MachineInstr forms
are indexed with awesome mnemonics, like "2"; I may
fix this someday, but not now.  I'm not making it any
worse.  If anyone is inspired I think you can find all
the right places from this patch.

llvm-svn: 107506
2010-07-02 20:16:09 +00:00
Bob Wilson 8a99b730a9 ARM function alignments were off by a power of two. svn 83242 changed
getFunctionAlignment and the corresponding use of that value in the ARM
asm printer, but now we're using the standard asm printer.  The result of
this was that function alignments were dropped completely for Thumb functions.
Radar 8143571.

llvm-svn: 107435
2010-07-01 22:26:26 +00:00
Benjamin Kramer 3bbc52ce3e Fix some tests that didn't test anything.
llvm-svn: 106954
2010-06-26 20:05:06 +00:00
Evan Cheng f3c01f3ef6 Disable sibcall optimization for Thumb1 for now since Thumb1RegisterInfo::emitEpilogue is not expecting them.
llvm-svn: 106368
2010-06-19 01:01:32 +00:00
Rafael Espindola 29dda21e96 Remove arm_apcscc from the test files. It is the default and doing this
matches what llvm-gcc and clang now produce.

llvm-svn: 106221
2010-06-17 15:18:27 +00:00
Jakob Stoklund Olesen ec2e964fd6 Remove the local register allocator.
Please use the fast allocator instead.

llvm-svn: 106051
2010-06-15 21:58:33 +00:00
Jakob Stoklund Olesen e6e39dc310 Enable a bunch more -regalloc=fast tests
llvm-svn: 103531
2010-05-12 00:11:24 +00:00
Evan Cheng 2fa5a7e7e4 Select @llvm.trap to the special B with 1111 condition (i.e. trap) instruction.
llvm-svn: 103459
2010-05-11 07:26:32 +00:00
Dan Gohman 4fee6f3bdd Start function numbering at 0.
llvm-svn: 101638
2010-04-17 16:29:15 +00:00
Dale Johannesen f118f9788b Split big test into multiple directories to cater to
those who don't build all targets.

llvm-svn: 100688
2010-04-07 20:43:35 +00:00
Evan Cheng 80ad113731 Enable machine cse pass.
llvm-svn: 98132
2010-03-10 03:07:41 +00:00
Bob Wilson 298cdac99c Run the pre-register allocation tail duplication pass by default. Remove
the -pre-regalloc-taildup command-line option, and add a new
-disable-early-taildup option.

llvm-svn: 93597
2010-01-16 00:29:50 +00:00
Jim Grosbach fd850837a3 add testcase for r93564
llvm-svn: 93567
2010-01-15 22:27:37 +00:00
Jakob Stoklund Olesen 78c5919b14 Add test case for the phi reuse patch.
llvm-svn: 91642
2009-12-18 00:11:44 +00:00
Evan Cheng b18525937c More consistent thumb1 asm printing.
llvm-svn: 89328
2009-11-19 06:57:41 +00:00
Evan Cheng a8e8a7c976 Refactor code. Fix a potential missing check. Teach isIdentical() about tLDRpci_pic.
llvm-svn: 86330
2009-11-07 04:04:34 +00:00
Jim Grosbach f5f263f1b4 Enable allocation of R3 in Thumb1
llvm-svn: 84563
2009-10-19 22:57:03 +00:00
Evan Cheng b659dff4eb Forgot about ARM::tPUSH. It also has a new writeback operand.
llvm-svn: 83237
2009-10-02 05:03:07 +00:00
Evan Cheng 6f012d83f2 ARM::tPOP and tPOP_RET each has an extra writeback operand now.
llvm-svn: 83214
2009-10-01 20:54:53 +00:00
Dan Gohman c8054d90fb Eliminate more uses of llvm-as and llvm-dis.
llvm-svn: 81293
2009-09-09 00:09:15 +00:00
Evan Cheng 6da267de23 v4, v5 does not support sxtb / sxth.
llvm-svn: 80322
2009-08-28 00:31:43 +00:00
Evan Cheng 01de985ae6 Fix an obvious copy-n-paste bug.
llvm-svn: 79535
2009-08-20 17:01:04 +00:00
Evan Cheng f59e9f4288 tPOP_RET now has predicate operands.
llvm-svn: 78898
2009-08-13 06:05:07 +00:00
Evan Cheng e5801bd220 It's ok to spill a tGPR register as long as it's still allocated a low register.
llvm-svn: 78893
2009-08-13 05:40:51 +00:00
Evan Cheng 12da273f90 tADDrSPI doesn't have a predicate operand, but tADDhirr and tADDi3 have.
llvm-svn: 77305
2009-07-28 07:38:35 +00:00
Chris Lattner 83423aa276 remove a very large testcase for now.
llvm-svn: 76537
2009-07-21 06:28:36 +00:00
David Greene 40c68ad3bb Re-apply 75490, 75806 and 76177 with fixes and tests. Efficiency comes
next.

llvm-svn: 76486
2009-07-20 22:02:59 +00:00
Evan Cheng 57106d6dc0 Use TII->findCommutedOpIndices to find the commute operands (rather than guessing).
llvm-svn: 76472
2009-07-20 21:16:08 +00:00
Evan Cheng 027d9f93ea Fix some sub-reg coalescing bugs where the coalescer wasn't updating the resulting interval's register class.
llvm-svn: 76458
2009-07-20 19:47:55 +00:00
Evan Cheng 4e4eb0b00c Restore AsmWriterEmitter.cpp back to 74742. The recent changes broke Thumb.
llvm-svn: 76398
2009-07-20 06:10:07 +00:00
Evan Cheng 0794c6a083 Smarter isel of ldrsb / ldrsh. Only make use of these when [r,r] address is feasible.
llvm-svn: 75360
2009-07-11 07:08:13 +00:00
Evan Cheng cd4cdd1157 Major changes to Thumb (not Thumb2). Many 16-bit instructions either modifies CPSR when they are outside the IT blocks, or they can predicated when in Thumb2. Move the implicit def of CPSR to an optional def which defaults CPSR. This allows the 's' bit to be toggled dynamically.
A side-effect of this change is asm printer is now using unified assembly. There are some minor clean ups and fixes as well.

llvm-svn: 75359
2009-07-11 06:43:01 +00:00
Evan Cheng 39d8075edc Add missing tests.
llvm-svn: 74945
2009-07-07 20:38:08 +00:00
Evan Cheng ff1a4a7271 We should run these tests as well.
llvm-svn: 74121
2009-06-24 21:36:26 +00:00
Evan Cheng d76d0aa68a Move thumb and thumb2 tests into separate directories.
llvm-svn: 74068
2009-06-24 06:36:07 +00:00