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Commit Graph

Author	SHA1	Message	Date
Amara Emerson	854d10d10b	[AArch64][GlobalISel] Enable GlobalISel at -O0 by default Tests updated to explicitly use fast-isel at -O0 instead of implicitly. This change also allows an explicit -fast-isel option to override an implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0. Differential Revision: https://reviews.llvm.org/D41362 llvm-svn: 321655	2018-01-02 16:30:47 +00:00
Tim Northover	7a61316e89	AArch64: don't try to emit an add (shifted reg) for SP. The "Add/sub (shifted reg)" instructions use the 31 encoding for xzr and wzr rather than the SP, so we need to use different variants. Situations where this actually comes up are rare enough (see test-case) that I think falling back to DAG is fine. llvm-svn: 305230	2017-06-12 20:49:53 +00:00

Author

SHA1

Message

Date

Amara Emerson

854d10d10b

[AArch64][GlobalISel] Enable GlobalISel at -O0 by default

Tests updated to explicitly use fast-isel at -O0 instead of implicitly.

This change also allows an explicit -fast-isel option to override an
implicitly enabled global-isel. Otherwise -fast-isel would have no effect at -O0.

Differential Revision: https://reviews.llvm.org/D41362

llvm-svn: 321655

2018-01-02 16:30:47 +00:00

Tim Northover

7a61316e89

AArch64: don't try to emit an add (shifted reg) for SP.

The "Add/sub (shifted reg)" instructions use the 31 encoding for xzr and wzr
rather than the SP, so we need to use different variants.

Situations where this actually comes up are rare enough (see test-case) that I
think falling back to DAG is fine.

llvm-svn: 305230

2017-06-12 20:49:53 +00:00

2 Commits