Commit Graph

322159 Commits

Author SHA1 Message Date
Matt Arsenault 85f3890126 AMDGPU: Force s_waitcnt after GWS instructions
This is apparently required to be the immediately following
instruction, so force it into a bundle with a waitcnt.

llvm-svn: 366607
2019-07-19 19:47:30 +00:00
Louis Dionne 4e8c8aa959 [libc++] Mark libcpp_deallocate.sh.cpp as UNSUPPORTED instead of XFAIL on AppleClang 9
Some minor versions of AppleClang 9 appear not to fail the test. It's
such a mess that the only sane thing to do is to mark the test as
UNSUPPORTED.

llvm-svn: 366606
2019-07-19 19:41:40 +00:00
Matt Arsenault c14334e959 LiveIntervals: Fix handleMove asserting on BUNDLE
The top-level BUNDLE instruction should behave as an ordinary
instruction. It is supposed to have all relevant registers as implicit
operands. Moving it should work as any other instruction. I believe
the assert intended to avoid moving instructions inside bundles.

llvm-svn: 366605
2019-07-19 19:32:00 +00:00
Louis Dionne a3c83b7511 Revert "[libc++] Integrate the PSTL into libc++"
This reverts r366593, which caused unforeseen breakage on the build bots.
I'm reverting until the problems have been figured out and fixed.

llvm-svn: 366603
2019-07-19 18:52:46 +00:00
Michael Liao ff9c9e644d [AMDGPU] Add test case on crashing of `si-lower-sgpr-spills` pass
Reviewers: arsenm

Subscribers: qcolombet, kzhuravl, jvesely, wdng, nhaehnle, yaxunl, dstuttard, tpr, t-tye, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64273

llvm-svn: 366602
2019-07-19 18:50:53 +00:00
Louis Dionne 3b1ef58128 [libc++] Allow passing additional CMake arguments in macOS trunk CI script
llvm-svn: 366601
2019-07-19 18:47:00 +00:00
Nick Desaulniers 4e9196ebcb Revert "Use the MachineBasicBlock symbol for a callbr target"
This reverts commit r366523/ccbffefccaff42b0d094c9ef0f49fc3e8c8456ea.

Two regressions were immediately reported:
- https://github.com/ClangBuiltLinux/linux/issues/614
- https://github.com/ClangBuiltLinux/linux/issues/615

Reported-by: nathanchance
llvm-svn: 366600
2019-07-19 18:18:02 +00:00
Matt Morehouse 2272be94f2 [RISCV] Disable tests failing on buildbots.
r366399 enabled a couple tests that are failing on a few buildbots.

llvm-svn: 366599
2019-07-19 18:05:12 +00:00
Stanislav Mekhanoshin 01fcf9238f [AMDGPU] Allow register tuples to set asm names
This change reverts most of the previous register name generation.
The real problem is that RegisterTuple does not generate asm names.
Added optional operand to RegisterTuple. This way we can simplify
register name access and dramatically reduce the size of static
tables for the backend.

Differential Revision: https://reviews.llvm.org/D64967

llvm-svn: 366598
2019-07-19 18:05:01 +00:00
Matt Arsenault 7df225dfc2 AMDGPU/GlobalISel: Fix MMO flags for kernel argument loads
The DAG lowering sets dereferencable and invariant, not nontemporal.

llvm-svn: 366597
2019-07-19 17:52:56 +00:00
Matt Arsenault 318a655369 GlobalISel: Add GINodeEquiv for fcopysign
I don't need this at the moment, but it should be here.

llvm-svn: 366596
2019-07-19 17:32:19 +00:00
Shoaib Meenai b50f10875b [llvm-lipo] Remove trailing whitespace. NFC
llvm-svn: 366595
2019-07-19 17:19:57 +00:00
Louis Dionne a5bd48939c [libc++] Use _EnableIf instead of std::enable_if in deduction guides for map and set
llvm-svn: 366594
2019-07-19 17:13:39 +00:00
Louis Dionne 910323e667 [libc++] Integrate the PSTL into libc++
Summary:
This commit allows specifying LIBCXX_ENABLE_PARALLEL_ALGORITHMS when
configuring libc++ in CMake. When that option is enabled, libc++ will
assume that the PSTL can be found somewhere on the CMake module path,
and it will provide the C++17 parallel algorithms based on the PSTL
(that is assumed to be available).

The commit also adds support for running the PSTL tests as part of
the libc++ test suite.

Reviewers: rodgert, EricWF

Subscribers: mgorny, christof, jkorous, dexonsmith, libcxx-commits, mclow.lists, EricWF

Tags: #libc

Differential Revision: https://reviews.llvm.org/D60480

llvm-svn: 366593
2019-07-19 17:02:42 +00:00
Ben Hamilton 86383e6626 [Format/ObjC] Avoid breaking between unary operators and operands
Summary:
Test Plan:
  New tests added. Ran tests with:
  % ninja FormatTests && ./tools/clang/unittests/Format/FormatTests
  Confirmed tests failed before change and passed after change.

Reviewers: krasimir, djasper, sammccall, klimek

Reviewed By: sammccall

Subscribers: klimek, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64775

llvm-svn: 366592
2019-07-19 16:50:24 +00:00
Matt Arsenault 870f49e690 AMDGPU: Add some function return test cases
llvm-svn: 366591
2019-07-19 16:45:48 +00:00
Raphael Isemann b45853f173 [lldb][NFC] Cleanup mentions and code related to lldb-mi
Summary: lldb-mi has been removed, but there are still a bunch of references in the code base. This patch removes all of them.

Reviewers: JDevlieghere, jfb

Reviewed By: JDevlieghere

Subscribers: dexonsmith, ki.stfu, mgorny, abidh, jfb, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D64992

llvm-svn: 366590
2019-07-19 15:55:23 +00:00
Simon Pilgrim 0054230181 [AMDGPU] Regenerate test file for upcoming patch. NFCI.
llvm-svn: 366589
2019-07-19 15:43:56 +00:00
Serge Guelton 8e46275488 Fix asan infinite loop on undefined symbol
Fix llvm#39641

Recommit of r366413

Differential Revision: https://reviews.llvm.org/D63877

llvm-svn: 366588
2019-07-19 15:20:36 +00:00
Mikhail Maltsev f41e627157 [libunwind][ARM] Fix loading FP registers on big-endian targets
Summary:
The function Unwind-EHABI.cpp:_Unwind_VRS_Pop loads the saved values of
64-bit FP registers as two 32-bit words because they might not be
8-byte aligned. Combining these words into a 64-bit value has to be
done differently on big-endian platforms.

Reviewers: ostannard, john.brawn, dmgreen

Reviewed By: ostannard

Subscribers: kristof.beyls, christof, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D64996

llvm-svn: 366587
2019-07-19 15:20:32 +00:00
Matt Arsenault fd8a3651f7 AMDGPU: Attempt to fix bot error
Manually remove file name from check line, since it somehow ends
up being different on an msvc bot.

llvm-svn: 366586
2019-07-19 14:56:24 +00:00
Matt Arsenault 08494f6231 AMDGPU/GlobalISel: Selection for fminnum/fmaxnum
v2f16 case doesn't work yet because the VOP3P complex patterns haven't
been ported yet.

llvm-svn: 366585
2019-07-19 14:42:40 +00:00
Matt Arsenault b60a2ae40e AMDGPU/GlobalISel: Support arguments with multiple registers
Handles structs used directly in argument lists.

llvm-svn: 366584
2019-07-19 14:29:30 +00:00
Matt Arsenault fecf43eba3 AMDGPU/GlobalISel: Rewrite lowerFormalArguments
This should now handle everything except structs passed as multiple
registers.

I think most of the packing logic should be handled by
handleAssignments, but I'm unclear on what the contract is for
multiple registers. This is copying how x86 handles this.

This does change the behavior of the test_sgpr_alignment0 amdgpu_vs
test. I don't think shader arguments should try to follow the
alignment, and registers need to be repacked. I also don't think it
matters, since I think the pointers are packed to the beginning of the
argument list anyway.

llvm-svn: 366582
2019-07-19 14:15:18 +00:00
Joseph Tremoulet 3fd917d886 Support Linux signal return trampolines in frame initialization
Summary:
Add __kernel_rt_sigreturn to the list of trap handlers for Linux (it's
used as such on aarch64 at least), and __restore_rt as well (used on
x86_64).

Skip decrement-and-recompute for trap handlers in
InitializeNonZerothFrame, as signal dispatch may point the child frame's
return address to the start of the return trampoline.

Parse the 'S' flag for signal handlers from eh_frame augmentation, and
propagate it to the unwind plan.

Reviewers: labath, jankratochvil, compnerd, jfb, jasonmolenda

Reviewed By: jasonmolenda

Subscribers: clayborg, MaskRay, wuzish, nemanjai, kbarton, jrtc27, atanasyan, jsji, javed.absar, kristof.beyls, lldb-commits

Tags: #lldb

Differential Revision: https://reviews.llvm.org/D63667

llvm-svn: 366580
2019-07-19 14:05:55 +00:00
Louis Dionne 9e6a42a185 [libc++] Add missing %link_flags to .sh.cpp test
Without the link flags, the test always fails on Linux. For some reason,
however, it works on Darwin -- which is why it wasn't caught at first.

llvm-svn: 366579
2019-07-19 14:01:48 +00:00
Matt Arsenault 1022c0dfde AMDGPU: Decompose all values to 32-bit pieces for calling conventions
This is the more natural lowering, and presents more opportunities to
reduce 64-bit ops to 32-bit.

This should also help avoid issues graphics shaders have had with
64-bit values, and simplify argument lowering in globalisel.

llvm-svn: 366578
2019-07-19 13:57:44 +00:00
Ilya Biryukov 8bb8915d43 [clangd] Provide a way to publish highlightings in non-racy manner
Summary:
By exposing a callback that can guard code publishing results of
'onMainAST' callback in the same manner we guard diagnostics.

Reviewers: sammccall

Reviewed By: sammccall

Subscribers: javed.absar, MaskRay, jkorous, arphaman, kadircet, hokein, jvikstrom, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64985

llvm-svn: 366577
2019-07-19 13:51:01 +00:00
Nico Weber c35dd05a7c gn build: Set +x on symlink_or_copy.py
llvm-svn: 366576
2019-07-19 13:40:54 +00:00
Kadir Cetinkaya 9dc0160d26 [clangd] Disable background-index on lit-tests by default
Summary:
Since background-index can perform disk writes, we don't want to turn
it on tests that won't clear it.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64990

llvm-svn: 366575
2019-07-19 13:40:30 +00:00
Matt Arsenault 5905aae169 DAG: Handle dbg_value for arguments split into multiple subregs
This was handled previously for arguments split due to not fitting in
an MVT. This was dropping the register for argument registers split
due to TLI::getRegisterTypeForCallingConv.

llvm-svn: 366574
2019-07-19 13:36:46 +00:00
Nico Weber cb2c50028d lld-link: Demangle symbols from archives in diagnostics
Also add test coverage for thin archives (which are the only way I could
come up with to test at least some of the diagnostic changes).

Differential Revision: https://reviews.llvm.org/D64927

llvm-svn: 366573
2019-07-19 13:29:10 +00:00
Than McIntosh b288d90b39 [NFC] include cstdint/string prior to using uint8_t/string
Summary: include proper header prior to use of uint8_t typedef
and std::string.

Subscribers: llvm-commits

Reviewers: cherry

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64937

llvm-svn: 366572
2019-07-19 13:13:54 +00:00
Dmitry Preobrazhensky 4ccb7f8c45 [AMDGPU][MC] Corrected parsing of branch offsets
See bug 40820: https://bugs.llvm.org/show_bug.cgi?id=40820

Reviewers: artem.tamazov, arsenm

Differential Revision: https://reviews.llvm.org/D64629

llvm-svn: 366571
2019-07-19 13:12:47 +00:00
Kai Luo dec624682e [MachineCSE][MachinePRE] Avoid hoisting code from code regions into hot BBs.
Summary:
Current PRE hoists common computations into
CMBB = DT->findNearestCommonDominator(MBB, MBB1).
However, if CMBB is in a hot loop body, we might get performance
degradation.

Differential Revision: https://reviews.llvm.org/D64394

llvm-svn: 366570
2019-07-19 12:58:16 +00:00
Than McIntosh e238a4c757 [X86] for split stack, not save/restore nested arg if unused
Summary:
For split-stack, if the nested argument (i.e. R10) is not used, no need to save/restore it in the prologue.

Reviewers: thanm

Reviewed By: thanm

Subscribers: mstorsjo, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64673

llvm-svn: 366569
2019-07-19 12:54:44 +00:00
Shaurya Gupta 20a0e7caaf [Clangd] Fixed ExtractVariable test
llvm-svn: 366568
2019-07-19 12:11:04 +00:00
Louis Dionne e068c7463f [libc++] Fix link error with _LIBCPP_HIDE_FROM_ABI_PER_TU and std::string
Summary:
This is effectively a revert of r344616, which was a partial fix for
PR38964 (compilation of <string> with GCC in C++03 mode). However, that
configuration is explicitly not supported anymore and that partial fix
breaks compilation with Clang when per-TU insulation is provided.

PR42676
rdar://52899715

Reviewers: mclow.lists, EricWF

Subscribers: christof, jkorous, dexonsmith, libcxx-commits

Tags: #libc

Differential Revision: https://reviews.llvm.org/D64941

llvm-svn: 366567
2019-07-19 11:52:55 +00:00
Shaurya Gupta 06841eab00 [Clangd] Fixed SelectionTree bug for macros
Summary:
Fixed SelectionTree bug for macros
- Fixed SelectionTree claimRange for macros and template instantiations
- Fixed SelectionTree unit tests
- Changed a breaking test in TweakTests

Reviewers: sammccall, kadircet

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64329

llvm-svn: 366566
2019-07-19 11:41:02 +00:00
Roman Lebedev 9998585c47 [NFC][InstCombine] Tests for 'rem' formation from sub-of-mul-by-'div' (PR42673)
https://rise4fun.com/Alive/8Rp
https://bugs.llvm.org/show_bug.cgi?id=42673

llvm-svn: 366565
2019-07-19 11:29:18 +00:00
Roman Lebedev 882bf2a844 [NFC][InstCombine] Redundant masking before left-shift: tests with assume
If the legality check is `(shiftNbits-maskNbits) s>= 0`,
then we can simplify it to `shiftNbits u>= maskNbits`,
which is easier to check for.

However, currently switching the `dropRedundantMaskingOfLeftShiftInput()`
to `SimplifyICmpInst()` does not catch these cases and regresses
currently-handled cases, so i'll leave it as is for now.

https://rise4fun.com/Alive/25P

llvm-svn: 366564
2019-07-19 11:29:04 +00:00
Simon Pilgrim 2e435ef3ed Fix MSVC "result of 32-bit shift implicitly converted to 64 bits" warning. NFCI.
llvm-svn: 366563
2019-07-19 11:18:46 +00:00
Oliver Stannard 8780c0dda2 Don't update NoTrappingFPMath and FPDenormalMode in resetTargetOptions
We'd like to remove this whole function, because these are properties of
functions, not the target as a whole. These two are easy to remove
because they are only used for emitting ARM build attributes, which
expects them to represent the defaults for the whole module, not just
the last function generated.

This is needed to get correct build attributes when using IPRA on ARM,
because IPRA causes resetTargetOptions to get called before
ARMAsmPrinter::emitAttributes.

Differential revision: https://reviews.llvm.org/D64929

llvm-svn: 366562
2019-07-19 10:37:37 +00:00
Raphael Isemann cf2aca0aae [lldb][NFC] Tablegenify target
llvm-svn: 366561
2019-07-19 10:23:22 +00:00
Stefan Granitz f44d7c3f9f [NFC] Remove indent after r366433
llvm-svn: 366560
2019-07-19 10:20:35 +00:00
Kadir Cetinkaya 91e5f4b46b Revert "Revert r366458, r366467 and r366468"
This reverts commit 9c377105da.

[clangd][BackgroundIndexLoader] Directly store DependentTU while loading shard

Summary:
We were deferring the population of DependentTU field in LoadedShard
until BackgroundIndexLoader was consumed. This actually triggers a use after
free since the shards FileToTU was pointing at could've been moved while
consuming the Loader.

Reviewers: sammccall

Subscribers: ilya-biryukov, MaskRay, jkorous, arphaman, cfe-commits

Tags: #clang

Differential Revision: https://reviews.llvm.org/D64980

llvm-svn: 366559
2019-07-19 10:18:52 +00:00
George Rimar ce2ef288b2 [llvm-readelf] - A fix for: "--hash-symbols asserts for 64-bit ELFs"
Fixes https://bugs.llvm.org/show_bug.cgi?id=42622.
(--hash-symbols switch is currently broken for 64-bit ELF files, due to r352630.)

Differential revision: https://reviews.llvm.org/D64788

llvm-svn: 366558
2019-07-19 10:15:03 +00:00
Oliver Stannard 0ed7732671 [IPRA] Don't rely on non-exact function definitions
If a function definition is not exact, then the linker could select a
differently-compiled version of it, which could use different registers.

https://reviews.llvm.org/D64909

llvm-svn: 366557
2019-07-19 09:59:26 +00:00
Mikhail Maltsev 0b001f94a5 [ARM] Add <saturate> operand to SQRSHRL and UQRSHLL
Summary:
According to the new Armv8-M specification
https://static.docs.arm.com/ddi0553/bh/DDI0553B_h_armv8m_arm.pdf the
instructions SQRSHRL and UQRSHLL now have an additional immediate
operand <saturate>. The new assembly syntax is:

SQRSHRL<c> RdaLo, RdaHi, #<saturate>, Rm
UQRSHLL<c> RdaLo, RdaHi, #<saturate>, Rm

where <saturate> can be either 64 (the existing behavior) or 48, in
that case the result is saturated to 48 bits.

The new operand is encoded as follows:
  #64 Encoded as sat = 0
  #48 Encoded as sat = 1
sat is bit 7 of the instruction bit pattern.

This patch adds a new assembler operand class MveSaturateOperand which
implements parsing and encoding. Decoding is implemented in
DecodeMVEOverlappingLongShift.

Reviewers: ostannard, simon_tatham, t.p.northover, samparker, dmgreen, SjoerdMeijer

Reviewed By: simon_tatham

Subscribers: javed.absar, kristof.beyls, hiraditya, pbarrio, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D64810

llvm-svn: 366555
2019-07-19 09:46:28 +00:00
Azharuddin Mohammed 9c377105da Revert r366458, r366467 and r366468
r366458 is causing test failures. r366467 and r366468 had to be reverted as
they were casuing conflict while reverting r366458.

r366468 [clangd] Remove dead code from BackgroundIndex
r366467 [clangd] BackgroundIndex stores shards to the closest project
r366458 [clangd] Refactor background-index shard loading

llvm-svn: 366551
2019-07-19 09:26:33 +00:00