8a5a324dac
Add some comments, simplify some code, and fix a bug that caused rewriting
...
to rewrite with the wrong value.
llvm-svn: 26311
2006-02-22 06:37:14 +00:00
9e252e3bcf
Added MMX, SSE1, and SSE2 vector instructions and some simple patterns.
...
Fixed some existing bugs (wrong predicates, prefixes) at the same time.
llvm-svn: 26310
2006-02-22 02:26:30 +00:00
7ad77dfc2a
split register class handling from explicit physreg handling.
...
llvm-svn: 26308
2006-02-22 00:56:39 +00:00
5c79f98f15
Adjust to changes in getRegForInlineAsmConstraint prototype
...
llvm-svn: 26306
2006-02-21 23:12:12 +00:00
7bb4696dc3
Updates to match change of getRegForInlineAsmConstraint prototype
...
llvm-svn: 26305
2006-02-21 23:11:00 +00:00
d58478161f
One more round of reorg so sabre doesn't freak out. :-)
...
llvm-svn: 26303
2006-02-21 20:00:20 +00:00
6fc1162855
A big more cleaning up.
...
llvm-svn: 26302
2006-02-21 19:30:30 +00:00
8711b6bff3
Moving things to their proper places.
...
llvm-svn: 26301
2006-02-21 19:26:52 +00:00
6e595b9fd8
Split instruction info into multiple files, one for each of x87, MMX, and SSE.
...
llvm-svn: 26300
2006-02-21 19:13:53 +00:00
0a08f44704
missed optzn
...
llvm-svn: 26299
2006-02-21 18:29:44 +00:00
747cf60696
The HasNoV9 hack isn't needed here, now that tblgen knows that CustomDAGSchedInserter
...
instructions are expensive.
llvm-svn: 26298
2006-02-21 18:04:32 +00:00
d57203c0a1
Added separate alias instructions for SSE logical ops that operate on non-packed types.
...
llvm-svn: 26297
2006-02-21 02:24:38 +00:00
afffe63fc1
Added MMX and XMM packed integer move instructions, movd and movq.
...
llvm-svn: 26296
2006-02-21 01:39:57 +00:00
fa57a0add9
Added SSE2 128-bit integer packed types: V16I8, V8I16, V4I32, and V2I64.
...
Added generic vector types: VR64 and VR128.
llvm-svn: 26295
2006-02-21 01:38:21 +00:00
43070b7541
Added x86 integer vector types: 64-bit packed byte integer (v16i8), 64-bit
...
packed word integer (v8i16), and 64-bit packed doubleword integer (v2i32).
llvm-svn: 26294
2006-02-20 22:34:53 +00:00
4547400ae2
Some updates
...
llvm-svn: 26292
2006-02-20 19:58:27 +00:00
301f45cf6f
Fix a problem Nate and Duraid reported where simplifying nodes can cause
...
them to get ressurected, in which case, deleting the undead nodes is
unfriendly.
llvm-svn: 26291
2006-02-20 06:51:04 +00:00
486d1bc5ed
Fix a problem on itanium with memset. The value to set has been promoted to
...
i64 before this code, so zero_ext doesn't work.
llvm-svn: 26290
2006-02-20 06:38:35 +00:00
c2e3a7a4ce
improved support for branch folding, still not enabled.
...
llvm-svn: 26289
2006-02-18 07:57:38 +00:00
d13778eb30
If SSE3 is available, promote FP_TO_UINT i32 to FP_TO_SINT i64 to take
...
advantage of fisttpll.
llvm-svn: 26288
2006-02-18 07:26:17 +00:00
0add83e969
Fix bugs identified by VC++.
...
llvm-svn: 26287
2006-02-18 03:20:33 +00:00
983ca89714
Add a fold for add that exchanges it with a constant shift if possible, so
...
that the shift may be more easily folded into other operations.
llvm-svn: 26286
2006-02-18 02:43:25 +00:00
19fa8ac938
Implement deletion of dead blocks, currently disabled.
...
llvm-svn: 26285
2006-02-18 02:42:34 +00:00
abac61603f
Add checks to make sure we don't create bogus extend nodes, and fix a bug
...
where we were doing exactly that which was causing failures on x86 and
alpha.
llvm-svn: 26284
2006-02-18 02:40:58 +00:00
70af620709
Added fisttp for fp to int conversion.
...
llvm-svn: 26283
2006-02-18 02:36:28 +00:00
06c2e6d1b3
Disable PIC for JIT.
...
llvm-svn: 26281
2006-02-18 01:49:25 +00:00
cb853de534
a previous patch completely disabled trivial unswitching, this fixees it.
...
Thanks to nate for pointing this out :)
llvm-svn: 26280
2006-02-18 01:32:04 +00:00
29f771ba21
initial trivial support for folding branches that have now-constant destinations.
...
llvm-svn: 26279
2006-02-18 01:27:45 +00:00
5caed8a231
Jit does not support PIC yet.
...
llvm-svn: 26278
2006-02-18 00:57:10 +00:00
8e44ff50b0
When unswitching a loop, make sure to update loop info with exit blocks in
...
the right loop.
llvm-svn: 26277
2006-02-18 00:55:32 +00:00
d95665188b
Fix Transforms/SimplifyCFG/2006-02-17-InfiniteUnroll.ll
...
llvm-svn: 26275
2006-02-18 00:33:17 +00:00
5588de9415
x86 / Darwin PIC support.
...
llvm-svn: 26273
2006-02-18 00:15:05 +00:00
5f99760ae7
Moved PICEnabled to include/llvm/Target/TargetOptions.h
...
llvm-svn: 26272
2006-02-18 00:08:58 +00:00
375e1a71cc
Fix a tricky issue in the SimplifyDemandedBits code where CombineTo wasn't
...
exactly the API we wanted to call into. This fixes the crash on crafty last
night.
llvm-svn: 26269
2006-02-17 21:58:01 +00:00
fb5dbadf15
Clean up DemandedBitsAreZero interface
...
Make more use of the new mask helpers in valuetypes.h
Combine (sra (srl x, c1), c1) -> sext_inreg if legal
llvm-svn: 26263
2006-02-17 19:54:08 +00:00
57b3567552
Don't expand sdiv by power of two before legalize, since it will likely
...
generate illegal nodes.
llvm-svn: 26261
2006-02-17 07:26:20 +00:00
07a2677e43
unbreak the build
...
llvm-svn: 26260
2006-02-17 07:09:27 +00:00
593bea73ba
Unbreak x86 be
...
llvm-svn: 26259
2006-02-17 07:01:52 +00:00
baddba41c7
Fix loops where the header has an exit, fixing a loop-unswitch crash on crafty
...
llvm-svn: 26258
2006-02-17 06:39:56 +00:00
5965bd19f8
kill ADD_PARTS & SUB_PARTS and replace them with fancy new ADDC, ADDE, SUBC
...
and SUBE nodes that actually expose what's going on and allow for
significant simplifications in the targets.
llvm-svn: 26255
2006-02-17 05:43:56 +00:00
9ec392b2aa
Fix another miscompilation exposed by lencode, where we lowered i64->f32
...
conversions to __floatdidf instead of __floatdisf on targets that support
f32 but not i64 (e.g. sparc).
llvm-svn: 26254
2006-02-17 04:32:33 +00:00
67c21b6c46
add note about div by power of 2
...
llvm-svn: 26253
2006-02-17 04:20:13 +00:00
0d62ebd13f
Fix bug noticed by VC++.
...
llvm-svn: 26252
2006-02-17 02:12:18 +00:00
3920ce4d8d
Whoops, didn't mean to check this in yet.
...
llvm-svn: 26250
2006-02-17 00:56:19 +00:00
4a0dc0c8f6
Add a missing and useful pat frag
...
llvm-svn: 26249
2006-02-17 00:51:06 +00:00
6fd136239b
start of some new simplification code, not thoroughly tested, use at your own
...
risk :)
llvm-svn: 26248
2006-02-17 00:31:07 +00:00
b590d3a72b
Remind ourselves to revisit the "pxor vs. xorps/xorpd to clear XMM registers"
...
issue. Need to do more experiments.
llvm-svn: 26247
2006-02-17 00:04:28 +00:00
7e5496d5fe
Kill the x86 pattern isel. boom.
...
llvm-svn: 26246
2006-02-17 00:03:04 +00:00
db1dbbe8d6
Remove the entry about using movapd for SSE reg-reg moves.
...
llvm-svn: 26245
2006-02-17 00:00:58 +00:00
eb7b3380fd
pxor (for FLD0SS) encoding was missing the OpSize prefix.
...
llvm-svn: 26244
2006-02-16 23:59:30 +00:00
936cc9fe53
Remove the skeleton target, it doesn't produce useful code and there are
...
other small targets that do that can be learned from. They also have
the added advantage of being tested :)
llvm-svn: 26243
2006-02-16 23:14:50 +00:00
c3dcf5a4d7
Dumb bug. Code sees a memcpy from X+c so it increments src offset. But it
...
turns out not to point to a constant string but it forgot change the offset
back.
llvm-svn: 26242
2006-02-16 23:11:42 +00:00
24c461b51e
1. Use pxor instead of xoraps / xorapd to clear FR32 / FR64 registers. This
...
proves to be worth 20% on Ptrdist/ks. Might be related to dependency
breaking support.
2. Added FsMOVAPSrr and FsMOVAPDrr as aliases to MOVAPSrr and MOVAPDrr. These
are used for FR32 / FR64 reg-to-reg copies.
3. Tell reg-allocator to generate MOVSSrm / MOVSDrm and MOVSSmr / MOVSDmr to
spill / restore FsMOVAPSrr and FsMOVAPDrr.
llvm-svn: 26241
2006-02-16 22:45:17 +00:00
3f99628939
Use movaps / movapd to spill / restore V4F4 / V2F8 registers.
...
llvm-svn: 26240
2006-02-16 21:20:26 +00:00
8a77efe4f7
Rework the SelectionDAG-based implementations of SimplifyDemandedBits
...
and ComputeMaskedBits to match the new improved versions in instcombine.
Tested against all of multisource/benchmarks on ppc.
llvm-svn: 26238
2006-02-16 21:11:51 +00:00
fa335f6083
Change SplitBlock to increment a BasicBlock::iterator, not an Instruction*. Apparently they do different things :)
...
This fixes a testcase that nate reduced from spass.
Also included are a couple minor code changes that don't affect the generated
code at all.
llvm-svn: 26235
2006-02-16 19:36:22 +00:00
01afec2adb
MOVAPSrr and MOVAPDrr instruction format should be MRMSrcReg.
...
llvm-svn: 26234
2006-02-16 19:34:41 +00:00
36a2ee299e
distinguish between objects and register names, now we can have stuff
...
with names like "f84", "in6" etc etc.
this should fix one or two tests
llvm-svn: 26232
2006-02-16 13:12:57 +00:00
42c01c8d39
If the false case is the current basic block, then this is a self loop.
...
We do not want to emit "Loop: ... brcond Out; br Loop", as it adds an extra
instruction in the loop. Instead, invert the condition and emit
"Loop: ... br!cond Loop; br Out.
Generalize the fix by moving it from PPCDAGToDAGISel to SelectionDAGLowering.
llvm-svn: 26231
2006-02-16 08:27:56 +00:00
471627c49d
Lowering of sdiv X, pow2 was broken, this fixes it. This patch is written
...
by Nate, I'm just committing it for him.
llvm-svn: 26230
2006-02-16 08:02:36 +00:00
55f63f1b53
Fix VC++ warning.
...
llvm-svn: 26228
2006-02-16 04:07:37 +00:00
ae82498e81
Use movaps / movapd (instead of movss / movsd) to do FR32 / FR64 reg to reg
...
transfer.
According to the Intel P4 Optimization Manual:
Moves that write a portion of a register can introduce unwanted
dependences. The movsd reg, reg instruction writes only the bottom
64 bits of a register, not to all 128 bits. This introduces a dependence on
the preceding instruction that produces the upper 64 bits (even if those
bits are not longer wanted). The dependence inhibits register renaming,
and thereby reduces parallelism.
Not to mention movaps is shorter than movss.
llvm-svn: 26226
2006-02-16 01:50:02 +00:00
ff42e81028
fix a bug where we unswitched the wrong way
...
llvm-svn: 26225
2006-02-16 01:24:41 +00:00
03c1e6f48e
A bit more memset / memcpy optimization.
...
Turns them into calls to memset / memcpy if 1) buffer(s) are not DWORD aligned,
2) size is not known to be greater or equal to some minimum value (currently 128).
llvm-svn: 26224
2006-02-16 00:21:07 +00:00
fdff0bb43e
Implement trivial unswitching for switch stmts. This allows us to trivial
...
unswitch this loop on 2 before sweating to unswitch on 1/3.
void test4(int N, int i, int C, int*P, int*Q) {
int j;
for (j = 0; j < N; ++j) {
switch (C) { // general unswitching.
default: P[i+j] = 0; break;
case 1: Q[i+j] = 0; break;
case 3: P[i+j] = Q[i+j]; break;
case 2: break; // TRIVIAL UNSWITCH on C==2
}
}
}
llvm-svn: 26223
2006-02-15 22:52:05 +00:00
76a7775ce1
Remove an entry.
...
llvm-svn: 26222
2006-02-15 22:14:34 +00:00
93e4865d4b
Remove an unused function parameter.
...
llvm-svn: 26221
2006-02-15 22:12:35 +00:00
e5cb76d744
make "trivial" unswitching significantly more general. It can now handle
...
this for example:
for (j = 0; j < N; ++j) { // trivial unswitch
if (C)
P[i+j] = 0;
}
turning it into the obvious code without bothering to duplicate an empty loop.
llvm-svn: 26220
2006-02-15 22:03:36 +00:00
6781b6e62e
Turn a memcpy from string constant into a series of stores of constant values.
...
llvm-svn: 26219
2006-02-15 21:59:04 +00:00
47da60130a
fix a bunch of alpha regressions. see bug 709
...
llvm-svn: 26218
2006-02-15 21:13:37 +00:00
6afb5587da
new test
...
llvm-svn: 26217
2006-02-15 19:52:06 +00:00
2eea436192
Should not combine ISD::LOCATIONs until we have scheme to remove from
...
MachineDebugInfo tables.
llvm-svn: 26216
2006-02-15 19:34:44 +00:00
65152d80ec
Checking the wrong value. This caused us to emit silly code like
...
Y = seteq bool X, true
instead of just using X :)
llvm-svn: 26215
2006-02-15 19:05:52 +00:00
f20e61f003
Convert this over to work with the new makefiles
...
llvm-svn: 26206
2006-02-15 07:22:58 +00:00
6db414e8de
Sparc actually *DOES* have a directive for emitting zeros. In fact, it requires
...
it, because this:
.bss
X:
.byte 0
results in the assembler warning: "initialization in bss segment". Annoying.
llvm-svn: 26204
2006-02-15 07:07:14 +00:00
7edc87279c
random lexer change to test the makefile updating stuff
...
llvm-svn: 26203
2006-02-15 07:02:59 +00:00
a9d0b5800a
Fix SingleSource/Regression/C/2004-08-12-InlinerAndAllocas.c on Sparc.
...
The ABI specifies that there is a register save area at the bottom of the
stack, which means the actual used pointer needs to be an offset from
the subtracted value.
llvm-svn: 26202
2006-02-15 06:41:34 +00:00
7a6c21ac26
Remove an entry.
...
llvm-svn: 26197
2006-02-15 01:56:48 +00:00
2d23c9f1ab
Use .zerofill on x86/darwin.
...
llvm-svn: 26196
2006-02-15 01:56:23 +00:00
e2038bdeee
Lower memcpy with small constant size operand into a series of load / store
...
ops.
llvm-svn: 26195
2006-02-15 01:54:51 +00:00
01db04efb0
more refactoring, no functionality change.
...
llvm-svn: 26194
2006-02-15 01:44:42 +00:00
aacc4c3b4c
cvtsd2ss / cvtss2sd encoding bug.
...
llvm-svn: 26193
2006-02-15 00:31:03 +00:00
665c26ab40
movaps, movapd encoding bug.
...
llvm-svn: 26192
2006-02-15 00:11:37 +00:00
b0cbe7106e
pull some code out into a function
...
llvm-svn: 26191
2006-02-15 00:07:43 +00:00
9c5693fb2a
Canonicalize inner loops before outer loops. Inner loop canonicalization
...
can provide work for the outer loop to canonicalize.
This fixes a case that breaks unswitching.
llvm-svn: 26189
2006-02-14 23:06:02 +00:00
0451499b3c
Doh again!
...
llvm-svn: 26188
2006-02-14 23:05:54 +00:00
cffbbee8d1
When splitting exit edges to canonicalize loops, make sure to put the new
...
block in the appropriate loop nest.
Third time is the charm, right?
llvm-svn: 26187
2006-02-14 22:34:08 +00:00
e3c793a71a
new note
...
llvm-svn: 26186
2006-02-14 22:19:54 +00:00
b134520b86
If we have zero initialized data with external linkage, use .zerofill to
...
emit it (instead of .space), saving a bit of space in the .o file.
For example:
int foo[100];
int bar[100] = {};
when compiled with C++ or -fno-common results in shrinkage from 1160 to 360
bytes of space. The X86 backend can also do this on darwin.
llvm-svn: 26185
2006-02-14 22:18:23 +00:00
ebb50a61d2
Using wrong DW_FORM.
...
llvm-svn: 26184
2006-02-14 22:01:57 +00:00
f84774ed46
Don't special case XS, XD prefixes.
...
llvm-svn: 26183
2006-02-14 21:52:51 +00:00
fb7b5ef74b
Bug fix: XS, XD prefixes were being emitted twice.
...
XMM registers were not being handled.
llvm-svn: 26182
2006-02-14 21:45:24 +00:00
84fb09eba4
Make sure that weak functions are aligned properly
...
llvm-svn: 26181
2006-02-14 20:42:33 +00:00
43b72f4421
Duh
...
llvm-svn: 26180
2006-02-14 20:37:37 +00:00
ad8c20cd2b
Remove -disable-x86-sse
...
llvm-svn: 26179
2006-02-14 20:30:14 +00:00
94f936d8ef
add an assert
...
llvm-svn: 26178
2006-02-14 20:14:17 +00:00
db2a7a736a
Keep to < 80 cols
...
llvm-svn: 26177
2006-02-14 20:12:38 +00:00
038521ef76
Missed a break so memcpy cases fell through to memset. Doh.
...
llvm-svn: 26176
2006-02-14 19:45:56 +00:00
d502610604
Fixed a build breakage.
...
llvm-svn: 26175
2006-02-14 09:11:59 +00:00
4b40a42653
Rename maxStoresPerMemSet to maxStoresPerMemset, etc.
...
llvm-svn: 26174
2006-02-14 08:38:30 +00:00
f976d79f78
Add a entry.
...
llvm-svn: 26173
2006-02-14 08:25:32 +00:00
6a37456d73
Set maxStoresPerMemSet to 16. Ditto for maxStoresPerMemCpy and
...
maxStoresPerMemMove. Although the last one is not used.
llvm-svn: 26172
2006-02-14 08:25:08 +00:00
81fcea8aa2
Expand memset dst, c, size to a series of stores if size falls below the
...
target specific theshold, e.g. 16 for x86.
llvm-svn: 26171
2006-02-14 08:22:34 +00:00
40b6eb9973
Enable SSE (for the right subtargets)
...
llvm-svn: 26169
2006-02-14 08:07:58 +00:00
1784a9d267
now that libcalls don't suck, we can remove this hack
...
llvm-svn: 26164
2006-02-14 05:39:35 +00:00
0242688ad8
adjust to new style of handling lexer changes
...
llvm-svn: 26162
2006-02-14 05:14:46 +00:00
0b8ec1a132
Use statistics to keep track of what flavors of loops we are unswitching
...
llvm-svn: 26157
2006-02-14 01:01:41 +00:00
8e2ee7358f
Fix a latent bug in the call sequence handling stuff. Some targets (e.g. x86)
...
create these nodes with flag results. Remember that we legalized them.
llvm-svn: 26156
2006-02-14 00:55:02 +00:00
8b10ab3002
Implement Instcombine/and.ll:test34
...
llvm-svn: 26155
2006-02-13 23:07:23 +00:00
7d8522884b
If any of the sign extended bits are demanded, the input sign bit is demanded
...
for a sign extension.
This fixes InstCombine/2006-02-13-DemandedMiscompile.ll and Ptrdist/bc.
llvm-svn: 26152
2006-02-13 22:41:07 +00:00
d2d174dd0e
Another hack due to allowing multiple symbols with the same name.
...
llvm-svn: 26150
2006-02-13 22:22:42 +00:00
eea0f0198e
Another work around for the 'symbols with different types can have the same
...
name' issue.
llvm-svn: 26149
2006-02-13 21:43:26 +00:00
a438ef0ee7
improved zap discovery
...
llvm-svn: 26148
2006-02-13 18:52:29 +00:00
390c63e9d9
Rename to better reflect usage (current and planned.)
...
llvm-svn: 26145
2006-02-13 12:50:39 +00:00
462505fc5f
Completely rewrite libcall insertion by the legalizer, providing the
...
following handy-dandy properties:
1. it is always correct now
2. it is much faster than before
3. it is easier to understand
This implementation builds off of the recent simplifications of the
legalizer that made it single-pass instead of iterative.
This fixes JM/lencod, JM/ldecod, and
CodeGen/Generic/2006-02-12-InsertLibcall.ll (at least on PPC).
llvm-svn: 26144
2006-02-13 09:18:02 +00:00
62c3484e43
Switch targets over to using SelectionDAG::getCALLSEQ_START to create
...
CALLSEQ_START nodes.
llvm-svn: 26143
2006-02-13 09:00:43 +00:00
3a0ad47b39
Switch to using getCALLSEQ_START instead of using our own creation calls
...
llvm-svn: 26142
2006-02-13 08:55:29 +00:00
68e7475777
Be careful not to request or look at bits shifted in from outside the size
...
of the input. This fixes the mediabench/gsm/toast failure last night.
llvm-svn: 26138
2006-02-13 06:09:08 +00:00
bc3ec1d37b
Add missing patterns for andi. and andis., fixing test/Regression/CodeGen/
...
PowerPC/and-imm.ll
llvm-svn: 26136
2006-02-12 09:09:52 +00:00
f5b4ef7f58
remove some more dead special case code
...
llvm-svn: 26135
2006-02-12 08:07:37 +00:00
5b2edb1fca
Eliminate special case hacks that are superceded by general purpose hacks
...
llvm-svn: 26134
2006-02-12 08:02:11 +00:00
ee0f280743
Three changes:
...
1. Teach GetConstantInType to handle boolean constants.
2. Teach instcombine to fold (compare X, CST) when X has known 0/1 bits.
Testcase here: set.ll:test22
3. Improve the "(X >> c1) & C2 == 0" folding code to allow a noop cast
between the shift and and. More aggressive bitfolding for other reasons
was turning signed shr's into unsigned shr's, leaving the noop cast in
the way.
llvm-svn: 26131
2006-02-12 02:07:56 +00:00
02f53ad3a2
Revert my last patch. It too breaks stuff
...
llvm-svn: 26128
2006-02-12 01:59:10 +00:00
35248e06bc
Fix for my previously reverted patch
...
llvm-svn: 26126
2006-02-11 21:24:54 +00:00
0157e7f55b
Port the recent innovations in ComputeMaskedBits to SimplifyDemandedBits.
...
This allows us to simplify on conditions where bits are not known, but they
are not demanded either! This also fixes a couple of bugs in
ComputeMaskedBits that were exposed during this work.
In the future, swaths of instcombine should be removed, as this code
subsumes a bunch of ad-hockery.
llvm-svn: 26122
2006-02-11 09:31:47 +00:00
b24ce3a2a8
revert my previous change, it exposed other problems.
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llvm-svn: 26121
2006-02-11 08:47:47 +00:00
4698e4f5fe
fix storing booleans (grawp missed this one)
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llvm-svn: 26120
2006-02-11 07:33:17 +00:00
0010a92375
now short immediates will get matched (previously constants were all
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triggering movl 64bit imm fat instructions)
llvm-svn: 26119
2006-02-11 07:32:15 +00:00
05bf90dddf
Make this check stricter. Disallow loop exit blocks from being shared by
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loops and their subloops.
llvm-svn: 26118
2006-02-11 02:13:17 +00:00
a86ba85dc5
Prevent certain nodes that have already been selected from being folded into
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X86 addressing mode. Currently we do not allow any node whose target node
produces a chain as well as any node that is at the root of the addressing
mode expression tree.
llvm-svn: 26117
2006-02-11 02:05:36 +00:00
a6ae101afa
remove dead expr
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llvm-svn: 26116
2006-02-11 01:43:37 +00:00
5995d0160c
Reorg for integration with gcc4. Old style debug info will not be passed though
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to SelIDAG.
llvm-svn: 26115
2006-02-11 01:01:30 +00:00
fbadd7e1ee
implement unswitching of loops with switch stmts and selects in them
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llvm-svn: 26114
2006-02-11 00:43:37 +00:00
f1b151684d
Update PHI nodes in successors of exit blocks.
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llvm-svn: 26113
2006-02-10 23:26:14 +00:00
fe4151efe7
Reform the unswitching code in terms of edge splitting, not block splitting.
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llvm-svn: 26112
2006-02-10 23:16:39 +00:00
2b6f78b664
Nicer code. :-)
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llvm-svn: 26111
2006-02-10 22:46:26 +00:00
d49cc3634e
Added X86 isel debugging stuff.
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llvm-svn: 26110
2006-02-10 22:24:32 +00:00
ec6b40a093
Fix a case where UnswitchTrivialCondition broke critical edges with
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phi's in the successors
llvm-svn: 26108
2006-02-10 19:08:15 +00:00
fcb8a3aa76
Use the auto-generated call matcher. Remove a broken impl of the frameaddr/returnaddr
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intrinsics.
Autogen frameindex matcher
llvm-svn: 26107
2006-02-10 07:35:42 +00:00
0c4dea4cb2
Update to new-style flags usage, simplifying the .td file
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llvm-svn: 26106
2006-02-10 06:58:25 +00:00
907be3e24c
Remove a completed entry; add a new entry about fisttp op
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llvm-svn: 26105
2006-02-10 05:48:15 +00:00
6e263155a6
add some notes, move some code around. Implement unswitching of loops
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with branches on partially invariant computations.
llvm-svn: 26104
2006-02-10 02:30:37 +00:00
4935417a84
Move code around to be more logical, no functionality change.
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llvm-svn: 26103
2006-02-10 02:01:22 +00:00
3fc3148b85
When unswitching a trivial loop, do admit we are doing it! :)
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llvm-svn: 26102
2006-02-10 01:36:35 +00:00
ed7a67b0de
Implement unconditional unswitching of 'trivial' loops, those loops that contain
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branches in their entry block that control whether or not the loop is a noop or not.
llvm-svn: 26101
2006-02-10 01:24:09 +00:00
4f0e66df6a
Simplify control flow a bit, note that unswitch preserves canonical loop form
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llvm-svn: 26098
2006-02-09 22:15:42 +00:00
101e4b916a
Match tblgen change.
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llvm-svn: 26096
2006-02-09 22:12:53 +00:00
a1ef3ec5b5
Added SelectionDAG::InsertISelMapEntry(). This is used to workaround the gcc
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problem where it inline the map insertion call too aggressively. Before this
change it was producing a frame size of 24k for Select_store(), now it's down
to 10k (by calling this method rather than calling the map insertion operator).
llvm-svn: 26094
2006-02-09 22:11:03 +00:00
8976219850
Make the threshold a parameter
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llvm-svn: 26093
2006-02-09 20:15:48 +00:00
4c0bd5bcdf
Done
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llvm-svn: 26091
2006-02-09 20:00:19 +00:00
Chris Lattner