Commit Graph

387935 Commits

Author SHA1 Message Date
Arthur Eubanks 85af8a8c1b [NFC] Use ArgListEntry indirect types more in ISel lowering
For opaque pointers, we're trying to avoid uses of
PointerType::getElementType().

A couple of ISel places use PointerType::getElementType(). Some of these
are easy to fix by using ArgListEntry's indirect types.

The inalloca type wasn't stored there, as opposed to preallocated and
byval which have their indirect types available, so add it and use it.

Differential Revision: https://reviews.llvm.org/D101713
2021-05-10 13:05:15 -07:00
Lang Hames 9507bace6c [ORC] Use a unique_function rather than std::function for dispatchTask. 2021-05-10 13:04:33 -07:00
Nikita Popov aa9b02ac75 [Inliner] Fix noalias metadata handling for instructions simplified during cloning (PR50270)
Instead of using VMap, which may include instructions from the
caller as a result of simplification, iterate over the
(FirstNewBlock, Caller->end()) range, which will only include new
instructions.

Fixes https://bugs.llvm.org/show_bug.cgi?id=50270.

Differential Revision: https://reviews.llvm.org/D102110
2021-05-10 21:59:59 +02:00
Mitch Phillips e78b64df98 [Scudo] Use GWP-ASan's aligned allocations and fixup postalloc hooks.
This patch does a few cleanup things:
 1. The non-standalone scudo has a problem where GWP-ASan allocations
 may not meet alignment requirements where Scudo was requested to have
 alignment >= 16. Use the new GWP-ASan API to fix this.
 2. The standalone variant loses some debugging information inside of
 GWP-ASan because we ask GWP-ASan to allocate an aligned size in the
 frontend. This means reports end up with 'UaF on a 16-byte allocation'
 for a 1-byte allocation with 16-byte alignment. Also use the new API to
 fix this.
 3. Add post-alloc hooks for GWP-ASan intercepted allocations, and add
 stats tracking for GWP-ASan allocations.
 4. Add a small test that checks the alignment of the frontend
 allocator, so that it can be used under GWP-ASan torture mode.
 5. Add GWP-ASan torture mode as a testing configuration to catch these
 regressions.

Depends on D94830, D95889.

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D95884
2021-05-10 12:56:18 -07:00
Aart Bik 96a23911f6 [mlir][sparse] complete migration to sparse tensor type
A very elaborate, but also very fun revision because all
puzzle pieces are finally "falling in place".

1. replaces lingalg annotations + flags with proper sparse tensor types
2. add rigorous verification on sparse tensor type and sparse primitives
3. removes glue and clutter on opaque pointers in favor of sparse tensor types
4. migrates all tests to use sparse tensor types

NOTE: next CL will remove *all* obsoleted sparse code in Linalg

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D102095
2021-05-10 12:55:22 -07:00
Jez Ng b1c3c2e4fc [lld-macho] Fix order file arch filtering
We had a hardcoded check and a stale TODO, written back when we only had
support for one architecture.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D102154
2021-05-10 15:45:54 -04:00
Jez Ng 2516b0b526 [lld-macho] Treat undefined symbols uniformly
In particular, we should apply the `-undefined` behavior to all
such symbols, include those that are specified via the command line
(i.e.  `-e`, `-u`, and `-exported_symbol`). ld64 supports this too.

Reviewed By: #lld-macho, thakis

Differential Revision: https://reviews.llvm.org/D102143
2021-05-10 15:45:54 -04:00
Jez Ng 3d5e5066f1 [lld-macho][nfc] Clean up tests
* Remove unnecessary `rm -rf %t`s
* Have lc-linker-option.ll use the right comment marker
2021-05-10 15:45:54 -04:00
Stefan Pintilie 6215f49b8f [PowerPC] Spilling to registers does not require frame index scavenging
If spills are to registers instead of to the stack then a copy will be used
and frame index scavenging is not required.

This patch adds debug info to frame index scavenging and makes sure that
spilling to registers does not cause frame index scavenging.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D101360
2021-05-10 14:42:39 -05:00
Arthur Eubanks 16748bd2fb [TargetLowering] Only inspect attributes in the arguments for ArgListEntry
Parameter attributes are considered part of the function [1], and like
mismatched calling conventions [2], we can't have the verifier check for
mismatched parameter attributes.

[1] https://llvm.org/docs/LangRef.html#parameter-attributes
[2] https://llvm.org/docs/FAQ.html#why-does-instcombine-simplifycfg-turn-a-call-to-a-function-with-a-mismatched-calling-convention-into-unreachable-why-not-make-the-verifier-reject-it

Reviewed By: rnk

Differential Revision: https://reviews.llvm.org/D101806
2021-05-10 12:35:11 -07:00
Lei Zhang 7e71823f1d [mlir][linalg] Restrict distribution to parallel dims
According to the API contract, LinalgLoopDistributionOptions
expects to work on parallel iterators. When getting processor
information, only loop ranges for parallel dimensions should
be fed in. But right now after generating scf.for loop nests,
we feed in *all* loops, including the ones materialized for
reduction iterators. This can cause unexpected distribution
of reduction dimensions. This commit fixes it.

Reviewed By: mravishankar

Differential Revision: https://reviews.llvm.org/D102079
2021-05-10 15:23:00 -04:00
Siva Chandra Reddy 0c64cef894 [libc] Rever "Simplifies multi implementations and benchmarks".
This reverts commit 541f107871 as the bots
are failing with unknown architecture "x86-64-v*". Will let the original
author decide on the right course of action to correct the problem and
reland.
2021-05-10 19:20:27 +00:00
Mitch Phillips 8936608e6f [scudo] [GWP-ASan] Add GWP-ASan variant of scudo benchmarks.
GWP-ASan is the "production" variant as compiled by compiler-rt, and it's useful to be able to benchmark changes in GWP-ASan or Scudo's GWP-ASan hooks across versions. GWP-ASan is sampled, and sampled allocations are much slower, but given the amount of allocations that happen under test here - we actually get a reasonable representation of GWP-ASan's negligent performance impact between runs.

Reviewed By: cryptoad

Differential Revision: https://reviews.llvm.org/D101865
2021-05-10 12:14:48 -07:00
Craig Topper 18f3a14e13 [RISCV] Validate the SEW and LMUL operands to __builtin_rvv_vsetvli(max)
These are required to be constants, this patch makes sure they
are in the accepted range of values.

These are usually created by wrappers in the riscv_vector.h header
which should always be correct. This patch protects against a user
using the builtin directly.

Reviewed By: khchen

Differential Revision: https://reviews.llvm.org/D102086
2021-05-10 12:11:13 -07:00
Amara Emerson dc75499998 [GlobalISel][IRTranslator] Fix bit-test lowering dropping phi edges.
For contiguous ranges we drop the last bit-test case but in doing so we skip
adding the new MBB PHI edges to the list of replacement PHI edges, and as a
result we incorrectly omit them in the G_PHI in finishPendingPhis().

Was found when bootstrapping clang with -O3 and GlobalISel enabled on Apple Silicon.
2021-05-10 11:59:31 -07:00
Sanjay Patel 88d8f10baf [PassManager] add helper function to hold set of vector passes (2nd try)
This is better no-functional-change-intended than the 1st attempt.
As noted in D102002, there were at least 2 diffs that went
unchecked in pass manager regressions tests: different pass
parameters (SimplifyCFG) and an extension point/callback.
Those should be lifted from the original code blocks correctly
now.
2021-05-10 14:43:00 -04:00
Stella Laurenzo f38633d1bb [mlir][Python] Re-export cext sparse_tensor module to the public namespace.
* This was left out of the previous commit accidentally.

Differential Revision: https://reviews.llvm.org/D102183
2021-05-10 18:08:29 +00:00
Roman Lebedev 08cf2776ac
[X86] AMD Zen 3: sub-32-bit CMP also break dependencies
They measure as having the same effect as 32-bit CMP.
2021-05-10 20:57:38 +03:00
Roman Lebedev ecff974b66
[NFC][X86][MCA] AMD Zen 3: add tests for sub-32-bit CMP dep breaking 2021-05-10 20:57:37 +03:00
Simon Pilgrim a9196db905 [X86][AVX] Add example of failure to remove a 256-bit permute(hadd(hadd(),hadd())) shuffle by reordering the packed operands. 2021-05-10 18:43:17 +01:00
Simon Pilgrim e32374ed5c [X86][SSE] canonicalizeShuffleMaskWithHorizOp - add TODO for better 256/512-bit shuffle+hop folding support. NFC. 2021-05-10 18:43:16 +01:00
Fangrui Song 1f44fee521 [lld-macho] Improve an external weak def test
The rebase table entry is untested.

Reviewed By: #lld-macho, int3

Differential Revision: https://reviews.llvm.org/D102150
2021-05-10 10:35:44 -07:00
Andy Kaylor 7086025d65 [Dependence Analysis] Enable delinearization of fixed sized arrays
Patch by Artem Radzikhovskyy!

Allow delinearization of fixed sized arrays if we can prove that the GEP indices do not overflow the array dimensions. The checks applied are similar to the ones that are used for delinearization of parametric size arrays. Make sure that the GEP indices are non-negative and that they are smaller than the range of that dimension.

Changes Summary:

- Updated the LIT tests with more exact values, as we are able to delinearize and apply more exact tests
- profitability.ll - now able to delinearize in all cases, no need to use -da-disable-delinearization-checks flag and run the test twice
- loop-interchange-optimization-remarks.ll - in one of the cases we are able to delinearize without using -da-disable-delinearization-checks
- SimpleSIVNoValidityCheckFixedSize.ll - removed unnecessary "-da-disable-delinearization-checks" flag. Now can get the exact answer without it.
- SimpleSIVNoValidityCheckFixedSize.ll and PreliminaryNoValidityCheckFixedSize.ll - made negative tests more explicit, in order to demonstrate the need for "-da-disable-delinearization-checks" flag

Differential Revision: https://reviews.llvm.org/D101486
2021-05-10 10:30:15 -07:00
Stella Laurenzo f13893f66a [mlir][Python] Upstream the PybindAdaptors.h helpers and use it to implement sparse_tensor.encoding.
* The PybindAdaptors.h file has been evolving across different sub-projects (npcomp, circt) and has been successfully used for out of tree python API interop/extensions and defining custom types.
* Since sparse_tensor.encoding is the first in-tree custom attribute we are supporting, it seemed like the right time to upstream this header and use it to define the attribute in a way that we can support for both in-tree and out-of-tree use (prior, I had not wanted to upstream dead code which was not used in-tree).
* Adapted the circt version of `mlir_type_subclass`, also providing an `mlir_attribute_subclass`. As we get a bit of mileage on this, I would like to transition the builtin types/attributes to this mechanism and delete the old in-tree only `PyConcreteType` and `PyConcreteAttribute` template helpers (which cannot work reliably out of tree as they depend on internals).
* Added support for defaulting the MlirContext if none is passed so that we can support the same idioms as in-tree versions.

There is quite a bit going on here and I can split it up if needed, but would prefer to keep the first use and the header together so sending out in one patch.

Differential Revision: https://reviews.llvm.org/D102144
2021-05-10 17:15:43 +00:00
Sam Clegg bda8b84884 [lld][WebAssembly] Disallow exporting of TLS symbols
Cross module TLS is currently not supported by our ABI.  This
change makes explicitly exporting a TLS symbol into an error
and prevents implicit exporting (via --export-all).

See https://github.com/emscripten-core/emscripten/issues/14120

Differential Revision: https://reviews.llvm.org/D102044
2021-05-10 09:58:44 -07:00
Dave Lee f44c6f20f5 [cmake] Enable -Wmisleading-indentation
Enable `-Wmisleading-indentation` to balance with the LLVM style of optional parentheses.

Differential Revision: https://reviews.llvm.org/D102092
2021-05-10 09:56:04 -07:00
Stella Laurenzo bcfa7baec8 [mlir][CAPI] Add CAPI bindings for the sparse_tensor dialect.
* Adds dialect registration, hand coded 'encoding' attribute and test.
* An MLIR CAPI tablegen backend for attributes does not exist, and this is a relatively complicated case. I opted to hand code it in a canonical way for now, which will provide a reasonable blueprint for building out the tablegen version in the future.
* Also added a (local) CMake function for declaring new CAPI tests, since it was getting repetitive/buggy.

Differential Revision: https://reviews.llvm.org/D102141
2021-05-10 16:54:56 +00:00
Simon Pilgrim 22f834210a [X86][SSE] Add examples of failures to remove a permute(pack(pack(),pack())) shuffle by reordering the packed operands. 2021-05-10 17:50:47 +01:00
Craig Topper 80b9510806 [RISCV] Correct VL for fixed length masked scatter.
We were incorrectly calling getVectorNumElements on a scalable
vector type. This shouldn't be allowed. This gives a warning on
EVT, but not MVT.
2021-05-10 09:50:08 -07:00
Tomasz Miąsko 2961f86317 [Demangle][Rust] Parse basic types
Reviewed By: dblaikie

Differential Revision: https://reviews.llvm.org/D102142
2021-05-10 09:44:46 -07:00
Fangrui Song 68a20c7f36 [clang] Support -fpic -fno-semantic-interposition for AArch64
-fno-semantic-interposition (only effective with -fpic) can optimize default
visibility external linkage (non-ifunc-non-COMDAT) variable access and function
calls to avoid GOT/PLT, by using local aliases, e.g.
```
int var;
__attribute__((optnone)) int fun(int x) { return x * x; }
int test() { return fun(var); }
```

-fpic (var and fun are dso_preemptable)
```
test:                                   // @test
        adrp    x8, :got:var
        ldr     x8, [x8, :got_lo12:var]
        ldr     w0, [x8]
// fun is preemptible by default in ld -shared mode. ld will create a PLT.
        b       fun
```

vs -fpic -fno-semantic-interposition (var and fun are dso_local)
```
test:                                   // @test
.Ltest$local:
        adrp    x8, .Lvar$local
        ldr     w0, [x8, :lo12:.Lvar$local]
// The assembler either resolves .Lfun$local at assembly time, or produces a
// relocation referencing a non-preemptible section symbol (which can avoid PLT).
        b       .Lfun$local
```

Note: Clang's default -fpic is more aggressive than GCC -fpic: interprocedural
optimizations (including inlining) are available but local aliases are not used.
-fpic -fsemantic-interposition can disable interprocedural optimizations.

Depends on D101872

Reviewed By: peter.smith

Differential Revision: https://reviews.llvm.org/D101873
2021-05-10 09:43:33 -07:00
Lang Hames 08d18af261 [ORC] Update SpeculativeJIT example for dispatchTask changes in 5344c88dcb. 2021-05-10 09:30:46 -07:00
gbreynoo c74176ee31 [llvm-nm] Help option output should be consistent with the command guide
The nm command guide shows the short options used as aliases but these
are not found in the help text unless --show-hidden is used, other tools
show aliases with --help. This change fixes the help output to be
consistent with the command guide.

Differential Revision: https://reviews.llvm.org/D102072
2021-05-10 17:25:41 +01:00
gbreynoo 2aa5f9b45a [llvm-symbolizer] Update Command Guide
The option --use-symbol-table is now a noop and does not appear in the
help text, however it still appears in the command guide. This change
removes it from the command guide and updates the description of
--output-style .

Differential Revision: https://reviews.llvm.org/D102078
2021-05-10 17:21:34 +01:00
Simon Pilgrim 1d802e1665 [X86][SSE] Add tests for missing shuffle(pack(x,y),pack(z,w)) -> permute(pack()) folds. 2021-05-10 17:18:35 +01:00
Simon Pilgrim b483c0afb3 [X86][SSE] Merge equal X32/X64 check prefixes. NFCI. 2021-05-10 17:18:35 +01:00
Fangrui Song 7a0231ae59 [llvm-objdump][MachO] Print a newline before lazy bind/bind/weak/exports trie
This adds a separator between two pieces of information.

Reviewed By: #lld-macho, alexshap

Differential Revision: https://reviews.llvm.org/D102114
2021-05-10 09:16:18 -07:00
Mark de Wever cfef7c918b [libc++][NFC] Remove _VSTD:: when not needed.
Reviewed By: #libc, Quuxplusone

Differential Revision: https://reviews.llvm.org/D102133
2021-05-10 18:15:50 +02:00
Harald van Dijk b0ef2070bc
[X86] Fix position-independent TType encoding
The logic for x86_64 position-independent TType encodings was backwards,
using 8 bytes where 4 were wanted and 4 where 8 were wanted. For regular
x86_64, this was mostly harmless, exception tables are allowed to use
8-byte encodings even when it is not needed. For the large code model,
and for X32, however, the generated exception tables were wrong. For the
large code model, we cannot assume that the address will fit in 4 bytes.
For X32, we cannot use 64-bit relocations.

Fixes PR50148.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D102132
2021-05-10 17:04:33 +01:00
serge-sans-paille 91a919e899 [NFC] Synchronize reserved identifier code between macro and variables / symbols
Differential Revision: https://reviews.llvm.org/D102164
2021-05-10 17:46:51 +02:00
Momchil Velikov 5c7b43aa82 [clang][AArch32] Correctly align HA arguments when passed on the stack
Analogously to https://reviews.llvm.org/D98794 this patch uses the
`alignstack` attribute to fix incorrect passing of homogeneous
aggregate (HA) arguments on AArch32. The EABI/AAPCS was recently
updated to clarify how VFP co-processor candidates are aligned:
4488e34998

Differential Revision: https://reviews.llvm.org/D100853
2021-05-10 16:28:46 +01:00
Sanjay Patel 822be4bec8 Revert "[PassManager] add helper function to hold set of vector passes"
This reverts commit fefcb1f878.
It was supposed to be NFC, but as noted in the post-commit
comments in D102002, that was not true: SimplifyCFG uses
different parameters and there's a difference in an
extension point / callback.
2021-05-10 10:59:30 -04:00
Jon Chesterfield 6da348569c [libomptarget] Add support for target allocators to dynamic cuda RTL
[libomptarget] Add support for target allocators to dynamic cuda RTL

Follow on to D102000 which introduced new calls into libcuda. This patch adds
the corresponding entry points to dynamic_cuda, fixing the build for systems
that do not have the cuda toolkit installed.

Function types and enum from https://docs.nvidia.com/cuda/cuda-driver-api/group__CUDA__MEM.html

Reviewed By: pdhaliwal

Differential Revision: https://reviews.llvm.org/D102169
2021-05-10 15:27:50 +01:00
Zarko Todorovski 0c41f77857 [PowerPC] Enable safe for 32bit vins* P10 instructions
Correctly emit `vins`instructions that are safe in 32bit mode.

Reviewed By: nemanjai, #powerpc

Differential Revision: https://reviews.llvm.org/D101383
2021-05-10 10:13:13 -04:00
Alexey Bataev 30463bc3f1 [SLP]Do not count perfect diamond matches for gathers several times.
Need to remove the old code for avoiding double counting of the gather
nodes with perfect diamond matches within the tree after we started
detecting perfect/shuffled matching in the previous patch D100495. We
may skip the cost for such nodes completely.

Differential Revision: https://reviews.llvm.org/D102023
2021-05-10 07:08:07 -07:00
jasonliu 4677d795b2 [libc++][AIX] Define _LIBCPP_ELAST
The aim is to define _LIBCPP_ELAST for AIX since strerror/strerror_r
can't handle out-of-range errno values.

Differential Revision: https://reviews.llvm.org/D100986
2021-05-10 13:54:30 +00:00
Bradley Smith 635164b95a [AArch64][SVE] Improve SVE codegen for fixed length BITCAST
Expanding a fixed length operation involves wrapping the operation in an
insert/extract subvector pair, as such, when this is done to bitcast we
end up with an extract_subvector of a bitcast. DAGCombine tries to
convert this into a bitcast of an extract_subvector which restores the
initial fixed length bitcast, causing an infinite loop of legalization.

As part of this patch, we must make sure the above DAGCombine does not
trigger after legalization if the created bitcast would not be legal.

Differential Revision: https://reviews.llvm.org/D101990
2021-05-10 14:43:53 +01:00
Alexey Bataev 230953d577 [OPENMP]Fix PR48851: the locals are not globalized in SPMD mode.
Follow the more general patch for now, do not try to SPMDize the kernel
if the variable is used and local.

Differential Revision: https://reviews.llvm.org/D101911
2021-05-10 06:34:11 -07:00
qixingxue fefd03a891 [TableGen] Remove redundant `Error:` in msg (NFC)
Since calling `PrintFatalError` will automatically add `error: `
prefix in the message printed, there is no need having an extra
`ERROR:` prefix in the argument passed.

Differential Revision: https://reviews.llvm.org/D102151
Reviewed By: Paul-C-Anagnostopoulos
2021-05-10 21:18:37 +08:00
Simon Pilgrim 605f90475f X86FlagsCopyLowering.cpp - try to pass DebugLoc by const-ref to avoid costly TrackingMDNodeRef copies. NFCI. 2021-05-10 14:00:37 +01:00