Commit Graph

427504 Commits

Author SHA1 Message Date
Weining Lu a992115545 [LoongArch] Add codegen support for the binary operations
These binary operations include sub/fadd/fsub/fmul/fdiv. Others ops
like mul/udiv/sdiv/urem/srem would be added later since they depend on
`shift` and `truncate` that have not been supported.

Note `add` has been added in a previous patch.

Reference:
https://llvm.org/docs/LangRef.html#binary-operations

Differential Revision: https://reviews.llvm.org/D127199
2022-06-20 09:43:36 +08:00
Nico Weber 7cb49996f7 [lld] Remove lld/include/lld/Core
This is all dead code that we forgot to delete in
https://reviews.llvm.org/D114842

Differential Revision: https://reviews.llvm.org/D128147
2022-06-19 21:37:13 -04:00
Kazu Hirata c7987d4948 [ADT] Use value instead of getValue() (NFC)
Since Optional<clang::FileEntryRef> uses a custom storage class, this
patch adds value to MapEntryOptionalStorage.
2022-06-19 18:34:33 -07:00
Kazu Hirata 813f487228 [ADT] Use has_value (NFC)
This patch switches to has_value within Optional.

Since Optional<clang::FileEntryRef> uses custom storage class, this
patch adds has_entry to MapEntryOptionalStorage.
2022-06-19 18:10:13 -07:00
lewuathe 72ee11a8cf [mlir][complex] Convert complex.conj to libm
Add conversion for complex.conj to libm call

Reviewed By: bixia

Differential Revision: https://reviews.llvm.org/D127473
2022-06-20 09:38:50 +09:00
Maksim Panchenko f263a66ba0 [BOLT] Split functions with exceptions in shared objects and PIEs
Add functionality to allow splitting code with C++ exceptions in shared
libraries and PIEs. To overcome a limitation in exception ranges format,
for functions with fragments spanning multiple sections, add trampoline
landing pads in the same section as the corresponding throwing range.

Reviewed By: Amir

Differential Revision: https://reviews.llvm.org/D127936
2022-06-19 16:48:48 -07:00
Arthur Eubanks cc65f3e167 [GlobalOpt] Preserve CFG analyses
The only place we modify the CFG is when calling
removeUnreachableBlocks(), so insert a callback there which invalidates
analyses for that function (or recomputes DT in the legacy PM).

Small compile time wins across the board:
https://llvm-compile-time-tracker.com/compare.php?from=f444ea8ce0aaaa5ec1a4129809389da15cc41396&to=698f41f4fc26cbf1006ed5d88e9d658edfc5b749&stat=instructions

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D128145
2022-06-19 16:13:02 -07:00
Craig Topper 314dbde12c [DAGCombiner][ARM][RISCV] Teach ShrinkLoadReplaceStoreWithStore to use truncstore.
The VT we want to shrink to may not be legal especially after type
legalization.

Fixes PR56110.

Reviewed By: RKSimon

Differential Revision: https://reviews.llvm.org/D128135
2022-06-19 15:50:15 -07:00
Nico Weber 8c589939f5 fix comment typos to cycle bots 2022-06-19 18:34:12 -04:00
Nico Weber e568cccb1f [lld] Wrap rst file to 80 cols and fix "precense" typo 2022-06-19 18:25:09 -04:00
Nico Weber 7effcbda49 Rename parallelForEachN to just parallelFor
Patch created by running:

  rg -l parallelForEachN | xargs sed -i '' -c 's/parallelForEachN/parallelFor/'

No behavior change.

Differential Revision: https://reviews.llvm.org/D128140
2022-06-19 17:49:00 -04:00
Siva Chandra Reddy a5cb6edb47 [libc] Revert: Temporary disable environment tests for PATH variable.
This reverts commit 2846c2bb4f. The reason
for the disable is not relevant anymore.
2022-06-19 21:39:10 +00:00
Eric Gullufsen 73202130e5 [InstCombine] Optimize test for same-sign of values
(icmp slt (X & Y), 0) | (icmp sgt (X | Y), -1) -> (icmp sgt (X ^ Y), -1)
(icmp slt (X | Y), 0) & (icmp sgt (X & Y), -1) -> (icmp slt (X ^ Y), 0)

[[ https://alive2.llvm.org/ce/z/qXxEFP | alive2 example ]]
[[ https://godbolt.org/z/aWf9c6j74 | godbolt  ]]

[[ https://godbolt.org/z/5Ydn5TehY | godbolt for inverted form ]]
[[ https://alive2.llvm.org/ce/z/93AODr | alive2 for inverted form ]]
[[ https://github.com/llvm/llvm-project/issues/55988 | issue  ]]

Differential Revision: https://reviews.llvm.org/D127903
2022-06-19 16:18:19 -04:00
Arthur Eubanks 6dd17a2b34 [CallGraph] Don't preserve CallGraph when function CFG analyses are preserved
The call graph has nothing to with function CFGs.

Fixes a crash in a future change that exposes this bug.
2022-06-19 13:01:08 -07:00
Sanjay Patel 4022551a15 [ValueTracking] recognize sub X, (X -nuw Y) as not overflowing
This extends a similar pattern from D125500 and D127754.
If we know that operand 1 (RHS) of a subtract is itself a
non-overflowing subtract from operand 0 (LHS), then the
final/outer subtract is also non-overflowing:
https://alive2.llvm.org/ce/z/Bqan8v

InstCombine uses this analysis to trigger a narrowing
optimization, so that is what the first changed test shows.

The last test models a motivating case from issue .
In that example, we determine 'nuw' on the first sub from
the urem, then we determine that the 2nd sub can be narrowed,
and that leads to eliminating both subtracts.

here are still several missing subtract narrowing optimizations
demonstrated in the tests above the diffs shown here - those
should be handled in InstCombine with another set of patches.
2022-06-19 15:12:19 -04:00
Sanjay Patel bfb915ec8b [InstCombine] add tests for 'sub nuw' with zext; NFC 2022-06-19 15:12:19 -04:00
Kazu Hirata 5d7e63fb4f [ADT] Rename value to alt (NFC)
This patch renames value to alt so that the parameter won't collide
with member function value().
2022-06-19 12:00:03 -07:00
Haojian Wu 44582afe48 Fix an unused-variable warning in release build, NFC. 2022-06-19 20:52:00 +02:00
Amir Ayupov c0128549b0 [TableGen][X86] Add Size field to X86MemOperand class
Set Size appropriately in operand definitions and query it for dumping memory
operand size table `getMemOperandSize` (follow-up use D126116) and
`X86Disassembler::getMemOperandSize`.

Excerpt from a produced `getMemOperandSize` table for X86:

```
static int getMemOperandSize(int OpType) {
  switch (OpType) {
  default: return 0;
  case OpTypes::i8mem:
  case OpTypes::i8mem_NOREX:
    return 8;

  case OpTypes::f16mem:
  case OpTypes::i16mem:
    return 16;

  case OpTypes::f32mem:
  case OpTypes::i32mem:
    return 32;
...
```

Reviewed By: skan, pengfei

Differential Revision: https://reviews.llvm.org/D127787
2022-06-19 11:46:56 -07:00
Amir Ayupov 445bc88501 [BOLT] Use 32-bit MOV to zero 64-bit register in instrumentation code
Instead of `movabsq $0x0, %rax` emit shorter equivalent `movl $0x0, %eax`.
Intel SDM, 3.4.1.1 General-Purpose Registers in 64-Bit Mode:
>32-bit operands generate a 32-bit result, zero-extended to a 64-bit result in
> the destination general-purpose register.

Reviewed By: rafauler

Differential Revision: https://reviews.llvm.org/D127045
2022-06-19 11:34:32 -07:00
David Green e995e34469 [MachinePipeliner] Handle failing constrainRegClass
The included test hits a verifier problems as one of the instructions:
```
%113:tgpreven, %114:tgprodd = MVE_VMLSLDAVas16 %12:tgpreven(tied-def 0), %11:tgprodd(tied-def 1), %7:mqpr, %8:mqpr, 0, $noreg, $noreg
```
Has two inputs that come from different PHIs with the same base reg, but
conflicting regclasses:
```
%11:tgprodd = PHI %103:gpr, %bb.1, %16:gpr, %bb.2
%12:tgpreven = PHI %103:gpr, %bb.1, %17:gpr, %bb.2
```

The MachinePipeliner would attempt to use %103 for both the %11 and %12
operands in the prolog, constraining the register class to the common
subset of both. Unfortunately there are no registers that are both odd
and even, so the second constrainRegClass fails. Fix this situation by
inserting a COPY for the second if the call to constrainRegClass fails.

The register allocation can then fold that extra copy away. The register
allocation of Q regs changed with this test, but the R regs were the
same and no new instructions are needed in the final assembly.

Differential Revision: https://reviews.llvm.org/D127971
2022-06-19 18:55:19 +01:00
Kazu Hirata 30c675878c Use value_or instead of getValueOr (NFC) 2022-06-19 10:34:41 -07:00
Arthur Eubanks 6f348b146b [GlobalOpt] Perform store->dominated load forwarding for stored once globals
Compile time tracker:
https://llvm-compile-time-tracker.com/compare.php?from=1e556f459b44dd0ca4073e932f66ecb6f40fe31a&to=6d7bed4e1e72c6a8592748626091274209740a40&stat=instructions

Reviewed By: nikic

Differential Revision: https://reviews.llvm.org/D128128
2022-06-19 10:27:20 -07:00
Simon Pilgrim 0fe13b5f84 [X86] Add common CHECK prefix to nontemporal-3.ll tests 2022-06-19 18:23:19 +01:00
Nimish Mishra c05b99971f [flang][OpenMP][NFC] Refactor code related to OpenMP atomic memory order clause semantics
Reviewed By: peixin

Differential Revision: https://reviews.llvm.org/D127822
2022-06-19 22:36:40 +05:30
Simon Pilgrim ba3f2667b6 [DAG] Add MaskedVectorIsZero helper
Equivalent to MaskedValueIsZero, except its checking if all of the demanded vectors elements are known to be zero
2022-06-19 17:56:30 +01:00
Kazu Hirata aa88161b37 [lldb] Use value_or instead of getValueOr (NFC) 2022-06-19 09:12:01 -07:00
Sanjay Patel 0399473de8 [InstCombine] add fold for (ShiftC >> X) <u C
https://alive2.llvm.org/ce/z/RcdzM-

This fixes a regression noted in issue .
2022-06-19 11:03:28 -04:00
Simon Pilgrim 1ebe5cac46 [DAG] SimplifyDemandedBits - add DemandedElts handling to ISD::SIGN_EXTEND_INREG simplification 2022-06-19 15:35:29 +01:00
Simon Pilgrim db1be696c4 [DAG] SimplifyDemandedBits - add ISD::VSELECT handling 2022-06-19 15:18:25 +01:00
Sanjay Patel feb4b336ac [InstCombine] add/adjust tests for signbit tests; NFC
Additonal coverage for D127903.
2022-06-19 10:09:56 -04:00
Eric Gullufsen 4b7d51f129 [InstCombine] add baseline tests for signbit cmp folds; NFC
D127903 / issue 
2022-06-19 09:03:28 -04:00
Simon Pilgrim 41455dd1dc [X86] Remove isTargetShuffleSplat and just use SelectionDAG::isSplatValue
shuffle(splat(x)) -> splat(x), it doesn't have to be a target specific broadcast
2022-06-19 11:22:57 +01:00
Kazu Hirata 757d9d22cd [lld] Use value_or instead of getValueOr (NFC) 2022-06-19 00:29:41 -07:00
Kazu Hirata 97c87c6f7c [AST] Fix an unused variable warning
This paptch fixes:

  warning: unused variable ‘DD’ [-Wunused-variable]
2022-06-19 00:20:58 -07:00
Kazu Hirata 5dd171dcb5 [clang-tools-extra] Use value_or instead of getValueOr (NFC) 2022-06-19 00:13:38 -07:00
Kazu Hirata 06decd0b41 [clang] Use value_or instead of getValueOr (NFC) 2022-06-18 23:21:34 -07:00
Fangrui Song 57e43ebc42 [Driver][Gnu] Don't passs --dynamic-linker in -r mode
No behavior change as GNU ld/gold/ld.lld ignore --dynamic-linker in -r mode.
This change makes the intention clearer as we already suppress --dynamic-linker
for -shared, -static, and -static-pie.
2022-06-18 23:13:19 -07:00
Kazu Hirata 129b531c9c [llvm] Use value_or instead of getValueOr (NFC) 2022-06-18 23:07:11 -07:00
Arthur Eubanks 1e556f459b [test][GlobalOpt] Update precommitted test 2022-06-18 21:58:16 -07:00
Arthur Eubanks 9fac606af2 [test][GlobalOpt] Regenerate some tests 2022-06-18 21:34:38 -07:00
Kazushi (Jam) Marukawa f61f7be0c7 [VE][NFC] Remove obsoleted function declaration 2022-06-19 13:33:46 +09:00
Arthur Eubanks 4a5201f484 [NFC][GlobalOpt] Remove unused parameters 2022-06-18 21:23:39 -07:00
Kazu Hirata 3c49576417 [ADT] Add has_value, value, value_or to llvm::Optional
This patch adds has_value, value, value_or to llvm::Optional so that
llvm::Optional looks more like std::optional.

I will keep the existing functions while migrating their callers and
then remove them later.

Differential Revision: https://reviews.llvm.org/D128131
2022-06-18 21:21:33 -07:00
Kazu Hirata a5258e5b27 Revert "[MCParser] Use default member initialization (NFC)"
This reverts commit 68090a014c.

The patch seems to cause a build error on ppc64le:

https://lab.llvm.org/buildbot#builders/121/builds/20536
2022-06-18 21:02:09 -07:00
Kazu Hirata 68090a014c [MCParser] Use default member initialization (NFC)
Identified with modernize-use-default-member-init.
2022-06-18 20:54:56 -07:00
Kazu Hirata 556bcc7821 [ADT] Rename value to val (NFC)
I'd like to introduce functions, such as value, value_or, has_value,
etc to make llvm::Optional look more like std::optional.  Renaming
value to val avoids name conflicts.

Differential Revision: https://reviews.llvm.org/D128125
2022-06-18 20:19:18 -07:00
Tue Ly 2846c2bb4f [libc] Temporary disable environment tests for PATH variable.
This is blocking fullbuild bot.
2022-06-18 23:04:33 -04:00
Tue Ly c5ca7649e3 [libc][Obvious] Fix c++20-designator warnings for tests that use TmHelper.h. 2022-06-18 22:55:57 -04:00
Arthur Eubanks 213d489707 [test][GlobalOpt] Precommit more tests
And fix up existing tests to not have so much UB.
2022-06-18 19:36:48 -07:00