efee1cdc2b
Fix comment.
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llvm-svn: 135737
2011-07-22 00:51:54 +00:00
989b7efd8a
Add BasicFormatter and ChildVisitingFormatter utility classes to the lldbutil.py module
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which provide some convenient ways to print an SBValue object. Use that in TestValueAPI.py
to print the 'days_of_week' char* array variable.
For an example:
cvf = lldbutil.ChildVisitingFormatter(indent=2)
print cvf.format(days_of_week)
produces:
(const char *[7]) days_of_week = 0x00000001026a5060 (location)
(const char *) [0] = "Sunday"
(const char *) [1] = "Monday"
(const char *) [2] = "Tuesday"
(const char *) [3] = "Wednesday"
(const char *) [4] = "Thursday"
(const char *) [5] = "Friday"
(const char *) [6] = "Saturday"
llvm-svn: 135736
2011-07-22 00:47:58 +00:00
1eb27ae580
Teach tblgen to emit MCRegisterClasses.
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- This currently introduces more instances of the static DenseSet dtor, but that should be fixable.
llvm-svn: 135735
2011-07-22 00:44:39 +00:00
76d711582c
Fix typo in #include which revealed in the case-sensitive filesystem.
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llvm-svn: 135734
2011-07-22 00:39:00 +00:00
903b7e9b65
In the AST reader, factor out the mapping of local type IDs to global
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type IDs into a single place, and make sure that all of the callers
use the appropriate functions to do the mapping. Since the mapping is
still the identity function, this is essentially a no-op.
llvm-svn: 135733
2011-07-22 00:38:23 +00:00
d55546b27a
when typing a summary string you can use the %S symbol to explicitly indicate that you want the summary to be used to print the target object
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(e.g. ${var%S}). this might already be the default if your variable is of an aggregate type
new feature: synthetic filters. you can restrict the number of children for your variables to only a meaningful subset
- the restricted list of children obeys the typical rules (e.g. summaries prevail over children)
- one-line summaries show only the filtered (synthetic) children, if you type an expanded summary string, or you use Python scripts, all the real children are accessible
- to provide a synthetic children list use the "type synth add" command, as in:
type synth add foo_type --child varA --child varB[0] --child varC->packet->flags[1-4]
(you can use ., ->, single-item array operator [N] and bitfield operator [N-M]; array slice access is not supported, giving simplified names to expression paths is not supported)
- a new -S option to frame variable and target variable lets you override synthetic children and instead show real ones
llvm-svn: 135731
2011-07-22 00:16:08 +00:00
1872173841
Remove the 128-bit special handling from SCALAR_TO_VECTOR. This isn't
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the way to go. Doing this here will prevent several node matches later,
and would have to force looking all the way through several
VINSERTF128/VEXTRACTF128 chains to optimize simple things.
llvm-svn: 135730
2011-07-22 00:15:10 +00:00
612e56174b
-Inspected a AVX code block added by someone in early Feb. This was never used
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and was actually very wrong, fix it and make it simpler. Also remove the
ConcatVectors function, which is unused now.
- Fix a introduction of useless nodes in r126664 and r126264. The
VUNPCKL* should never be introduced cause we don't want duplicate
nodes for 128 AVX and non-AVX modes, the actual instruction
difference only exists during isel, but not for target specific DAG
nodes. We only introduce V* target nodes when there is no 128-bit
version already there.
- Fix a fragile test and make it more useful.
llvm-svn: 135729
2011-07-22 00:15:07 +00:00
14a95bda04
Although we already support this, add testcases for consistency
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llvm-svn: 135728
2011-07-22 00:15:03 +00:00
91eff5140f
Add a DAGCombine for transforming 128->256 casts into a simple
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vxorps + vinsertf128 pair of instructions
llvm-svn: 135727
2011-07-22 00:15:00 +00:00
dbebd01269
Introduce a new function to lower 256-bit vectors which are not
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direclty supported and should be promoted and handled by smaller
shuffles
llvm-svn: 135726
2011-07-22 00:14:56 +00:00
95d037721b
Rename function to be more specific and be more strict about its usage
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llvm-svn: 135725
2011-07-22 00:14:53 +00:00
44860314d2
Use MachineBranchProbabilityInfo instead of MachineLoopInfo in IfConversion.
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llvm-svn: 135724
2011-07-21 23:48:55 +00:00
a7431924ab
Avoid warning on "clang -c -Dfoo test.i". Lines like these are created
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when using ccache and libtool.m4 assumes that the compiler cannot print
warnings about options it knows about.
llvm-svn: 135723
2011-07-21 23:40:37 +00:00
0491270f99
Get rid of the extraneous GPR operand on so_reg_imm operands, which in turn necessitates a lot of changes to related bits.
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llvm-svn: 135722
2011-07-21 23:38:37 +00:00
e106aee6f5
Fix MergeInVectorType to check for vector types with the same alloc
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size but different element types, so that it filters out the cases
that CreateShuffleVectorCast doesn't handle. This fixes rdar://9786827.
llvm-svn: 135721
2011-07-21 23:30:09 +00:00
f224ae06d2
Clean up the rest of the local -> global declaration ID mappings
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within the ASTReader (I hope).
llvm-svn: 135720
2011-07-21 23:29:11 +00:00
72e7c4f9ac
ARM Asm parser range checking for [0,31] immediates.
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llvm-svn: 135719
2011-07-21 23:26:25 +00:00
3354674b48
ARM parsing and encoding tests for SBC instruction.
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llvm-svn: 135718
2011-07-21 23:03:59 +00:00
737a3dac02
Initialize DenseSets lazily.
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llvm-svn: 135717
2011-07-21 23:03:59 +00:00
6cbb8d684f
Add test scenario of SBValue APIs for the 'days_of_week' global variable.
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llvm-svn: 135716
2011-07-21 23:02:00 +00:00
8dbf59d041
ARM testcases for SADD/SASX parsing and encoding.
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llvm-svn: 135715
2011-07-21 23:00:49 +00:00
cb7c0a4927
Add missing getAnalysisUsage in MachineBlockFrequency.
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llvm-svn: 135714
2011-07-21 22:59:09 +00:00
2a0320c877
ARM assembly parsing support for RSC instruction.
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Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.
llvm-svn: 135713
2011-07-21 22:56:30 +00:00
17806e6636
ARM assembly parsing support for RSB instruction.
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Add two-operand instruction aliases. Add parsing and encoding tests for
variants of the instruction.
llvm-svn: 135712
2011-07-21 22:37:43 +00:00
7fb091977d
In the ASTReader, factor out the loading of (local) declaration IDs,
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such that every declaration ID loaded from an AST file will go through
a central local -> global mapping function. At present, this change
does nothing, since the local -> global mapping function is the
identity function.
This is the mechanical part of the refactoring; a follow-up patch will
address a few remaining areas where it's not obvious whether we're
dealing with local or global IDs.
llvm-svn: 135711
2011-07-21 22:35:25 +00:00
2a22c06267
ARM parsing and encoding tests for RBIT, REV, REV16 and REVSH.
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llvm-svn: 135710
2011-07-21 22:29:23 +00:00
b31e60b7c6
ARM parsing and encodings tests for saturating arithmetic insns.
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llvm-svn: 135709
2011-07-21 22:18:28 +00:00
82bb089e87
Add a missing test for the limits on wchar
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llvm-svn: 135708
2011-07-21 22:01:12 +00:00
4145732818
Fix diagnostic when loading a PCH which has different enabled/disabled state of -fobjc-arc. rdar://9818341
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llvm-svn: 135707
2011-07-21 21:56:04 +00:00
4aaae18d73
Tidy up.
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llvm-svn: 135706
2011-07-21 21:26:05 +00:00
3766fdb654
Cleaning up more of the ID situation in the AST reader. This patch relaxes and generalizes how CXX base specifiers are identified and loaded by using a ContinuousRangeMap. This also adds a global bit offset (or base) to the PerFileData.
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llvm-svn: 135705
2011-07-21 21:15:19 +00:00
6820c1e0d3
Update generated CPP code with the new API on CallInst::Create and ConstantExpr::getGetElementPtr.
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llvm-svn: 135704
2011-07-21 20:59:21 +00:00
0a8d89242f
ARM assembly parsing POP/PUSH mnemonics.
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Aliases for LDM/STM. The single-register versions should encode to LDR/STR
with writeback, but we don't (yet) get that correct. Neither does Darwin's
system assembler, though, so that's not a deal-breaker of a limitation.
llvm-svn: 135702
2011-07-21 19:57:11 +00:00
204b8717d4
Add some debugging output to the AST reader, so we can see the global remappings we generate
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llvm-svn: 135701
2011-07-21 19:50:14 +00:00
6853cf66d1
Add test scenario for exercising SBValue API: TypeIsPointerType() and GetByteSize().
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llvm-svn: 135699
2011-07-21 19:31:59 +00:00
378f59d4cd
Fix CMake build
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llvm-svn: 135698
2011-07-21 19:10:57 +00:00
b2aa2c4a24
Add tests for ARM PKH assembly parsing.
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llvm-svn: 135696
2011-07-21 19:02:03 +00:00
becabe0e81
Initialize the all important automatic variable 'lldb::ConnectionStatus status' before
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invoking the Read(...) method to read in bytes. Similar to r135461.
llvm-svn: 135695
2011-07-21 19:00:59 +00:00
b595ed0085
Split up the ARM so_reg ComplexPattern into so_reg_reg and so_reg_imm, allowing us to distinguish the encodings that use shifted registers from those that use shifted immediates. This is necessary to allow the fixed-length decoder to distinguish things like BICS vs LDRH.
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llvm-svn: 135693
2011-07-21 18:54:16 +00:00
49bf76bab3
In the AST reader, keep track of the total number of source locations
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entries incrementally, rather than iterating over the chain when
loading a single AST file.
llvm-svn: 135692
2011-07-21 18:46:38 +00:00
55e7557481
For ASTUnit::Save, write the AST to a temporary and then rename it to the actual filename.
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Should avoid race conditions. Addresses rdar://9788943.
llvm-svn: 135691
2011-07-21 18:44:49 +00:00
ff9a5506c9
Cut down one open/close pair of system calls by using Path's makeUnique instead of createTemporaryFileOnDisk.
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llvm-svn: 135690
2011-07-21 18:44:46 +00:00
42a4996b5a
Update cxx_status page on www: clang has had full support for in-class initializers since r132890.
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llvm-svn: 135689
2011-07-21 18:02:57 +00:00
17aa45d431
Clean up the C++ status page by eliminating the utterly unnecessary set of projects. C++98/03 is sooooo yesterday
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llvm-svn: 135687
2011-07-21 17:46:15 +00:00
80d6322c00
Update C++0x nullptr status, from Jonathan Sauer
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llvm-svn: 135686
2011-07-21 17:41:00 +00:00
b21138fc25
Add FixIt hint for missing 'id' type.
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// rdar://9615045
llvm-svn: 135685
2011-07-21 17:38:14 +00:00
cd3e8cb882
Cleanup: make std::pair usage slightly less indecipherable without actually naming variables!
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llvm-svn: 135684
2011-07-21 17:37:39 +00:00
5fb7737513
Sink parts of TargetRegisterClass into MCRegisterClass.
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llvm-svn: 135683
2011-07-21 17:26:50 +00:00
27c1e2560c
ARM assembly parsing and encoding for PKHBT and PKHTB instructions.
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llvm-svn: 135682
2011-07-21 17:23:04 +00:00
Johnny Chen