Commit Graph

13 Commits

Author SHA1 Message Date
Fangrui Song 5387c2cd17 [llvm-objdump] Print newlines before and after "Disassembly of section ...:"
This improves readability and the behavior is consistent with GNU objdump.

The new test test/tools/llvm-objdump/X86/disassemble-section-name.s
checks we print newlines before and after "Disassembly of section ...:"

Differential Revision: https://reviews.llvm.org/D61127

llvm-svn: 359668
2019-05-01 10:40:48 +00:00
Fangrui Song b159906a9a [test] Change llvm-readobj -long-option to --long-option or well-known short options. NFC
Also change some options that have different semantics (cause confusion) in llvm-readelf mode:

-s => -S
-t => --symbols
-sd => --section-data

llvm-svn: 359651
2019-05-01 05:49:01 +00:00
Fangrui Song 07f8daf05e [ELF] Simplify RelRo, TLS, NOBITS section ranks and make RW PT_LOAD start with RelRo
Old: PT_LOAD(.data | PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .bss)
New: PT_LOAD(PT_GNU_RELRO(.data.rel.ro .bss.rel.ro) | .data .bss)

The placement of | indicates page alignment caused by PT_GNU_RELRO. The
new layout has simpler rules and saves space for many cases.

Old size: roundup(.data) + roundup(.data.rel.ro)
New size: roundup(.data.rel.ro + .bss.rel.ro) + .data

Other advantages:

* At runtime the 3 memory mappings decrease to 2.
* start(PT_TLS) = start(PT_GNU_RELRO) = start(RW PT_LOAD). This
  simplifies binary manipulation tools.
  GNU strip before 2.31 discards PT_GNU_RELRO if its
  address is not equal to the start of its associated PT_LOAD.
  This has been fixed by https://sourceware.org/git/gitweb.cgi?p=binutils-gdb.git;h=f2731e0c374e5323ce4cdae2bcc7b7fe22da1a6f
  But with this change, we will be compatible with GNU strip before 2.31
* Before, .got.plt (non-relro by default) was placed before .got (relro
  by default), which made it impossible to have _GLOBAL_OFFSET_TABLE_
  (start of .got.plt on x86-64) equal to the end of .got (R_GOT*_FROM_END)
  (https://bugs.llvm.org/show_bug.cgi?id=36555). With the new ordering, we
  can improve on this regard if we'd like to.

Reviewers: ruiu, espindola, pcc

Subscribers: emaste, arichardson, llvm-commits, joerg, jdoerfert

Differential Revision: https://reviews.llvm.org/D56828

llvm-svn: 356117
2019-03-14 03:47:45 +00:00
George Rimar d46753e421 [ELF] - Do --hash-style=both by default.
Its PR34712,

GNU linkers recently changed default values to "both" of "sysv".
Patch do the same for all targets except MIPS, where .gnu.hash
section is not yet supported.

Code suggested by Rui Ueyama.

Differential revision: https://reviews.llvm.org/D38407

llvm-svn: 315051
2017-10-06 09:37:44 +00:00
Rui Ueyama daf5adc6c1 Update for LLVM change.
r314639 ([X86] Change register&memory TEST instructions from MRMSrcMem
to MRMDstMem) broke the test.

llvm-svn: 314645
2017-10-02 02:09:58 +00:00
Peter Collingbourne 628ec9f193 ELF: Place relro sections after non-relro sections in r/w segment.
This is in preparation for my next change, which will introduce a relro
nobits section. That requires that relro sections appear at the end of the
progbits part of the r/w segment so that the relro nobits section can appear
contiguously.

Because of the amount of churn required in the test suite, I'm making this
change separately.

llvm-svn: 291523
2017-01-10 01:21:30 +00:00
Ed Maste 8fd0196c6f lld: Default image base address to 0x200000 on x86-64
Align to the large page size (known as a superpage or huge page).
FreeBSD automatically promotes large, superpage-aligned allocations.

Differential Revision:	https://reviews.llvm.org/D27042

llvm-svn: 287782
2016-11-23 17:44:02 +00:00
Ed Maste 8d0381d61f Replace test instruction byte strings with {{.*}}
An upcoming change to the image base address for x86-64 (D27042) will
will change some addresses and hence the instruction encodings. We care
about the disassembled instructions, not their encodings.

Differential Revision:	https://reviews.llvm.org/D27056

llvm-svn: 287778
2016-11-23 17:09:38 +00:00
Rui Ueyama b66260ac17 Remove trailing whitespace.
llvm-svn: 283372
2016-10-05 20:09:50 +00:00
Eugene Leviant aa49819162 Add DT_REL(A)COUNT tag to .dynamic section
This patch groups relative relocations in a single block
in combrelocs mode and adds DT_RELCOUNT or DT_RELACOUNT
tag to .dynamic section

Differential revision: https://reviews.llvm.org/D23661

llvm-svn: 280210
2016-08-31 08:51:39 +00:00
George Rimar f10c8290fa [ELF] - Implemented support for test/binop relaxations from latest ABI.
Patch implements next relaxation from latest ABI:

"Convert memory operand of test and binop into immediate operand, where binop is one of adc, add, and, cmp, or,
sbb, sub, xor instructions, when position-independent code is disabled."

It is described in System V Application Binary Interface AMD64 Architecture Processor 
Supplement Draft Version 0.99.8 (https://github.com/hjl-tools/x86-psABI/wiki/x86-64-psABI-r249.pdf, 
B.2 "B.2 Optimize GOTPCRELX Relocations").

Differential revision: http://reviews.llvm.org/D20793

llvm-svn: 271405
2016-06-01 16:45:30 +00:00
Rafael Espindola a8433c1d1b Revert "bar"
This reverts commit r271365.
Sorry, wrong branch.

llvm-svn: 271366
2016-06-01 06:15:22 +00:00
Rafael Espindola 74540516ef bar
llvm-svn: 271365
2016-06-01 06:13:54 +00:00