Commit Graph

135919 Commits

Author SHA1 Message Date
Matthias Braun 93320393a4 Missed updating a GlobalISel bit in my last commit
GlobalISel isn't built by default so I missed it.

llvm-svn: 277030
2016-07-28 20:13:42 +00:00
Krzysztof Parzyszek 167d918225 [Hexagon] Implement MI-level constant propagation
llvm-svn: 277028
2016-07-28 20:01:59 +00:00
Nirav Dave b7c72717c9 Fix DbgValue handling in SelectionDAG.
[DAG] Relocate TransferDbgValues in ReplaceAllUsesWith(SDValue, SDValue)
to before we modify the CSE maps.

llvm-svn: 277027
2016-07-28 19:48:39 +00:00
Zachary Turner 6c9dbbd661 [pdb] Fix another narrowing conversion on x64 builds.
llvm-svn: 277026
2016-07-28 19:47:04 +00:00
Zachary Turner 9f73c20228 [pdb] Fix an ambiguity when writing size_t on x64 platforms.
llvm-svn: 277025
2016-07-28 19:29:52 +00:00
Zachary Turner e98137c47f [pdb] Fix some warnings that break -Werror builds.
llvm-svn: 277021
2016-07-28 19:18:02 +00:00
Krzysztof Parzyszek c43644d332 [Hexagon] Insert CFI instructions before throwing calls
Normally, CFI instructions should be inserted after allocframe, but
if allocframe is in the same packet with a call, the CFI instructions
should be inserted before that packet.

llvm-svn: 277020
2016-07-28 19:13:46 +00:00
Zachary Turner d66889cbae [pdb] Refactor library to more clearly separate reading/writing
Reviewed By: amccarth, ruiu
Differential Revision: https://reviews.llvm.org/D22693

llvm-svn: 277019
2016-07-28 19:12:28 +00:00
Zachary Turner 199f48a5f0 Get rid of IMsfStreamData class.
This was a pure virtual base class whose purpose was to abstract
away the notion of how you retrieve the layout of a discontiguous
stream of blocks in an Msf file.  This led to too many layers of
abstraction making it difficult to figure out what was going on
and extend things.  Ultimately, a stream's layout is decided by
its length and the array of block numbers that it lives on.  So
rather than have an abstract base class which can return this in
any number of ways, it's more straightforward to simply store them
as fields of a trivial struct, and also to give a more appropriate
name.

This patch does that.  It renames IMsfStreamData to MsfStreamLayout,
and deletes the 2 concrete implementations, DirectoryStreamData
and IndexedStreamData.  MsfStreamLayout is a trivial struct
with the necessary data.

llvm-svn: 277018
2016-07-28 19:11:09 +00:00
Matthias Braun 941a705b7b MachineFunction: Return reference for getFrameInfo(); NFC
getFrameInfo() never returns nullptr so we should use a reference
instead of a pointer.

llvm-svn: 277017
2016-07-28 18:40:00 +00:00
Reid Kleckner 84149c45bf Fix dangling reference to temporary in use of ArrayRef
Fixes tests locally for me with MSVC 2015.

llvm-svn: 277015
2016-07-28 18:17:01 +00:00
John Brawn 2853269224 Revert r276973 "Adjust Registry interface to not require plugins to export a registry"
Buildbot failures when building with clang -Werror. Reverting while I try to
figure this out.

llvm-svn: 277008
2016-07-28 17:17:22 +00:00
Ahmed Bougacha 8550509b64 [AArch64][GlobalISel] Select G_BR.
This is the first unsized instruction we support; move down the
'sized' check to binops.

llvm-svn: 277007
2016-07-28 17:15:15 +00:00
Ahmed Bougacha d760de0b32 [MIRParser] Accept unsized generic instructions.
Since r276158, we require generic instructions to have a sized type.
G_BR doesn't; relax the restriction.

llvm-svn: 277006
2016-07-28 17:15:12 +00:00
Ahmed Bougacha d7748d6491 [AArch64][GlobalISel] Select GPR G_SUB.
llvm-svn: 277003
2016-07-28 16:58:35 +00:00
Ahmed Bougacha 61a7928dde [AArch64][GlobalISel] Select GPR G_AND.
llvm-svn: 277002
2016-07-28 16:58:31 +00:00
Ahmed Bougacha 46c05fc861 [GlobalISel] Remove types on selected insts instead of using LLT().
LLT() has a particular meaning: it's one invalid type. But we really
want selected instructions to have no type whatsoever.

Also verify that types don't linger after ISel, and enable the verifier
on the AArch64 select test.

llvm-svn: 277001
2016-07-28 16:58:27 +00:00
Ahmed Bougacha 07994ec39b [AArch64][GlobalISel] Remove 'alignment' from MIR tests. NFC.
llvm-svn: 277000
2016-07-28 16:58:21 +00:00
Wei Ding 07e03712d3 AMDGPU : Add intrinsics for compare with the full wavefront result
Differential Revision: http://reviews.llvm.org/D22482

llvm-svn: 276998
2016-07-28 16:42:13 +00:00
Sjoerd Meijer 89217f8835 TargetInstrInfo: rename GetInstSizeInBytes to getInstSizeInBytes. NFC
Differential Revision: https://reviews.llvm.org/D22925

llvm-svn: 276997
2016-07-28 16:32:22 +00:00
Daniel Sanders b23005ead4 [mips] Fix a warning that occurs on some gcc 4.9.2's but not all of them.
llvm-svn: 276993
2016-07-28 15:59:06 +00:00
Daniel Sanders 6e74651658 Revert r276982 and r276984: [mips][fastisel] Handle 0-4 arguments without SelectionDAG
It seems that the stack offset in callabi.ll varies between machines. I'll look
into it.

llvm-svn: 276989
2016-07-28 15:37:42 +00:00
Craig Topper 7e27885f69 [X86] Remove CustomInserter for FMA3 instructions. Looks like since we got full commuting support for FMAs after this was added, the coalescer can now get this right on its own.
Differential Revision: https://reviews.llvm.org/D22799

llvm-svn: 276987
2016-07-28 15:28:56 +00:00
Daniel Sanders 313755d9ef [mips] Reword debug message as should have been done before committing r276982
llvm-svn: 276984
2016-07-28 15:13:23 +00:00
Daniel Sanders e0b529f619 [mips][fastisel] Handle 0-4 arguments without SelectionDAG.
Summary:
Implements fastLowerArguments() to avoid the need to fall back on
SelectionDAG for 0-4 argument functions that don't do tricky things like
passing double in a pair of i32's.

This allows us to move all except one test to -fast-isel-abort=3. The
remaining one has function prototypes of the form 'i32 (i32, double, double)'
which requires floats to be passed in GPR's.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: https://reviews.llvm.org/D22680

llvm-svn: 276982
2016-07-28 14:55:28 +00:00
Tom Stellard 19f4301099 AMDGPU/SI: Don't use reserved VGPRs for SGPR spilling
Summary:
We were using reserved VGPRs for SGPR spilling and this was causing
some programs with a workgroup size of 1024 to use more than 64
registers, which is illegal.

Reviewers: arsenm, mareko, nhaehnle

Subscribers: nhaehnle, arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D22032

llvm-svn: 276980
2016-07-28 14:30:43 +00:00
Simon Pilgrim b1d31ea6bb Removed unused variables
llvm-svn: 276975
2016-07-28 13:42:57 +00:00
Simon Pilgrim 3080dbcc7c Fix signed/unsigned warning.
llvm-svn: 276974
2016-07-28 13:29:56 +00:00
John Brawn 778c3c6c61 Reapply r276856 "Adjust Registry interface to not require plugins to export a registry"
This version has two fixes compared to the original:
 * In Registry.h the template static members are instantiated before they are
   used, as clang gives an error if you do it the other way around.
 * The use of the Registry template in clang-tidy is updated in the same way as
   has been done everywhere else.

Original commit message:

Currently the Registry class contains the vestiges of a previous attempt to
allow plugins to be used on Windows without using BUILD_SHARED_LIBS, where a
plugin would have its own copy of a registry and export it to be imported by
the tool that's loading the plugin. This only works if the plugin is entirely
self-contained with the only interface between the plugin and tool being the
registry, and in particular this conflicts with how IR pass plugins work.

This patch changes things so that instead the add_node function of the registry
is exported by the tool and then imported by the plugin, which solves this
problem and also means that instead of every plugin having to export every
registry they use instead LLVM only has to export the add_node functions. This
allows plugins that use a registry to work on Windows if
LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is used.

llvm-svn: 276973
2016-07-28 12:48:17 +00:00
Nicolai Haehnle 3b572002a2 AMDGPU: add execfix flag to SI_ELSE
Summary:
SI_ELSE is lowered into two parts:

s_or_saveexec_b64 dst, src (at the start of the basic block)

s_xor_b64 exec, exec, dst (at the end of the basic block)

The idea is that dst contains the exec mask of the preceding IF block. It can
happen that SIWholeQuadMode decides to switch from WQM to Exact mode inside
the basic block that contains SI_ELSE, in which case it introduces an instruction

s_and_b64 exec, exec, s[...]

which masks out bits that can correspond to both the IF and the ELSE paths.
So the resulting sequence must be:

s_or_savexec_b64 dst, src

s_and_b64 exec, exec, s[...] <-- added by SIWholeQuadMode
s_and_b64 dst, dst, exec <-- added by SILowerControlFlow

s_xor_b64 exec, exec, dst

Whether to add the additional s_and_b64 dst, dst, exec is currently determined
via the ExecModified tracking. With this change, it is instead determined by
an additional flag on SI_ELSE which is set by SIWholeQuadMode.

Finally: It also occured to me that an alternative approach for the long run
is for SILowerControlFlow to unconditionally emit

s_or_saveexec_b64 dst, src

...

s_and_b64 dst, dst, exec
s_xor_b64 exec, exec, dst

and have a pass that detects and cleans up the "redundant AND with exec"
pattern where possible. This could be useful anyway, because we also add
instructions

s_and_b64 vcc, exec, vcc

before s_cbranch_scc (in moveToALU), and those are often redundant. I have
some pending changes to how KILL is lowered that could also benefit from
such a cleanup pass.

In any case, this current patch could help in the short term with the whole
ExecModified business.

Reviewers: tstellarAMD, arsenm

Subscribers: arsenm, llvm-commits, kzhuravl

Differential Revision: https://reviews.llvm.org/D22846

llvm-svn: 276972
2016-07-28 11:39:24 +00:00
Vassil Vassilev fe68d81709 [modules] Add missing includes.
llvm-svn: 276970
2016-07-28 10:26:33 +00:00
Daniel Jasper 5e9e365725 Remove two tests added in r276957.
These loop from 0 to AEK_XSCALE, which is currently defined as 0x80000000, and
thus the tests loop over the entire int range, which is unreasonable
and also too slow in debug builds.

llvm-svn: 276969
2016-07-28 09:54:35 +00:00
Sylvestre Ledru 0455cbe67c fix some typos in the doc
llvm-svn: 276968
2016-07-28 09:28:58 +00:00
Zijiao Ma 726301bca2 R276957 broke bot clang-ppc64be-linux-multistage,try to fix it.
llvm-svn: 276966
2016-07-28 07:29:45 +00:00
David Majnemer 19d024b2fd [ConstantFolding] Don't bail on folding if ConstantFoldConstantExpression fails
When folding an expression, we run ConstantFoldConstantExpression on
each operand of that expression.
However, ConstantFoldConstantExpression can fail and retur nullptr.

Previously, we would bail on further refining the expression.
Instead, use the original operand and see if we can refine a later
operand.

llvm-svn: 276959
2016-07-28 06:39:48 +00:00
Zijiao Ma e56a53a9b3 Add unittests to {ARM | AArch64}TargetParser.
Add unittest to {ARM | AArch64}TargetParser,and by the way correct problems as below:
1.Correct a incorrect indexing problem in AArch64TargetParser. The architecture enumeration
 is shared across ARM and AArch64 in original implementation.But In the code,I just used the
 index which was offset by the ARM, and this would index into the array incorrectly. To make
 AArch64 has its own arch enum,or we will do a lot of slowly iterating.
2.Correct a spelling error. The parameter of llvm::AArch64::getArchExtName.
3.Correct a writing mistake, in llvm::ARM::parseArchISA.

Differential Revision: https://reviews.llvm.org/D21785

llvm-svn: 276957
2016-07-28 06:11:18 +00:00
David Majnemer 67f684e18e [CodeView] Don't crash on functions without subprograms
A function may have instructions annotated with debug info without
having a subprogram.

This fixes PR28747.

llvm-svn: 276956
2016-07-28 05:03:22 +00:00
David Majnemer 6e9b47bc8a Add EP_CGSCCOptimizerLate extension point to PassManagerBuilder
The EP_CGSCCOptimizerLate extension point allows adding CallGraphSCC
passes at the end of the main CallGraphSCC passes and before any
function simplification passes run by CGPassManager.

Patch by Gor Nishanov!

Differential Revision: https://reviews.llvm.org/D22897

llvm-svn: 276953
2016-07-28 03:28:43 +00:00
David Majnemer 0be7155350 [InstCombine] Handle failures from ConstantFoldConstantExpression
ConstantFoldConstantExpression returns null when folding fails.

This fixes PR28745.

llvm-svn: 276952
2016-07-28 02:29:06 +00:00
Matt Arsenault edc7dcb2aa AMDGPU: Turn dead checks into asserts
llvm-svn: 276946
2016-07-28 00:32:05 +00:00
Matt Arsenault fe26775992 AMDGPU: Remove analyzeImmediate
This no longer uses the more complicated classification
of constants.

llvm-svn: 276945
2016-07-28 00:32:02 +00:00
Wei Mi 315bb33f27 Fix the assertion error in collectLoopUniforms caused by empty Worklist before expanding.
Contributed-by: David Callahan

Differential Revision: https://reviews.llvm.org/D22886

llvm-svn: 276943
2016-07-27 23:53:58 +00:00
Justin Lebar 45bcdcbefb Don't invoke getName() from Function::isIntrinsic().
Summary:
getName() involves a hashtable lookup, so is expensive given how
frequently isIntrinsic() is called.  (In particular, many users cast to
IntrinsicInstr or one of its subclasses before calling
getIntrinsicID().)

This has an incidental functional change: Before, isIntrinsic() would
return true for any function whose name started with "llvm.", even if it
wasn't properly an intrinsic.  The new behavior seems more correct to
me, because it's strange to say that isIntrinsic() is true, but
getIntrinsicId() returns "not an intrinsic".

Some callers want the old behavior -- they want to know whether the
caller is a recognized intrinsic, or might be one in some other version
of LLVM.  For them, we added Function::hasLLVMReservedName(), which
checks whether the name starts with "llvm.".

This change is good for a 1.5% e2e speedup compiling a large Eigen
benchmark.

Reviewers: bogner

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D22065

llvm-svn: 276942
2016-07-27 23:46:57 +00:00
Michael Zolotukhin ff5ce639de Add verifyAnalysis for LCSSA.
Summary:
LCSSAWrapperPass currently doesn't override verifyAnalysis method, so pass
manager doesn't verify LCSSA. This patch adds the method so that we start
verifying LCSSA between loop passes.

Reviewers: chandlerc, sanjoy, hfinkel

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22888

llvm-svn: 276941
2016-07-27 23:35:53 +00:00
George Burgess IV dbd35c44d4 [CFLAA] Add getModRefBehavior to CFLAnders.
This patch lets CFLAnders respond to mod-ref queries. It also includes
a small bugfix to CFLSteens.

Patch by Jia Chen.

Differential Revision: https://reviews.llvm.org/D22823

llvm-svn: 276939
2016-07-27 23:07:07 +00:00
Justin Lebar 37f4e0e096 [LSV] Use Instruction*s rather than Value*s where possible.
Summary:
Given the crash in D22878, this patch converts the load/store vectorizer
to use explicit Instruction*s wherever possible.  This is an overall
simplification and should be an improvement in safety, as we have fewer
naked cast<>s, and now where we use Value*, we really mean something
different from Instruction*.

This patch also gets rid of some cast<>s around Value*s returned by
Builder.  Given that Builder constant-folds everything, we can't assume
much about what we get out of it.

One downside of this patch is that we have to copy our chain before
calling propagateMetadata.  But I don't think this is a big deal, as our
chains are very small (usually 2 or 4 elems).

Reviewers: asbirlea

Subscribers: mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22887

llvm-svn: 276938
2016-07-27 23:06:00 +00:00
Justin Lebar 58b377e87d [LVI] Use DenseMap::find_as in LazyValueInfo.
Summary:
This lets us avoid creating and destroying a CallbackVH every time we
check the cache.

This is good for a 2% e2e speedup when compiling one of the large Eigen
tests at -O3.

FTR, I tried making the ValueCache hashtable one-level -- i.e., mapping
a pair (Value*, BasicBlock*) to a lattice value, and that didn't seem to
provide any additional improvement.  Saving a word in LVILatticeVal by
merging the Tag and Val fields also didn't yield a speedup.

Reviewers: reames

Subscribers: llvm-commits

Differential Revision: http://reviews.llvm.org/D21951

llvm-svn: 276926
2016-07-27 22:33:36 +00:00
Vedant Kumar fc07e8b428 [llvm-cov] Add a debug mode for source range highlighting (in html)
llvm-cov's `-dump' option now emits information which helps debug source
range highlighting in html mode.

llvm-svn: 276924
2016-07-27 21:57:15 +00:00
Justin Lebar 23a9686011 [LSV] Don't assume that bitcast ops are Instructions.
Summary:
When we ask the builder to create a bitcast on a constant, we get back a
constant, not an instruction.

Reviewers: asbirlea

Subscribers: jholewinski, mzolotukhin, llvm-commits, arsenm

Differential Revision: https://reviews.llvm.org/D22878

llvm-svn: 276922
2016-07-27 21:45:48 +00:00
Krzysztof Parzyszek 06a2b6b1ee [Hexagon] Find speculative loop preheader in hardware loop generation
Before adding a new preheader block, check if there is a candidate block
where the loop setup could be placed speculatively. This will be off by
default.

llvm-svn: 276919
2016-07-27 21:20:54 +00:00
Michael Kuperstein e7605e28f9 [X86] Factor out another piece of the SAD combine. NFCI.
llvm-svn: 276918
2016-07-27 20:59:51 +00:00
Krzysztof Parzyszek dc42164e39 [Hexagon] Add option to bisect spill slot optimization
llvm-svn: 276917
2016-07-27 20:58:43 +00:00
Krzysztof Parzyszek 5241b8efcf [Hexagon] Do not optimize volatile stack spill slots
llvm-svn: 276916
2016-07-27 20:50:42 +00:00
Hans Wennborg 94872ff11c build_llvm_package.bat: try tests three times
Sometimes they're flaky on Windows, and starting the whole thing
over is painful.

llvm-svn: 276913
2016-07-27 20:38:01 +00:00
Matt Masten f5f7d1e878 test commit
llvm-svn: 276911
2016-07-27 20:22:21 +00:00
Kyle Butt 9b6d99b250 Codegen: IfConversion: Factor out a function to count dup instrs.
Factor out countDuplicatedInstructions to Count duplicated instructions at the
beginning and end of a diamond pattern. This is in prep for adding support for
diamonds that need to be tail-merged.

llvm-svn: 276910
2016-07-27 20:19:33 +00:00
Kyle Butt 59f2a2a441 Codegen: IfConversion: add const qualifier. NFC
Add a const qualifier to ReverseBranchCondition.

llvm-svn: 276909
2016-07-27 20:19:31 +00:00
Vedant Kumar 7a2c40cb66 Revert "[llvm-cov] Minor aesthetic improvements for html reports"
This reverts commit r276906. It breaks tests.

llvm-svn: 276908
2016-07-27 19:59:44 +00:00
Vedant Kumar ee11748650 [llvm-cov] Minor aesthetic improvements for html reports
This fixes the highlighting for lines without any coverage segments. I
don't have a neat way of testing this yet, but am working on it.

llvm-svn: 276906
2016-07-27 19:51:17 +00:00
Nirav Dave e67c14660b Initialize PreserveAsmComments in MCTargetOptions
llvm-svn: 276905
2016-07-27 19:19:13 +00:00
Krzysztof Parzyszek fae7986bf3 [Hexagon] Handle extended versions of restore routines
llvm-svn: 276903
2016-07-27 18:47:25 +00:00
Duncan P. N. Exon Smith 1723821d17 CodeGen: Make iterator-to-pointer conversion explicit, NFC
Remove the implicit conversion from MachineInstrBundleIterator to
MachineInstr*, leaving behind an explicit conversion.

I *think* this is the last ilist_iterator-related implicit conversion to
ilist_node subclass.  If I'm right, I can finally dig in and fix the UB
in ilist that these conversions were relying on.

Note that the implicit users of this conversion have already been
removed.  If you have out-of-tree code that doesn't update, you might be
able to buy some time by temporarily reverting this commit.

llvm-svn: 276902
2016-07-27 18:45:18 +00:00
David Majnemer 22039e6858 Fix the build for libstdc++ 4.7
libstdc++ 4.7 doesn't have emplace.  Use std::map::insert instead.

llvm-svn: 276901
2016-07-27 18:25:12 +00:00
Duncan P. N. Exon Smith e921088c71 XCore: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr*, mainly by preferring MachineInstr& over MachineInstr*.

llvm-svn: 276899
2016-07-27 18:14:38 +00:00
Andrew Kaylor 9155354ff2 Revert EH-specific checks in BranchFolding that were causing blow ups in compile time.
Differential Revision: https://reviews.llvm.org/D22839

llvm-svn: 276898
2016-07-27 17:55:33 +00:00
Tim Northover 8d2f52e035 GlobalISel: support zero-sized allocas
All allocas must be at least 1 byte at the MachineIR level so we allocate just
one byte.

llvm-svn: 276897
2016-07-27 17:47:54 +00:00
Nirav Dave 06a99a46e2 [MC][X86] Fix Intel Operand assembly parsing for .set ids
Fix intel syntax special case identifier operands that refer to a constant
(e.g. .set <ID> n) to be interpreted as immediate not memory in parsing.

Reviewers: rnk

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22585

llvm-svn: 276895
2016-07-27 17:39:41 +00:00
Jun Bum Lim a033139cd4 [DSE] Fix bug in updating MadeChange flag
Summary: The MadeChange flag should be ORed to keep the previous result.

Reviewers: mcrosier

Subscribers: mcrosier, llvm-commits

Differential Revision: https://reviews.llvm.org/D22873

llvm-svn: 276894
2016-07-27 17:25:20 +00:00
Krzysztof Parzyszek a34d639549 [Hexagon] Add saved callee-saved registers as live-in in non-wrapped blocks
The callee-saved registers that are saved in a function are not pristine,
and so they can be defined and used. In case of shrink-wrapping though,
there are blocks that are outside of the save/restore range, and in those
blocks the saved registers must be treated as pristine. To avoid any uses
of these registers, add them as live-in in all those blocks.
This was already done for blocks reaching function exits after restore,
add code that does the same for blocks reached from the function entry
before save.

llvm-svn: 276886
2016-07-27 16:26:39 +00:00
Daniel Berlin 271ca40118 Make bugpoint transform conditional jumps into unconditional jumps.
Summary:
Add a pass to bugpoint to make it transform conditional jumps into unconditional jumps.

Often, bugpoint generates output that has large numbers of br undef jumps, where
one side is dead.

What is happening is two fold:
1. It never tries to just pick a direction for the jump, and just see what happens
<<<< this patch

2. SimplifyCFG no longer is a good match for bugpoint's usecase. It
does too much.
Even things in SimplifyCFG, like removeUnreachableBlocks, go to great
lengths to transform undefined behavior into  blocks and kill large
parts of the CFG.  This is great for regular code, not so much for
bugpoint, which often generates UB on purpose (store undef is a great
example).
<<<< a followup patch that is coming, to move simplifycfg into a
separate reduction pass, and move the existing reduceCrashingBlocks
pass to use simpleSimplifyCFG.

Both of these patches significantly reduce the size and complexity of bugpoint
generated testcases.

Reviewers: chandlerc, majnemer

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D22841

llvm-svn: 276884
2016-07-27 16:13:25 +00:00
Reid Kleckner 46cb48c74a Remove MCAsmInfo.h include from TargetOptions.h
TargetOptions wants the ExceptionHandling enum. Move that to
MCTargetOptions.h to avoid transitively including Dwarf.h everywhere in
clang. Now you can add a DWARF tag without a full rebuild of clang
semantic analysis.

llvm-svn: 276883
2016-07-27 16:03:57 +00:00
Simon Pilgrim 7efafbc583 [X86][SSE] Updated test so that both are applying the post-multiply
This is to ensure that there are no diffs other than due to buildvector/legalization

llvm-svn: 276882
2016-07-27 15:30:20 +00:00
Diana Picus c65d8bdcf2 Typo fix. NFC
llvm-svn: 276879
2016-07-27 15:13:25 +00:00
Renato Golin 5267d53779 [ARM] Check that the thumb COFF segment flag gets set on thumb windows
Patch by Martin Storsjö.

llvm-svn: 276877
2016-07-27 14:37:18 +00:00
Ahmed Bougacha 6756a2c953 [GlobalISel] Introduce an instruction selector.
And implement it for AArch64, supporting x/w ADD/OR.

Differential Revision: https://reviews.llvm.org/D22373

llvm-svn: 276875
2016-07-27 14:31:55 +00:00
Ahmed Bougacha 5e402eec7b [AArch64] Mark various *Info classes as 'final'. NFC.
llvm-svn: 276874
2016-07-27 14:31:46 +00:00
Ahmed Bougacha b8459d14ef [AArch64] Define AArch64RegisterInfo as a class, not a struct. NFC.
llvm-svn: 276873
2016-07-27 14:31:40 +00:00
Tim Northover 8658b3c393 GlobalISel: remove variable_ops from output list.
The instance in the input operand list allows both inputs and outputs,
but the one in (outs) is not treated specially which leads to the
MachineVerifier invoking UB (looking at an invalid MCInstrDesc field).

No functional change except in UBSan builds (maybe, who knows!), where
it fixes the legalize-add.mir test.

llvm-svn: 276872
2016-07-27 14:30:49 +00:00
Daniel Sanders c5537427c2 [mips][ias] Check '$rs = $rd' constraints when both registers are in AsmText.
Summary:
This is one possible solution to the problem of ignoring constraints that Simon
raised in D21473 but it's a bit of a hack.

The integrated assembler currently ignores violations of the tied register
constraints when the operands involved in a tie are both present in the AsmText.
For example, 'dati $rs, $rt, $imm' with the '$rs = $rt' will silently replace
$rt with $rs. So 'dati $2, $3, 1' is processed as if the user provided
'dati $2, $2, 1' without any diagnostic being emitted.

This is difficult to solve properly because there are multiple parts of the
matcher that are silently forcing these constraints to be met. Tied operands are
rendered to instructions by cloning previously rendered operands but this is
unnecessary because the matcher was already instructed to render the operand it
would have cloned. This is also unnecessary because earlier code has already
replaced the MCParsedOperand with the one it was tied to (so the parsed input
is matched as if it were 'dati <RegIdx 2>, <RegIdx 2>, <Imm 1>'). As a result,
it looks like fixing this properly amounts to a rewrite of the tied operand
handling which affects all targets.

This patch however, merely inserts a checking hook just before the
substitution of MCParsedOperands and the Mips target overrides it. It's not
possible to accurately check the registers are the same this early (because
numeric registers haven't been bound to a register class yet) so it cheats a
bit and checks that the tokens that produced the operand are lexically
identical. This works because tied registers need to have the same register
class but it does have a flaw. It will reject 'dati $4, $a0, 1' for violating
the constraint even though $a0 ends up as the same register as $4.

Reviewers: sdardis

Subscribers: dsanders, llvm-commits, sdardis

Differential Revision: https://reviews.llvm.org/D21994

llvm-svn: 276867
2016-07-27 13:49:44 +00:00
Nemanja Ivanovic 9163ca0fc7 [PowerPC] Fix typo in PPCHazardRecognizers.cpp
Fixes PR28731.

llvm-svn: 276865
2016-07-27 13:24:54 +00:00
Duncan P. N. Exon Smith e5a22f44b8 PowerPC: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleIterator to
MachineInstr* in the PowerPC backend, mainly by preferring MachineInstr&
over MachineInstr* when a pointer isn't nullable and using range-based
for loops.

There was one piece of questionable code in PPCInstrInfo::AnalyzeBranch,
where a condition checked a pointer converted from an iterator for
nullptr.  Since this case is impossible (moreover, the code above
guarantees that the iterator is valid), I removed the check when I
changed the pointer to a reference.

Despite that case, there should be no functionality change here.

llvm-svn: 276864
2016-07-27 13:24:16 +00:00
Teresa Johnson d92012d51c [test/gold] Add gold test subdirectory tests needing v1.12 (or higher)
Summary:
As discussed in the review for D22677, added a subdirectory to
enable tests that require at least version 1.12 of gold.

Add an initial test requiring this version.

Reviewers: davidxl, mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D22827

llvm-svn: 276860
2016-07-27 12:59:51 +00:00
Renato Golin 80e58869f8 [ARM] Set a non-conflicting comment character for assembly in MSVC mode
Currently, for ARMCOFFMCAsmInfoMicrosoft, no comment character is set, thus the
idefault, '#', is used.

The hash character doesn't work as comment character in ARM assembly, since '#'
is used for immediate values.

The comment character is set to ';', which is the comment character used by MS
armasm.exe. (The microsoft armasm.exe uses a different directive syntax than
what LLVM currently supports though, similar to ARM's armasm.)

This allows inline assembly with immediate constants to be built (and brings the
assembly output from clang -S closer to being possible to assemble).

A test is added that verifies that ';' is correctly interpreted as comments in
this mode, and verifies that assembling code that includes literal constants
with a '#' works.

Patch by Martin Storsjö.

llvm-svn: 276859
2016-07-27 12:31:58 +00:00
Renato Golin b9edb5c9b0 [ARM] Adds test for immediate encoding
The encoding of expressions as immediates wasn't correct, and was reported in
PR23000. However, we have done some refactoring on how immediates are handled
and now it seems the problem is fixed. This is a test just to make sure it
won't regress again.

llvm-svn: 276858
2016-07-27 12:15:26 +00:00
John Brawn 3839263204 Revert r276856 "Adjust Registry interface to not require plugins to export a registry"
This is causing a huge pile of buildbot failures.

llvm-svn: 276857
2016-07-27 11:41:18 +00:00
John Brawn 63aff61019 Adjust Registry interface to not require plugins to export a registry
Currently the Registry class contains the vestiges of a previous attempt to
allow plugins to be used on Windows without using BUILD_SHARED_LIBS, where a
plugin would have its own copy of a registry and export it to be imported by
the tool that's loading the plugin. This only works if the plugin is entirely
self-contained with the only interface between the plugin and tool being the
registry, and in particular this conflicts with how IR pass plugins work.

This patch changes things so that instead the add_node function of the registry
is exported by the tool and then imported by the plugin, which solves this
problem and also means that instead of every plugin having to export every
registry they use instead LLVM only has to export the add_node functions. This
allows plugins that use a registry to work on Windows if
LLVM_EXPORT_SYMBOLS_FOR_PLUGINS is used.

Differential Revision: http://reviews.llvm.org/D21385

llvm-svn: 276856
2016-07-27 11:18:38 +00:00
Simon Pilgrim 10bf0ff879 [DAGCombiner] Use APInt directly to detect out of range shift constants
Using getZExtValue() will assert if the value doesn't fit into uint64_t - SHL was already doing this, I've just updated ASHR/LSHR to match

As mentioned on D22726

llvm-svn: 276855
2016-07-27 10:30:55 +00:00
Simon Pilgrim 470b81ca69 Removed unusued template function declaration that has no definition - fixes MSVC warning.
llvm-svn: 276852
2016-07-27 10:11:05 +00:00
Daniel Sanders c8de8cffa1 [mips] Update the link to the MIPS documentation in CompilerWriterInfo.rst.
llvm-svn: 276850
2016-07-27 08:52:15 +00:00
Sjoerd Meijer 5e11a18f5a [MBP] Added some more debug messages and some clean ups /NFC
Differential Revision: https://reviews.llvm.org/D22669

llvm-svn: 276849
2016-07-27 08:49:23 +00:00
Sean Silva 285e0974f0 Refactor - CodeExtractor : Move check for valid block to static utility
This lets you actually check to see if a block is valid before trying to
extract.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22699

llvm-svn: 276846
2016-07-27 08:02:46 +00:00
George Burgess IV 9cf05464aa [GVNHoist] Fix typo in assert.
This fixes PR28730.

llvm-svn: 276844
2016-07-27 06:34:53 +00:00
Mehdi Amini be1cb22587 Fix Coroutines doc example
SSA was broken.

llvm-svn: 276843
2016-07-27 06:03:47 +00:00
Davide Italiano 7c9fc738b1 [MC] Add command-line option to choose the max nest level in asm macros.
Submitted by: t83wCSLq
Differential Revision:  https://reviews.llvm.org/D22313

llvm-svn: 276842
2016-07-27 05:51:56 +00:00
Sebastian Pop 55c3007b88 GVN-hoist: improve code generation for recursive GEPs
When loading or storing in a field of a struct like "a.b.c", GVN is able to
detect the equivalent expressions, and GVN-hoist would fail in the code
generation.  This is because the GEPs are not hoisted as scalar operations to
avoid moving the GEPs too far from their ld/st instruction when the ld/st is not
movable.  So we end up having to generate code for the GEP of a ld/st when we
move the ld/st.  In the case of a GEP referring to another GEP as in "a.b.c" we
need to code generate all the GEPs necessary to make all the operands available
at the new location for the ld/st.  With this patch we recursively walk through
the GEP operands checking whether all operands are available, and in the case of
a GEP operand, it recursively makes all its operands available. Code generation
happens from the inner GEPs out until reaching the GEP that appears as an
operand of the ld/st.

Differential Revision: https://reviews.llvm.org/D22599

llvm-svn: 276841
2016-07-27 05:48:12 +00:00
Sebastian Pop 586d3eaeb5 GVN-hoist: use DFS numbers instead of walking the instruction stream
The patch replaces a function that walks the IR with a call to firstInBB() that
uses the DFS numbering.  NFC.

Differential Revision: https://reviews.llvm.org/D22809

llvm-svn: 276840
2016-07-27 05:13:52 +00:00
David Majnemer 7855719c10 [coroutines] Part 2 of N: Adding Coroutine Intrinsics
This is the second patch in the coroutine series. It adds coroutine
intrinsics and updates intrinsic cost in TargetTransformInfoImpl.h.

Patch by Gor Nishanov!

Differential Revision: https://reviews.llvm.org/D22659

llvm-svn: 276839
2016-07-27 05:12:35 +00:00
Sebastian Pop 18c964d7a4 add a verbose mode to Loop->print() to print all the basic blocks of a loop
Differential Revision: https://reviews.llvm.org/D22817

llvm-svn: 276838
2016-07-27 05:02:17 +00:00
Sebastian Pop 9570bfd349 add function isLoopLatch
Differential Revision: https://reviews.llvm.org/D22817

llvm-svn: 276837
2016-07-27 05:02:15 +00:00
Sebastian Pop 57a127a7d1 refactor code in verifyLoop: NFC.
Use std::any_of as requested in https://reviews.llvm.org/D22816

llvm-svn: 276835
2016-07-27 04:36:06 +00:00
Vedant Kumar 90be9db7d9 [llvm-cov] Escape '\' in strings when emitting JSON
Test that Windows path separators are escaped properly. Add a round-trip
test to verify the JSON produced by the exporter.

llvm-svn: 276832
2016-07-27 04:08:32 +00:00
Sebastian Pop e5730a27f2 Move assert as early as possible
Patch written by Aditya Kumar.

Differential Revision: https://reviews.llvm.org/D22816

llvm-svn: 276830
2016-07-27 03:30:11 +00:00
Andrew Wilkins 5bf7d8102d [llvm-go] parameterize $GOPATH construction
Summary:
To build llgo, you must currently ensure that llgo
is in the tools/llgo directory, due to a hard-coded
path in llvm-go.

To support the use of LLVM_EXTERNAL_LLGO_SOURCE_DIR,
we introduce a flag to llvm-go that enables the
caller to specify the paths to symlink in the
temporary $GOPATH.

Reviewers: pcc

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D21634

llvm-svn: 276829
2016-07-27 03:21:51 +00:00
David Majnemer bc36b15253 [ConstantFolding] Correctly handle failures in ConstantFoldConstantExpressionImpl
Failures in ConstantFoldConstantExpressionImpl were ignored causing
crashes down the line.

This fixes PR28725.

llvm-svn: 276827
2016-07-27 02:39:16 +00:00
Andrew Kaylor f990fa5f7b Reverting r276771 due to MSan failures.
llvm-svn: 276824
2016-07-27 01:19:24 +00:00
Matt Arsenault e3862cdc93 AMDGPU: Use rcp for fdiv 1, x with fpmath metadata
Using rcp should be OK for safe math usually, so this
should not be replacing the original fdiv.

llvm-svn: 276823
2016-07-26 23:25:44 +00:00
Hans Wennborg 685e8ff953 Revert r276136 "Use ValueOffsetPair to enhance value reuse during SCEV expansion."
It causes Clang tests to fail after Windows self-host (PR28705).

(Also reverts follow-up r276139.)

llvm-svn: 276822
2016-07-26 23:25:13 +00:00
Matt Arsenault 918e81c3d4 AMDGPU: Add more tests for LDS size with occupancy
llvm-svn: 276821
2016-07-26 23:15:59 +00:00
Vedant Kumar 90f1b8278e [docs] Fix a sphinx error in llvm-cov.rst
Failing bot:

  http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/12025

Fix tested with `ninja docs-llvm-html`.

llvm-svn: 276820
2016-07-26 23:09:57 +00:00
Matt Arsenault c6b69a9114 AMDGPU: Use implicit_def for selecting anyext
llvm-svn: 276819
2016-07-26 23:06:33 +00:00
Vedant Kumar 7101d73c71 Retry: [llvm-cov] Add support for exporting coverage data to JSON
This enables users to export coverage information as portable JSON for use by
analysis tools and storage in document based databases.

The export sub-command is invoked just like the others:

  llvm-cov export -instr-profile path/to/foo.profdata path/to/foo.binary

The resulting JSON contains a list of files and functions. Every file object
contains a list of segments, expansions, and a summary of the file's region,
function, and line coverage. Every function object contains the function's name
and regions. There is also a total summary for the entire object file.

Changes since the initial commit (r276813):

  - Fixed the regexes in the tests to handle Windows filepaths.

Patch by Eddie Hurtig!

Differential Revision: https://reviews.llvm.org/D22651

llvm-svn: 276818
2016-07-26 22:50:58 +00:00
Peter Collingbourne a333db87a7 docs: Add reference to type metadata to langref.
llvm-svn: 276817
2016-07-26 22:31:30 +00:00
Vedant Kumar e85353b849 Revert "[llvm-cov] Add support for exporting coverage data to JSON"
This reverts commit r276813. The Windows bots are complaining about some
of the filename regexes in the tests:

  http://bb.pgr.jp/builders/ninja-clang-i686-msc19-R/builds/5299

llvm-svn: 276816
2016-07-26 21:55:39 +00:00
Matthias Braun 333e468d15 MIRParser: Use dot instead of colon to mark subregisters
Change the syntax to use `%0.sub8` to denote a subregister.

This seems like a more natural fit to denote subregisters; I also plan
to introduce a new ":classname" syntax in upcoming patches to denote the
register class of a vreg.

Note that this commit disallows plain identifiers to start with a '.'
character.  This shouldn't affect anything as external names/IR
references are all prefixed with '$'/'%', plain identifiers are only
used for instruction names, register mask names and subreg indexes.

Differential Revision: https://reviews.llvm.org/D22390

llvm-svn: 276815
2016-07-26 21:49:34 +00:00
Vedant Kumar d5b7436c1f [llvm-cov] Add support for exporting coverage data to JSON
This enables users to export coverage information as portable JSON for use by
analysis tools and storage in document based databases.

The export sub-command is invoked just like the others:

  llvm-cov export -instr-profile path/to/foo.profdata path/to/foo.binary

The resulting JSON contains a list of files and functions. Every file object
contains a list of segments, expansions, and a summary of the file's region,
function, and line coverage. Every function object contains the function's name
and regions. There is also a total summary for the entire object file.

Patch by Eddie Hurtig!

Differential Revision: https://reviews.llvm.org/D22651

llvm-svn: 276813
2016-07-26 21:35:43 +00:00
Sanjoy Das 77a9c7949d Fix docs/Coroutines.rst syntax highlighting on Linux
Summary:
s/code-block:: C++/code-block:: c++ in docs/Coroutines.rst .

Patch by Gor Nishanov!  Edited by Sanjoy to fix a missing s/C/c/.

Reviewers: sanjoy, rengolin

Differential Revision: https://reviews.llvm.org/D22832

llvm-svn: 276806
2016-07-26 21:03:41 +00:00
Matt Arsenault 60a750fa69 AMDGPU/R600: Remove dead custom inserters
The intrinsics for these were removed, so this is dead.

llvm-svn: 276805
2016-07-26 21:03:38 +00:00
Matt Arsenault b06db8f666 AMDGPU: Minor AsmPrinter cleanups
llvm-svn: 276804
2016-07-26 21:03:36 +00:00
Krzysztof Parzyszek 2a480599bb [Hexagon] Post-increment loads/stores enhancements
- Generate vector post-increment stores more aggressively.
- Predicate post-increment and vector stores in early if-conversion.

llvm-svn: 276800
2016-07-26 20:30:30 +00:00
Tim Northover ad2b717f2c GlobalISel: add generic load and store instructions.
Pretty straightforward, the only oddity is the MachineMemOperand (which it's
surprisingly difficult to share code for).

llvm-svn: 276799
2016-07-26 20:23:26 +00:00
Michael Kuperstein 2dc08f7df8 [X86] Split out absdiff detection from SAD combine. NFC.
Preparation for supporting PSADBW emission for straight-line code.

llvm-svn: 276798
2016-07-26 20:01:29 +00:00
Krzysztof Parzyszek 57c3ddddec [Hexagon] Gracefully handle reg class mismatch in HexagonLoopReschedule
llvm-svn: 276793
2016-07-26 19:17:13 +00:00
Krzysztof Parzyszek 6eba5b8c37 [Hexagon] Rerun bit tracker on new instructions in RIE
Consider this case:
  vreg1 = A2_zxth vreg0   (1)
  ...
  vreg2 = A2_zxth vreg1   (2)

Redundant instruction elimination could delete the instruction (1)
because the user (2) only cares about the low 16 bits. Then it could
delete (2) because the input is already zero-extended. The problem
is that the properties allowing each individual instruction to be
deleted depend on the existence of the other instruction, so either
one can be deleted, but not both.
The existing check for this situation in RIE was insufficient. The
fix is to update all dependent cells when an instruction is removed
(replaced via COPY) in RIE.

llvm-svn: 276792
2016-07-26 19:08:45 +00:00
Krzysztof Parzyszek 79a4fbc2f5 Add link to the Hexagon documentation
llvm-svn: 276788
2016-07-26 18:40:25 +00:00
Krzysztof Parzyszek 1adca30c39 [Hexagon] Bitwise operations for insert/extract word not simplified
Change the bit simplifier to generate REG_SEQUENCE instructions in
addition to COPY, which will handle cases of word insert/extract.

llvm-svn: 276787
2016-07-26 18:30:11 +00:00
Justin Lebar 16da82f4d2 Fix NVPTX/call-with-alloca-buffer.ll after r276777.
r276777 makes InstSimplify stronger, letting it see through some
unnecessary addrspace casts.

llvm-svn: 276786
2016-07-26 18:28:33 +00:00
Matthias Braun ee0679207b MIRParser: Use shorter cfi identifiers
In an instruction like:
	CFI_INSTRUCTION .cfi_def_cfa ...
we can drop the '.cfi_' prefix since that should be obvious by the
context:
	CFI_INSTRUCTION def_cfa ...

While being a terser and cleaner syntax this also prepares to dropping
support for identifiers starting with a dot character so we can use it
for expressions.

Differential Revision: http://reviews.llvm.org/D22388

llvm-svn: 276785
2016-07-26 18:20:00 +00:00
Davide Italiano f17d48e58a [MC] Don't crash when trying to emit a relocation against .bss.
Turn that into an error instead.

llvm-svn: 276783
2016-07-26 18:16:33 +00:00
Bruno Cardoso Lopes f8df4d1117 [CMAKE] Find ld64 using xcrun
Given similar reasons from r276710, ld64 scrubs DYLD_* environment if
called from the shim executable /usr/bin/ld.

Add support for finding ld64 via xcrun.

This is needed in order to get LIT to have the full path to the ld4
executable.

Differential Revision: https://reviews.llvm.org/D22791

rdar://problem/24300926

llvm-svn: 276781
2016-07-26 18:09:23 +00:00
David Majnemer 6774d612d4 [InstSimplify] Cast folding can be made more generic
Use isEliminableCastPair to determine if a pair of casts are foldable.

llvm-svn: 276777
2016-07-26 17:58:05 +00:00
Adam Nemet 2f2bd8caf4 [LoopUtils] Sort headers
llvm-svn: 276776
2016-07-26 17:52:02 +00:00
Tim Northover ab395cb071 GlobalISel: add correct operand type to G_FRAME_INDEX instrs.
Frame indices should use "addFrameIndex", not "addImm".

llvm-svn: 276775
2016-07-26 17:42:40 +00:00
Krzysztof Parzyszek 29c567a3f0 [Hexagon] Add support for proper handling of H and L constraints
H -> High part of reg pair.
L -> Low part of reg pair.

Patch by Sundeep Kushwaha.

llvm-svn: 276773
2016-07-26 17:31:02 +00:00
Tim Northover 26e40bdb9b GlobalISel: omit braces on MachineInstr types when there's only one.
Tidies up the representation a bit in the common case.

llvm-svn: 276772
2016-07-26 17:28:01 +00:00
Andrew Kaylor 3104a6bad0 Re-committing r275284: add support to inline __builtin_mempcpy
Patch by Sunita Marathe

Differential Revision: http://reviews.llvm.org/D21920

llvm-svn: 276771
2016-07-26 17:23:13 +00:00
Matt Arsenault 52ef4019fd AMDGPU: Make AMDGPUMachineFunction fields private
ABIArgOffset is a problem because properly fsetting the
KernArgSize requires that the reserved area before the
real kernel arguments be correctly aligned, which requires
fixing clover.

llvm-svn: 276766
2016-07-26 16:45:58 +00:00
Matt Arsenault 07f65718bb AMDGPU: Add missing tests for xnack option for HSA
llvm-svn: 276765
2016-07-26 16:45:50 +00:00
Matt Arsenault 32fc527c65 AMDGPU: Add fp legacy instruction intrinsics
This could use some additional optimization work
to use mad/mac legacy.

llvm-svn: 276764
2016-07-26 16:45:45 +00:00
Tim Northover 756eca35cf GlobalISel: add specialized buildCopy function to MachineInstrBuilder.
NFC.

llvm-svn: 276763
2016-07-26 16:45:30 +00:00
Tim Northover cc5f76226b GlobalISel: give MachineInstrBuilder a uniform interface. NFC.
Instead of an ad-hoc collection of "buildInstr" functions with varying numbers
of registers, this uses variadic templates to provide for as many regs as
needed!

Also make IRtranslator use new "buildBr" function instead of some weird generic
one that no-one else would really use.

llvm-svn: 276762
2016-07-26 16:45:26 +00:00
Daniel Sanders 94ed30a401 [mips] Fix typos in spelling of lowerRETURNADDR.
The first letter was mistakenly capitalized.

llvm-svn: 276753
2016-07-26 14:46:11 +00:00
Krzysztof Parzyszek 3b4682f6ba [Hexagon] Update store offset when not packetizing it with allocframe
When the packetizer wants to put a store to a stack slot in the same
packet with an allocframe, it updates the store offset to reflect the
value of SP before it is updated by allocframe. If the store cannot
be packetized with the allocframe after all, the offset needs to be
updated back to the previous value.

llvm-svn: 276749
2016-07-26 14:24:46 +00:00
Oliver Stannard 1c6e591457 [ARM] Improve error messages for .arch_extension directive
- More informative message when extension name is not an identifier token.
- Stop parsing directive if extension is unknown (avoid duplicate error
  messages).
- Report unsupported extensions with a source location, rather than
  report_fatal_error.

Differential Revision: https://reviews.llvm.org/D22806

llvm-svn: 276748
2016-07-26 14:24:43 +00:00
Oliver Stannard 2171828a49 [ARM] Implement -mimplicit-it assembler option
This option, compatible with gas's -mimplicit-it, controls the
generation/checking of implicit IT blocks in ARM/Thumb assembly.

This option allows two behaviours that were not possible before:
- When in ARM mode, emit a warning when assembling a conditional
  instruction that is not in an IT block. This is enabled with
  -mimplicit-it=never and -mimplicit-it=thumb.
- When in Thumb mode, automatically generate IT instructions when an
  instruction with a condition code appears outside of an IT block. This
  is enabled with -mimplicit-it=thumb and -mimplicit-it=always.

The default option is -mimplicit-it=arm, which matches the existing
behaviour (allow conditional ARM instructions outside IT blocks without
warning, and error if a conditional Thumb instruction is outside an IT
block).

The general strategy for generating IT blocks in Thumb mode is to keep a
small list of instructions which should be in the IT block, and only
emit them when we encounter something in the input which means we cannot
continue the block.  This could be caused by:
- A non-predicable instruction
- An instruction with a condition not compatible with the IT block
- The IT block already contains 4 instructions
- A branch-like instruction (including ALU instructions with the PC as
  the destination), which cannot appear in the middle of an IT block
- A label (branching into an IT block is not legal)
- A change of section, architecture, ISA, etc
- The end of the assembly file.

Some of these, such as change of section and end of file, are parsed
outside of the ARM asm parser, so I've added a new virtual function to
AsmParser to ensure any previously-parsed instructions have been
emitted. The ARM implementation of this flushes the currently pending IT
block.

We now have to try instruction matching up to 3 times, because we cannot
know if the current IT block is valid before matching, and instruction
matching changes depending on the IT block state (due to the 16-bit ALU
instructions, which set the flags iff not in an IT block). In the common
case of not having an open implicit IT block and the instruction being
matched not needing one, we still only have to run the matcher once.

I've removed the ITState.FirstCond variable, because it does not store
any information that isn't already represented by CurPosition. I've also
updated the comment on CurPosition to accurately describe it's meaning
(which this patch doesn't change).

Differential Revision: https://reviews.llvm.org/D22760

llvm-svn: 276747
2016-07-26 14:19:47 +00:00
Daniel Sanders 6151699b08 [lit] Document the 'available_features' member of the config object.
llvm-svn: 276744
2016-07-26 13:23:27 +00:00
Simon Pilgrim 0280959c0d [X86][SSE] Added extra memory folding tests for cvtsd2ss intrinsic
SSE only fold partial reg update instructions when optsize is enabled

llvm-svn: 276743
2016-07-26 12:44:50 +00:00
Simon Pilgrim 019e102426 [X86][SSE] Fixed issue with memory folding of (v)cvtsd2ss intrinsics
Fixed typo in the intrinsic definitions of (v)cvtsd2ss with memory folding.

This was only unearthed when rL276102 started using the intrinsic again.....

llvm-svn: 276740
2016-07-26 10:41:28 +00:00
Simon Dardis 68a204ddc1 [mips] MIPS64R6 compact branch support
MIPS64R6 compact branch support. As the MIPS LLVM backend uses distinct
MachineInstrs for certain 32 and 64 bit instructions (e.g. BEQ & BEQ64) that
map to the same instruction, extend compact branch support for the
corresponding 64bit branches.

Reviewers: dsanders

Differential Revision: https://reviews.llvm.org/D20164

llvm-svn: 276739
2016-07-26 10:25:07 +00:00
Simon Pilgrim 28c7d7093d Fixed spelling in comment
llvm-svn: 276738
2016-07-26 09:55:31 +00:00
Benjamin Kramer 729d361834 [tblgen] Compare const char * with strcmp instead of creating StringRef.
Avoids a call to strlen on both strings which always reads the entire
string. strcmp can use early exit.

llvm-svn: 276737
2016-07-26 09:27:51 +00:00
Simon Dardis 273fc26b79 [mips] sgtu, s[rl]l, sra, dnegu, neg instruction aliases
Add the instruction alias sgtu (register form only), two operand forms of
s[rl]l and sra, and missing single/two operand forms of dnegu/neg.

Reviewers: dsanders

Differential Revision: https://reviews.llvm.org/D22752

llvm-svn: 276736
2016-07-26 09:13:46 +00:00
Craig Topper 79011a660e [X86] Remove isCommutable=1 from instructions that also load. Commuting such instruction isn't useful as it would unfold the load. The exception being FMA3 instructions.
llvm-svn: 276733
2016-07-26 08:06:18 +00:00
Craig Topper 26000f8d90 [AVX512] Don't mark ADDSSZr_Int or MULSSZr_Int as commutable. The intrinsics have one of their arguments indicated as passing through the high bits and we can't commute that.
llvm-svn: 276732
2016-07-26 08:06:14 +00:00
Dimitry Andric fae1cf40bb Remove obsolete XFAIL for a test that used to sometimes miscompile under
FreeBSD with gcc 4.2.1, a long time ago (see r113824).  Noticed by Pete
Cooper.

llvm-svn: 276730
2016-07-26 06:49:14 +00:00
David Majnemer a90a621d1e Reapply: [InstSimplify] Add support for bitcasts"
This reverts commit r276700 and reapplies r276698.
The relevant clang tests have been updated.

llvm-svn: 276727
2016-07-26 05:52:29 +00:00
Amaury Sechet 06ac2f4a7e Propery format doccomment in lto.h . NFC
llvm-svn: 276725
2016-07-26 04:20:30 +00:00
Matthias Braun 3865b1d35b LiveIntervalAnalysis: Fix handleMoveDown() problem
If we move a last-use register read to a later position we may skip
intermediate segments. This may require us to not only extend the
segment before the NewIdx, but also extend the segment live-in to
OldIdx.

This switches LiveIntervalTest to use AMDGPU so we can test subregister
liveness.

llvm-svn: 276724
2016-07-26 03:57:45 +00:00
Tim Northover 884b47ecfd GlobalISel: remove redundant ';'s. NFC
llvm-svn: 276723
2016-07-26 03:29:18 +00:00
Chris Bieneman f3091323bd [CMake] Updating Xcode Toolchain creation to support Xcode 7
Recent changes to Xcode have changed the structure of Xcode toolchains. This patch makes the xcode-toolchain goop construct a new-format Xcode toolchain that is compatible with Xcode 7.

The new format has a compatibility version key, so when a new format comes out we can support multiple formats in parallel.

llvm-svn: 276718
2016-07-26 00:47:52 +00:00
Sebastian Pop 91d4a30159 GVN-hoist: use a DFS numbering of instructions (PR28670)
Instead of DFS numbering basic blocks we now DFS number instructions that avoids
the costly operation of which instruction comes first in a basic block.

Patch mostly written by Daniel Berlin.

Differential Revision: https://reviews.llvm.org/D22777

llvm-svn: 276714
2016-07-26 00:15:10 +00:00
Sebastian Pop 38422b1356 GVN-hoist: limit hoisting depth (PR28670)
This patch adds an option to specify the maximum depth in a BB at which to
consider hoisting instructions.  Hoisting instructions from a deeper level is
not profitable as it increases register pressure and compilation time.

Differential Revision: https://reviews.llvm.org/D22772

llvm-svn: 276713
2016-07-26 00:15:08 +00:00
Evgeniy Stepanov 906f6fb565 [safestack] Fix stack guard live range.
Stack guard slot is live throughout the function.

llvm-svn: 276712
2016-07-26 00:05:14 +00:00
Chris Bieneman f4a56a7d20 [CMake] Support feeding DYLD_LIBRARY_PATH into archiver calls
OS X 10.11 has a feature named System Integrity Protection. The goal of the feature is to make system binaries immutable (even as root). One part of this is that protected binaries do not receive DYLD_* environment variables because the kernel scrubs them before process launch.

This causes problems for LTO bootstrap builds on Darwin that try to use the just-built libLTO with the host ar, ranlib, or libtool.

This patch addresses two problems.

(1) The tools themselves aren't protected binaries but the shim tools installed at / are, so we need to call xcrun -find to find libtool instead of using the one CMake finds.

(2) Some build tools (ninja and make) use /bin/sh to invoke their subprocesses. Since /bin/sh is a system binary, the kernel scrubs the DYLD envars from their environment. To work around this we need to set the environment variables as part of the archiver commands, so the envars are set by the shell process instead of on the shell process.

llvm-svn: 276710
2016-07-25 23:46:08 +00:00
Adam Nemet 39e039c606 [lit] Don't match tool names within new PM's <> markers
For example, stop expanding 'opt' in -passes='require<opt-remark-emit>'.

llvm-svn: 276707
2016-07-25 23:09:10 +00:00
Michael Kuperstein d5617b5545 Attempt to pacify windows bots, again.
llvm-svn: 276703
2016-07-25 22:29:04 +00:00
Renato Golin 32b165f561 [ARM] Saturation instructions are DSP-only
The saturation instructions appeared in v6T2, with DSP extensions, but they
were being accepted / generated on any, with the new introduction of the
saturation detection in the back-end. This commit restricts the usage to
DSP-enable only cores.

Fixes PR28607.

llvm-svn: 276701
2016-07-25 22:25:25 +00:00
David Majnemer 6e06b577cc Revert "[InstSimplify] Add support for bitcasts"
This reverts commit r276698.  Clang has tests which rely on the
optimizer :(

llvm-svn: 276700
2016-07-25 22:24:59 +00:00
David Majnemer 62611fd3f7 [InstSimplify] Add support for bitcasts
BitCasts of BitCasts can be folded away as can BitCasts which don't
change the type of the operand.

llvm-svn: 276698
2016-07-25 22:04:58 +00:00
David Blaikie bef810ff95 [WebAssembly] Update for Target API (TargetRegistry::RegisterMCAsmBackend) change
llvm-svn: 276694
2016-07-25 21:41:42 +00:00
Simon Pilgrim fa863fb2f1 [X86] Regenerate v2i256 shift legalization tests
llvm-svn: 276692
2016-07-25 21:14:22 +00:00
Simon Pilgrim 2d7735e428 [X86] Regenerate i64 shift legalization tests
llvm-svn: 276691
2016-07-25 21:11:45 +00:00
Tim Northover 7c9eba90ff GlobalISel: add generic casts to IRTranslator
This adds LLVM's 3 main cast instructions (inttoptr, ptrtoint, bitcast) to the
IRTranslator. The first two are direct translations (with 2 MachineInstr types
each). Since LLT discards information, a bitcast might become trivial and we
emit a COPY in those cases instead.

llvm-svn: 276690
2016-07-25 21:01:29 +00:00
Tim Northover e2e0067352 GlobalISel[AArch64]: support pointer types in argument lowering.
They're basically i64 for AArch64, but we'll leave them intact for stranger
targets. Also add some tests for the (very few) other cases we can handle right
now.

llvm-svn: 276689
2016-07-25 21:01:17 +00:00
Michael Kuperstein 39feb6290c [PM] Port SymbolRewriter to the new PM
Differential Revision: https://reviews.llvm.org/D22703

llvm-svn: 276687
2016-07-25 20:52:00 +00:00
Kevin Enderby 95b0842e64 Next step along the way to getting good error messages for bad archives.
I consulted with Lang Hames on this work, and the goal was to add a bit
of "where" in the archive the error occurred along with what the error was.

So this step changes ArchiveMemberHeader into a class with a pointer
to the archive header and the parent archive.  Which allows the methods
in the ArchiveMemberHeader to determine which member the header is
for to include that information in the error message.

For this first step the "where" is just the offset to the member in the
archive.  The next step will be a new method on ArchiveMemberHeader
to get the full name, if possible, to be use in the error message.  Which
will now be possible as ArchiveMemberHeader contains a pointer to
the Archive with its string table and its size, etc. so the full name can
be determined from the header if it is valid.

Also this change adds the missing checks the archive header is actually
contained in the buffer and is not truncated, as well as if the terminating
characters are correct in the header.

And changes one error message in Archive::Child::getNext() where the
name or offset to member is now added.

llvm-svn: 276686
2016-07-25 20:36:36 +00:00
Jordan Rose 10697a7c34 Fix r276671 to not use a defaulted move constructor.
MSVC won't provide the body of this move constructor and assignment
operator, possibly because the copy constructor is banned. Just write
it manually.

llvm-svn: 276685
2016-07-25 20:34:25 +00:00
Jan Vesely b64c8925e9 AMDGPU: Remove read_workdim intrinsic
Differential revision: https://reviews.llvm.org/D22732

llvm-svn: 276682
2016-07-25 20:17:02 +00:00
Matt Arsenault 7cddfed7e8 Scalarizer: Support scalarizing intrinsics
llvm-svn: 276681
2016-07-25 20:02:54 +00:00
Matt Arsenault 2fa171c43a AMDGPU: Make skip threshold an option
llvm-svn: 276680
2016-07-25 19:48:29 +00:00
Matt Arsenault e047b2598e AMDGPU: Fix missing verify-machineinstrs in control flow test
llvm-svn: 276679
2016-07-25 19:39:06 +00:00
Matt Arsenault df3e224632 LiveIntervals: Return index from replaceMachineInstrInMaps
Fixes weird asymmetry with insertion

llvm-svn: 276678
2016-07-25 19:39:04 +00:00
Matt Arsenault 892fcd0b02 MachineVerifier: Fix printing nonsense for physical registers
llvm-svn: 276677
2016-07-25 19:39:01 +00:00
Evgeniy Stepanov 8d78bd5041 Fix invalid iterator use in safestack coloring.
llvm-svn: 276676
2016-07-25 19:25:40 +00:00
Matt Arsenault cdae95bef2 AMDGPU: Delete dead code
llvm-svn: 276675
2016-07-25 19:06:25 +00:00
Rong Xu 705f7775bb [PGO] Fix profile mismatch in COMDAT function with pre-inliner
Pre-instrumentation inline (pre-inliner) greatly improves the IR
instrumentation code performance, among other benefits. One issue of the
pre-inliner is it can introduce CFG-mismatch for COMDAT functions. This
is due to the fact that the same COMDAT function may have different early
inline decisions across different modules -- that means different copies
of COMDAT functions will have different CFG checksum.

In this patch, we propose a partially renaming the COMDAT group and its
member function/variable so we have different profile counter for each
version. We will post-fix the COMDAT function and the group name with its
FunctionHash.

Differential Revision: http://reviews.llvm.org/D22600

llvm-svn: 276673
2016-07-25 18:45:37 +00:00
Michael Kuperstein 9a89b15aa2 Attempt to pacify windows bots.
llvm-svn: 276672
2016-07-25 18:39:08 +00:00
Jordan Rose f85a95fdcb StringSwitch cannot be copied (take 2).
This prevents StringSwitch from being used with 'auto', which is
important because the inferred type is StringSwitch rather than the
result type. This is a problem because StringSwitch stores addresses
of temporary values rather than copying or moving the value into its
own storage.

This is a compromise that still allows wrapping StringSwitch in other
temporary structures, which (unlike StringSwitch) may be non-trivial
to set up and therefore want to at least be movable. (For an example,
see QueryParser.cpp in clang-tools-extra.)

Changing this uncovered the bug in PassBuilder, also in this patch.
Clang doesn't seem to have any occurrences of the issue.

Re-commit of r276652.

llvm-svn: 276671
2016-07-25 18:34:51 +00:00
Daniel Berlin 40765a62ad Revert NewGVN N^2 behavior patch
llvm-svn: 276670
2016-07-25 18:19:49 +00:00
Zachary Turner 336e919b01 Add a modulemap for LLVMDebugInfoMsf.
Differential Revision: https://reviews.llvm.org/D22769

llvm-svn: 276669
2016-07-25 18:18:59 +00:00
Michael Kuperstein 8f8e1d1bf6 Don't use iplist in SymbolRewriter. NFC.
There didn't appear to be a good reason to use iplist in this case, a regular
list of unique_ptr works just as well.
Change made in preparation to a new PM port (since iplist is not moveable).

llvm-svn: 276668
2016-07-25 18:10:54 +00:00
Justin Bogner 25ef9e34c9 cmake: When adding lit testsuites, ignore Output directories
With in-tree builds we can get Output directories scattered among our
tests. Recursing into those to find tests doesn't make sense.

Thanks to nlewycky for noticing this!

llvm-svn: 276667
2016-07-25 18:07:14 +00:00
Simon Pilgrim ce8d82775c [X86][SSE] Added 2048-bit vector comparison tests
Upper limit of what can be held in a <32 x i8> result

llvm-svn: 276666
2016-07-25 17:56:01 +00:00
Daniel Berlin 14c000936e NFC: Make a few asserts in GVNHoist do the same thing, but cheaper.
llvm-svn: 276662
2016-07-25 17:36:14 +00:00
Jordan Rose 9978dec4c2 Revert "StringSwitch cannot be copied or moved."
This reverts commit r276652. The clang-query tool is currently
relying on this behavior. I'll try again later.

llvm-svn: 276661
2016-07-25 17:28:33 +00:00
Daniel Berlin f107f3292f Fix N^2 instruction ordering comparisons in GVNHoist.
This fixes GVNHoist's portion of PR28670.

llvm-svn: 276658
2016-07-25 17:24:27 +00:00
Daniel Berlin 65af45de03 NFC: Refactor GVNHoist class so not everything is public
llvm-svn: 276657
2016-07-25 17:24:22 +00:00
Joel Jones 373d7d30dd MC] Provide an MCTargetOptions to implementors of MCAsmBackendCtorTy, NFC
Some targets, notably AArch64 for ILP32, have different relocation encodings
based upon the ABI. This is an enabling change, so a future patch can use the
ABIName from MCTargetOptions to chose which relocations to use. Tested using
check-llvm.

The corresponding change to clang is in: http://reviews.llvm.org/D16538

Patch by: Joel Jones

Differential Revision: https://reviews.llvm.org/D16213

llvm-svn: 276654
2016-07-25 17:18:28 +00:00
Jordan Rose 0cdbe7a572 StringSwitch cannot be copied or moved.
...but most importantly, it cannot be used well with 'auto', because
the inferred type is StringSwitch rather than the result type. This
is a problem because StringSwitch stores addresses of temporary
values rather than copying or moving the value into its own storage.

Changing this uncovered the bug in PassBuilder, also in this patch.
Clang doesn't seem to have any occurrences of the issue.

llvm-svn: 276652
2016-07-25 17:08:24 +00:00
Elena Demikhovsky 64e5f929d0 AVX-512: Fixed [US]INT_TO_FP selection for i1 vectors.
It failed with assertion before this patch.

Differential Revision: https://reviews.llvm.org/D22735

llvm-svn: 276648
2016-07-25 16:51:00 +00:00
Wei Mi 97de034e18 Remove useless pass from the pipeline in test/Analysis/Dominators/2007-01-14-BreakCritEdges.ll.
llvm-svn: 276644
2016-07-25 16:27:34 +00:00
Krzysztof Parzyszek 080bebd212 [Hexagon] Add target feature to generate long calls
llvm-svn: 276638
2016-07-25 14:42:11 +00:00
Sam Parker d5ca0a65b5 [ARM] Improve longMAC codegen test
Added thumb targets and dataflow checks to the longMAC test.

Differential Revision: https://reviews.llvm.org/D22684

llvm-svn: 276629
2016-07-25 10:11:00 +00:00
Simon Dardis 618975206e [mips] Optimize materialization of i64 constants
Avoid MipsAnalyzeImmediate usage if the constant fits in an 32-bit
integer. This allows us to generate the same instructions for the
materialization of the same constants regardless the width of their
type.

Patch by: Vasileios Kalintiris

Contributions by: Simon Dardis

Reviewers: Daniel Sanders

Differential Review: https://reviews.llvm.org/D21689

llvm-svn: 276628
2016-07-25 09:57:28 +00:00
Sam Parker 73f5c785c1 [ARM] Small refactor of Thumb2 SMLA insts
Follow up to r276624. Changes bits 22-20 to be parameters to
instruction class.

Differential Revision: https://reviews.llvm.org/D22562

llvm-svn: 276626
2016-07-25 09:29:24 +00:00
Sam Parker 68c71cd1e4 [ARM] Enable ISel of SMMLS for ARM and Thumb2
Use ISelDAGToDAG to recognise the SMMLS instruction pattern.

Differential Revision: https://reviews.llvm.org/D22562

llvm-svn: 276624
2016-07-25 09:20:20 +00:00
Craig Topper ce415ff9c5 [AVX512] Add load folding support for the unmasked forms of the FMA instructions.
llvm-svn: 276615
2016-07-25 07:20:35 +00:00
Craig Topper 318e40b6f7 [AVX512] Add some additional patterns so that we can fold broadcast loads in the first argument of an FMADD/FMSUB/FNMADD/FNMSUB/FMADDSUB/FMSUBADD node. Also add patterns to support all combinations of the broadcast input and the preserved input for masked versions.
llvm-svn: 276614
2016-07-25 07:20:31 +00:00
Craig Topper 6bcbf5338c [AVX512] Cleanup FMA operand order in patterns to match the VEX versions and to really be 213, 231, and 132.
llvm-svn: 276613
2016-07-25 07:20:28 +00:00
Sean Silva 519323db58 Cleanup : Reformat PartialInliner.cpp to have current LLVM style conventions
Modify the variable names and code style to be that of modern LLVM.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22743

llvm-svn: 276610
2016-07-25 05:57:59 +00:00
Sean Silva fe5abd5e0c Fix : Partial Inliner requires AssumptionCacheTracker
The public InlineFunction utility assumes that the passed in
InlineFunctionInfo has a valid AssumptionCacheTracker.

Patch by River Riddle!

Differential Revision: https://reviews.llvm.org/D22706

llvm-svn: 276609
2016-07-25 05:00:00 +00:00
David Majnemer 126de5d4b4 [InstSimplify] Fold trunc([zs]ext(%V)) -> %V
Truncates can completely cancel out a zext or sext instruction.

llvm-svn: 276604
2016-07-25 03:39:21 +00:00
David Majnemer 68623a0e9f [GVNHoist] Merge metadata on hoisted instructions less conservatively
We can combine metadata from multiple instructions intelligently for
certain metadata nodes.

llvm-svn: 276602
2016-07-25 02:21:25 +00:00
David Majnemer 4728569d0a [GVNHoist] Properly merge alignments when hoisting
If we two loads of two different alignments, we must use the minimum of
the two alignments when hoisting.  Same deal for stores.

For allocas, use the maximum of the two allocas.

llvm-svn: 276601
2016-07-25 02:21:23 +00:00
David Majnemer 6f014d37d5 [Utils] Simplify combineMetadata
Use a range-based for loop, no functional change is intended.

llvm-svn: 276600
2016-07-25 02:21:19 +00:00
NAKAMURA Takumi d6ddc7e0a8 Untabify.
llvm-svn: 276597
2016-07-25 00:59:51 +00:00
NAKAMURA Takumi bd072a9220 Trailing whitespace.
llvm-svn: 276596
2016-07-25 00:59:46 +00:00
David Majnemer afb38afd5f [CommandLine] Use Process::GetEnv instead of _wgetenv
Process::GetEnv does the right thing across our platforms.
CommandLine.cpp had, more or less, the same logic.  Let's remove the
duplication.

No functional change is intended.

llvm-svn: 276572
2016-07-24 17:19:59 +00:00
Simon Pilgrim a6878bdc0f [X86][SSE] Added PR27854 tests
llvm-svn: 276571
2016-07-24 16:39:50 +00:00
Simon Pilgrim b7d75fee74 [X86] Add shift double tests for PR14593
llvm-svn: 276570
2016-07-24 16:10:21 +00:00
Simon Pilgrim 381a0ade5a [X86] Add 'FeatureSlowSHLD' to cpu 'bdver4'
As with all AMD CPUs, excavator has poor SHLD/SHRD performance. Also added bdver3 to the test as it was missing.

llvm-svn: 276569
2016-07-24 16:00:53 +00:00
Simon Pilgrim b2df2dc298 [X86] Add SHRD shift combine tests
llvm-svn: 276568
2016-07-24 15:47:44 +00:00
Simon Pilgrim 0ededcb344 [X86] Regenerate shift by parts tests
llvm-svn: 276567
2016-07-24 15:38:51 +00:00
Simon Pilgrim 114205076d [X86][SSE] Regenerate shifts tests
llvm-svn: 276566
2016-07-24 15:25:36 +00:00
Simon Pilgrim 30a7cc2e1f [X86][SSE] Regenerate SSE copysign tests
llvm-svn: 276565
2016-07-24 15:17:50 +00:00
Simon Pilgrim 7f1c1db73c [X86][AVX512VL] Added AVX512VL half2float vector conversions tests to demonstrate PR23941
llvm-svn: 276563
2016-07-24 13:01:51 +00:00
Craig Topper 2dca3b287b [X86] Make the FMA3 instruction names consistent between VEX and EVEX encoded versions.
This places the 132/213/231 form number in front of the SS/SD/PS/PD. Move the Y for 256-bit versions to be after the PS/PD. Change the AVX512 scalar forms to include a Z in the their name. This new format should be consistent with the general naming of instructions.

llvm-svn: 276559
2016-07-24 08:26:38 +00:00
Craig Topper 05629d05c7 [X86] Replace CodeGenOnly VPSRAVW/D/Q_Int instructions with patterns since the operand types exactly match the normal VPSRAVW/D/Q instructions.
llvm-svn: 276555
2016-07-24 07:32:45 +00:00
Elena Demikhovsky 376a18bd92 [Loop Vectorizer] Handling loops FP induction variables.
Allowed loop vectorization with secondary FP IVs. Like this:
float *A;
float x = init;
for (int i=0; i < N; ++i) {
  A[i] = x;
  x -= fp_inc;
}

The auto-vectorization is possible when the induction binary operator is "fast" or the function has "unsafe" attribute.

Differential Revision: https://reviews.llvm.org/D21330

llvm-svn: 276554
2016-07-24 07:24:54 +00:00
George Burgess IV 93ea19b9a6 [MSSA] Make EXPENSIVE_CHECKS check more.
checkClobberSanity will now be run for all results of `ClobberWalk`,
instead of just the crazy phi-optimized ones. This can help us catch
cases where our cache is being wonky.

llvm-svn: 276553
2016-07-24 07:03:49 +00:00
George Burgess IV f23eb70e03 [MSSA] Remove useless assert. NFC.
liveOnEntry is always a MemoryDef; asserting that a MemoryPhi isn't
liveOnEntry, while correct, isn't very helpful. :)

llvm-svn: 276542
2016-07-24 01:50:07 +00:00
Simon Pilgrim 9e99dd9e8b [X86][SSE] Added float widened broadcast tests
llvm-svn: 276535
2016-07-23 21:24:02 +00:00
Simon Pilgrim 8d18969716 [X86][SSE] Added more widened broadcast tests
Added more vXi16 and vXi8 tests

llvm-svn: 276534
2016-07-23 21:15:31 +00:00
Aaron Ballman bc7c2d020d Change some more llvm highlighting instances to be text instead. It seems that Pygment does not handle "token" or "none" yet, and this caused the documentation bot to go red.
Patch by Gor Nishanov.

llvm-svn: 276532
2016-07-23 20:11:21 +00:00
Aaron Ballman 378ac7ef54 Switching the highlighting from llvm to none in an attempt to appease the build bot (http://lab.llvm.org:8011/builders/llvm-sphinx-docs/builds/11984/steps/docs-llvm-html/logs/stdio).
llvm-svn: 276531
2016-07-23 18:53:35 +00:00
Aaron Ballman f733993300 Removes a warning about duplicate label named _strings from CommandLine.rst.
llvm-svn: 276530
2016-07-23 18:52:21 +00:00
Simon Dardis dd32f433dd CODE_OWNERS: Take ownership of the MIPS backend
As agreed with Daniel Sanders, I'm taking over as code owner
for the MIPS backend.

llvm-svn: 276529
2016-07-23 17:40:48 +00:00
Craig Topper 8152b9cd96 [X86] Fix typo in comment.
llvm-svn: 276528
2016-07-23 16:44:08 +00:00
Simon Pilgrim b9e47a8cd0 [X86][SSE] Added tests where we should be trying to widen a load+splat into a broadcast
llvm-svn: 276527
2016-07-23 16:19:17 +00:00
Simon Pilgrim 8aa6f34455 [X86][SSE] Regenerated uitofp <2 x i32> -> <2 x float> conversion tests
Demonstrate difference in codegen discussed on PR14760

llvm-svn: 276526
2016-07-23 15:55:42 +00:00
Sanjay Patel 1271bf9178 [InstCombine] allow icmp (bit-manipulation-intrinsic(), C) folds for vectors
llvm-svn: 276523
2016-07-23 13:06:49 +00:00
Chandler Carruth 488cb137a9 Fix a GCC error due to this member name also being a type name. This
should fix the build with GCC 4.9 at least. Not sure if this is the
right name or fix, but I've followed up on the original commit.

llvm-svn: 276522
2016-07-23 07:50:05 +00:00
Craig Topper b6519db90d [AVX512] Implement commuting support for EVEX encoded FMA3 instructions.
llvm-svn: 276521
2016-07-23 07:16:56 +00:00
Craig Topper 6172b0b3e9 [X86] Make one of the FMA3 commuting methods static. Remove a call to isFMA3 just to get the IsIntrisic flag, instead get it during the first call and pass it along. NFC
llvm-svn: 276520
2016-07-23 07:16:53 +00:00
Craig Topper ca8f5f309c [X86] Fix switch statement indentation per coding standards.
llvm-svn: 276519
2016-07-23 07:16:50 +00:00
Matt Arsenault b40d8600ca AMDGPU: Delete dead code
This has been dead since r269479

llvm-svn: 276518
2016-07-23 07:07:14 +00:00
Xinliang David Li 9239245401 [Profile] Use explicit flag to enable IR PGO
Patch by Jake VanAdrighem

Differential Revision: http://reviews.llvm.org/D22607

llvm-svn: 276516
2016-07-23 04:28:52 +00:00
Sean Silva ab6a683765 Avoid using a raw AssumptionCacheTracker in various inliner functions.
This unblocks the new PM part of River's patch in
https://reviews.llvm.org/D22706

Conveniently, this same change was needed for D21921 and so these
changes are just spun out from there.

llvm-svn: 276515
2016-07-23 04:22:50 +00:00
David Majnemer a653927e8b [coroutines] Part 1 of N: Documentation
This is the first patch in the coroutine series.
It contains the documentation for the coroutine intrinsics and their usage.

Patch by Gor Nishanov!

Differential Revision: https://reviews.llvm.org/D22603

llvm-svn: 276513
2016-07-23 04:05:08 +00:00
David Majnemer 796331c026 [LoopUnrollAnalyzer] Handle out of bounds accesses in visitLoad
While we handed loads past the end of an array, we didn't handle loads
_before_ the array.

This fixes PR28062.

N.B. While the bug in the code is obvious, I am struggling to craft a
test case which is reasonable in size.

llvm-svn: 276510
2016-07-23 02:56:49 +00:00
Sanjoy Das a7d9ec8751 [SCEV] Make isImpliedCondOperandsViaRanges smarter
This change lets us prove things like

  "{X,+,10} s< 5000" implies "{X+7,+,10} does not sign overflow"

It does this by replacing replacing getConstantDifference by
computeConstantDifference (which is smarter) in
isImpliedCondOperandsViaRanges.

llvm-svn: 276505
2016-07-23 00:54:36 +00:00
Vedant Kumar 401d031e1e [cmake] Use a sane default for LLVM_PROFILE_DATA_DIR
It's been pointed out that arbitrarily spraying raw profiles into a
build directory is insane. Doing this wastes a tremendous amount of
space and is also very lossy, since the test harness tends to wipe away
temporary sub-directories (which usually contain relevant profile data).

The new default is a `profiles` directory inside of the build dir.

llvm-svn: 276504
2016-07-23 00:38:11 +00:00
Sanjoy Das 0b1af85cc2 [SCEV] Change the interface of computeConstantDifference; NFC
This is in preparation of
s/getConstantDifference/computeConstantDifference/ in a later change.

llvm-svn: 276503
2016-07-23 00:28:56 +00:00
Sanjay Patel 6ebd5857c8 [InstCombine] move udiv+cmp fold over with other BinOp+cmp folds; NFCI
llvm-svn: 276502
2016-07-23 00:28:39 +00:00
Sanjay Patel 8d8594acb9 auto-generate checks
llvm-svn: 276501
2016-07-23 00:09:54 +00:00
Tom Stellard b8253c88b6 Revert "[AMDGPU] Emit read-only data to .rodata for hsa"
This reverts commit r276298.

Data stored in .rodata can have a negative offset from .text, but we
don't support negative values in relocations yet.

This caused a regression in one of the amp conformance tests:
5_Data_Cont/5_2_a_v/5_2_3_m/Assignment/Test.02.01

llvm-svn: 276498
2016-07-22 23:46:40 +00:00
Adam Nemet eea7c267b9 [LoopDataPrefetch] Fix unused variable in release build
llvm-svn: 276491
2016-07-22 23:08:10 +00:00
Adam Nemet 9e6e63fba2 [LoopDataPrefetch] Include hotness of region in opt remark
llvm-svn: 276488
2016-07-22 22:53:17 +00:00
Adam Nemet 885f1de490 [LoopDataPrefetch] Sort headers
llvm-svn: 276487
2016-07-22 22:53:12 +00:00
George Burgess IV 4ec1753ff4 [CFLAA] Add more offset-sensitivity tracking.
This patch teaches FunctionInfo about offsets.

Like the last patch, this one doesn't introduce any visible
functionality change (the core algorithm knows nothing about offsets;
they're just plumbed through). Tests will come when we start acting
differently because of the offsets.

Patch by Jia Chen.

(N.B. I made a tiny change to Jia's patch to avoid warnings by GCC: I
put DenseMapInfo specializations in the `llvm` namespace. Only realized
that those appeared when compiling locally. :) )

Differential Revision: https://reviews.llvm.org/D22634

llvm-svn: 276486
2016-07-22 22:30:48 +00:00
Sanjay Patel e063ddb347 add tests for icmp vector folds
llvm-svn: 276482
2016-07-22 22:19:52 +00:00
Tim Northover 98a56eb7f4 GlobalISel: allow multiple types on MachineInstrs.
llvm-svn: 276481
2016-07-22 22:13:36 +00:00
Vitaly Buka e3a032a740 Unpoison stack before resume instruction
Summary:
Clang inserts cleanup code before resume similar way as before return instruction.
This makes asan poison local variables causing false use-after-scope reports.

__asan_handle_no_return does not help here as it was executed before
llvm.lifetime.end inserted into resume block.

To avoid false report we need to unpoison stack for resume same way as for return.

PR27453

Reviewers: kcc, eugenis

Differential Revision: https://reviews.llvm.org/D22661

llvm-svn: 276480
2016-07-22 22:04:38 +00:00
Alina Sbirlea ba21ffebff Add flag to PassManagerBuilder to disable GVN Hoist Pass.
Summary:
Adding a flag to diable GVN Hoisting by default.
Note: The GVN Hoist Pass causes some Halide tests to hang. Halide will disable the pass while investigating.

Reviewers: llvm-commits, chandlerc, spop, dberlin

Subscribers: mehdi_amini

Differential Revision: https://reviews.llvm.org/D22639

llvm-svn: 276479
2016-07-22 22:02:19 +00:00
Michael Kuperstein 38e7298093 [SLPVectorizer] Vectorize reverse-order loads in horizontal reductions
When vectorizing a tree rooted at a store bundle, we currently try to sort the
stores before building the tree, so that the stores can be vectorized. For other
trees, the order of the root bundle - which determines the order of all other
bundles - is arbitrary. That is bad, since if a leaf bundle of consecutive loads
happens to appear in the wrong order, we will not vectorize it.

This is partially mitigated when the root is a binary operator, by trying to
build a "reversed" tree when that's considered profitable. This patch extends the
workaround we have for binops to trees rooted in a horizontal reduction.

This fixes PR28474.

Differential Revision: https://reviews.llvm.org/D22554

llvm-svn: 276477
2016-07-22 21:28:48 +00:00
Sanjay Patel cbc4377af1 add tests for icmp vector folds
llvm-svn: 276476
2016-07-22 21:28:20 +00:00
Sanjay Patel 97e61dcc2d add tests for icmp vector folds
llvm-svn: 276475
2016-07-22 21:13:08 +00:00
Vedant Kumar c9d3a173fb [Coverage] Mark more methods const (NFC)
llvm-svn: 276474
2016-07-22 21:11:55 +00:00
Sanjay Patel b73d7aed71 add tests for icmp vector folds
llvm-svn: 276472
2016-07-22 21:02:33 +00:00
Anna Thomas 58d1192a22 Add invariant start call creation in IRBuilder.NFC
Differential Revision: https://reviews.llvm.org/D22700

llvm-svn: 276471
2016-07-22 20:57:23 +00:00
Pete Cooper fea2139740 Use RValue refs in APInt add/sub methods.
This adds versions of operator + and - which are optimized for the LHS/RHS of the
operator being RValue's.  When an RValue is available, we can use its storage space
instead of allocating new space.

On code such as ConstantRange which makes heavy use of APInt's over 64-bits in size,
this results in significant numbers of saved allocations.

Thanks to David Blaikie for all the review and most of the code here.

llvm-svn: 276470
2016-07-22 20:55:46 +00:00
Vedant Kumar 127d0502a0 [llvm-cov] Don't copy stylesheets into index files
Just link in the stylesheet from the toplevel dir of the report.

llvm-svn: 276468
2016-07-22 20:49:23 +00:00
Sanjoy Das 095f5b204f [SCEV] Extract out a helper function; NFC
The helper will get smarter in a later change, but right now this is
just code reorganization.

llvm-svn: 276467
2016-07-22 20:47:55 +00:00
Sanjay Patel 859278005d update to use FileCheck and auto-generate checks
llvm-svn: 276466
2016-07-22 20:39:07 +00:00
George Burgess IV 8a457ddfd8 Fix include case. NFC.
llvm-svn: 276465
2016-07-22 20:15:19 +00:00
Sanjay Patel 296a776a5b add tests for icmp vector folds
llvm-svn: 276464
2016-07-22 20:11:08 +00:00
Zachary Turner 78d1c32dd6 Make DebugInfoMsf a dependency of DebugInfoPDBTests.
For some reason this doesn't cause linker errors with MSVC or
clang-cl, but the bots seem to be failing with other compilers.

llvm-svn: 276463
2016-07-22 20:05:30 +00:00
Tim Northover 33b07d6725 GlobalISel: implement legalization pass, with just one transformation.
This adds the actual MachineLegalizeHelper to do the work and a trivial pass
wrapper that legalizes all instructions in a MachineFunction. Currently the
only transformation supported is splitting up a vector G_ADD into one acting on
smaller vectors.

llvm-svn: 276461
2016-07-22 20:03:43 +00:00
Zachary Turner e4a4f33daf Make PDBFile store an msf::Layout.
Previously it was storing all the fields of an msf::Layout as
separate members.  This is a trivial cleanup to make it store
an msf::Layout directly.  This makes the code more readable
since it becomes clear which fields of PDBFile are actually the
msf specific layout information in a sea of other bookkeeping
fields.

llvm-svn: 276460
2016-07-22 19:56:33 +00:00
Zachary Turner e109dc63f9 [pdb] Have builders share a single BumpPtrAllocator.
This makes it easier to have the writable and readable PDB
interfaces share code since the read/write and write-only
interfaces now share a single allocator, you don't have to worry
about a builder building a read only interface and then having
the read-only interface's data become corrupt when the builder
goes out of scope.  Now the allocator is specified explicitly
to all constructors, so all interfaces can share a single allocator
that is scoped appropriately.

llvm-svn: 276459
2016-07-22 19:56:26 +00:00
Zachary Turner bac69d33d0 [msf] Create LLVMDebugInfoMsf
This provides a better layering of responsibilities among different
aspects of PDB writing code.  Some of the MSF related code was
contained in CodeView, and some was in PDB prior to this.  Further,
we were often saying PDB when we meant MSF, and the two are
actually independent of each other since in theory you can have
other types of data besides PDB data in an MSF.  So, this patch
separates the MSF specific code into its own library, with no
dependencies on anything else, and DebugInfoCodeView and
DebugInfoPDB take dependencies on DebugInfoMsf.

llvm-svn: 276458
2016-07-22 19:56:05 +00:00
Teresa Johnson b8f95b5c6e [llvm-ar] Document 'T' thin archive modifier (NFC)
llvm-svn: 276457
2016-07-22 19:41:00 +00:00
Teresa Johnson f432c9cefa [ThinLTO/gold] Remove thin archive part of new test due to bot failures
I am getting a bot failure from the thin archive part of this test:

From
http://bb.pgr.jp/builders/cmake-llvm-x86_64-linux/builds/40468/steps/test_llvm/logs/LLVM%20%3A%3A%20tools__gold__X86__thinlto_emit_linked_objects.ll:

Command Output (stderr):
--
/home/bb/cmake-llvm-x86_64-linux/build/./bin/llvm-ar: creating
/home/bb/cmake-llvm-x86_64-linux/build/test/tools/gold/X86/Output/thinlto_emit_linked_objects.ll.tmp2.a
/usr/bin/ld.gold: internal error in add_writer, at
../../gold/token.h:124

--

This appears to be an issue with an older version of gold. The test case
passes for me locally when I use the gold v1.12 I was testing with, but
when I tried the gold installed on my system which is v1.11 I get the
same error.

Remove the thin archive version of the test, since there isn't a way to
predicate it on gold version.

llvm-svn: 276453
2016-07-22 18:32:30 +00:00
Jun Bum Lim 6a7dc5c430 Recommit - [DSE]Enhance shorthening MemIntrinsic based on OverlapIntervals
Recommiting r275571 after fixing crash reported in PR28270.
Now we erase elements of IOL in deleteDeadInstruction().

Original Summary:
This change use the overlap interval map built from partial overwrite tracking to perform shortening MemIntrinsics.
Add test cases which was missing opportunities before.

llvm-svn: 276452
2016-07-22 18:27:24 +00:00
Sanjay Patel beaea95a0d add tests for vector bit manipulation intrinsics
llvm-svn: 276451
2016-07-22 18:22:25 +00:00
Teresa Johnson 1e2708c9e0 [ThinLTO/gold] Support for getting list of included objects from gold
Summary:
In the distributed backend case, the ThinLink step and the final native
object link are separate processes. This can be problematic when archive
libraries are involved in the link (e.g. via --start-lib/--end-lib
pairs). The linker only includes objects from libraries when
there is a strong reference to them, and depending on the intervening
ThinLTO backend processes' importing/inlining, the strong references
may appear different in the two link steps. See D22356 and D22467
for two scenarios where this causes issues.

To ensure that the final link includes the same objects, this patch
adds support for an "=filename" form of the thinlto-index-only plugin
option, in which case objects gold included in the link are emitted to
the given filename. This should be used as input to the final link (e.g.
via the @filename option to gold), instead of listing all the objects
within --start-lib/--end-lib pairs again.

Note that the support for the gold callback that identifies included
objects was added in gold version 1.12.

Reviewers: davidxl, mehdi_amini

Subscribers: llvm-commits, mehdi_amini

Differential Revision: https://reviews.llvm.org/D22677

llvm-svn: 276450
2016-07-22 18:20:22 +00:00
Wei Mi e04d0eff29 [PM] Port BreakCriticalEdges to the new PM.
Differential Revision: https://reviews.llvm.org/D22688

llvm-svn: 276449
2016-07-22 18:04:25 +00:00
Anna Thomas 0be4a0e6a4 Invariant start/end intrinsics overloaded for address space
Summary:
The llvm.invariant.start and llvm.invariant.end intrinsics currently
support specifying invariant memory objects only in the default address
space.

With this change, these intrinsics are overloaded for any adddress space
for memory objects
and we can use these llvm invariant intrinsics in non-default address
spaces.

Example: llvm.invariant.start.p1i8(i64 4, i8 addrspace(1)* %ptr)

This overloaded intrinsic is needed for representing final or invariant
memory in managed languages.

Reviewers: apilipenko, reames

Subscribers: llvm-commits
llvm-svn: 276447
2016-07-22 17:49:40 +00:00
Vedant Kumar 2b8747a14e [utils] Update coverage regression checking script
r276409 changed the coverage summary format. Update the script so that
it can parse the new output, and incorporate the new information into
its warnings.

llvm-svn: 276446
2016-07-22 17:38:03 +00:00
Krzysztof Parzyszek 3c89bb09d5 [Hexagon] Make HexagonCodeGen depend on Scalar
Hexagon backend uses LoopDataPrefetch pass that is defined in Scalar.

llvm-svn: 276441
2016-07-22 17:23:46 +00:00
Matt Arsenault e2fe67b951 AMDGPU: Remove redundant test
llvm-svn: 276439
2016-07-22 17:01:36 +00:00
Matt Arsenault 3c07c813c0 AMDGPU: Fix groupstaticsize for large LDS
The size can exceed s_movk_i32's limit, and we don't
want to use it this early since it inhibits optimizations.

This should probably be merged to the release branch.

llvm-svn: 276438
2016-07-22 17:01:33 +00:00
Matt Arsenault 8d718dcfda AMDGPU: Add HSA dispatch id intrinsic
llvm-svn: 276437
2016-07-22 17:01:30 +00:00
Matt Arsenault f9245b75c0 AMDGPU: Delete more dead code
Remove dead code from r600 intrinsic removal.
Remove unset members, rename StackSize to be less ambiguous.

llvm-svn: 276436
2016-07-22 17:01:25 +00:00
Matt Arsenault 7fb961f3e6 AMDGPU: Fix i1 fp_to_int
R600's i1 fp_to_uint selected but was incorrect according to
what instcombine constant folds to.

llvm-svn: 276435
2016-07-22 17:01:21 +00:00
Matt Arsenault d40ded6681 AMDGPU: Don't reinvent transferSuccessorsAndUpdatePHIs
llvm-svn: 276434
2016-07-22 17:01:15 +00:00
Tim Northover bd5054602e GlobalISel: implement alloca instruction
llvm-svn: 276433
2016-07-22 16:59:52 +00:00
Simon Pilgrim 820f87a72d [SelectionDAG] Optimization of BITREVERSE legalization for power-of-2 integer scalar/vector types
An extension of D19978, this patch replaces the default BITREVERSE evaluation of individual bit masks+shifts with block mask+shifts when we have integer elements of power-of-2 bits in size.

After calling BSWAP to reverse the order of the constituent bytes (which typically follows a similar approach), every neighbouring 4-bits, 2-bits and finally 1-bit pairs are masked off and swapped over with shifts.

In doing so we can significantly reduce the number of operations required.

Differential Revision: https://reviews.llvm.org/D21578

llvm-svn: 276432
2016-07-22 16:46:25 +00:00
Xinliang David Li c27f1b7182 [Profile] Cleanup: remove unused interface
llvm-svn: 276431
2016-07-22 16:11:56 +00:00
Lang Hames 5e51a2e31a [Support] Make ErrorAsOutParameter take an Error* rather than an Error&.
This allows ErrorAsOutParameter to work better with "optional" errors. For
example, consider a function where for certain input values it is known that
the function can't fail. This can now be written as:

Result foo(Arg X, Error *Err) {
  ErrorAsOutParameter EAO(Err);

  if (<Error Condition>) {
    if (Err)
      *Err = <report error>;
    else
      llvm_unreachable("Unexpected failure!");
  }
}

Rather than having to construct an ErrorAsOutParameter under every conditional
where Err is known to be non-null.

llvm-svn: 276430
2016-07-22 16:11:25 +00:00
Krzysztof Parzyszek 047149f745 [RDF] Make the graph construction/use less expensive
- FuncNode::findBlock traverses the function every time. Avoid using it,
  and keep a cache of block addresses in DataFlowGraph instead.
- The operator[] in the map of definition stacks was very slow. Replace
  the map with unordered_map.

llvm-svn: 276429
2016-07-22 16:09:47 +00:00