Commit Graph

161762 Commits

Author SHA1 Message Date
Craig Topper 195aaaf541 [TableGen] Use empty emplace_back to add defaulted constructed objects to vectors to avoid using resize(size()+1). NFC
llvm-svn: 328184
2018-03-22 06:15:10 +00:00
Craig Topper 281a19cf7b [TableGen] Add a non-default constructor to CodeGenSchedClass and use it via emplace_back to create new SchedClasses instead of using resize(size+1)
llvm-svn: 328183
2018-03-22 06:15:08 +00:00
Craig Topper df7855fc8d [X86] Remove unused SchedWriteRes classes. NFC
llvm-svn: 328181
2018-03-22 04:52:08 +00:00
Craig Topper fc179c6dd5 [X86][Skylake] Merge multiple InstrRW entries that map to the same SchedWriteRes group (NFCI) (PR35955)
I've also merged some VEX/non-VEX instregex strings with a (V?) prefix or (Y?) ymm variant - there are still a lot more of these to do.

This reduces the size of the optimized llc binary on my computer by 400K. Presumably because we went from 5000+ scheduler classes per CPU to ~2000.

llvm-svn: 328179
2018-03-22 04:23:41 +00:00
Aaron Smith 523de05a1f [DIA] Add IPDBSectionContrib interfaces and DIA implementation
To resolve symbol context at a particular address, we need to
determine the compiland for the address. We are able to determine
the parent compiland of PDBSymbolFunc, PDBSymbolTypeUDT,
PDBSymbolTypeEnum symbols indirectly through line information. 
However no such information is availabile for PDBSymbolData, 
i.e. variables.

The Section Contribution table from PDBs has information about
each compiland's contribution to sections by address. For example,
a piece of a contribution looks like,

  VA         RelativeVA  Sect No.  Offset    Length    Compiland
  14000087B0 000087B0    0001      000077B0  000000BB  exe_main.obj

So given an address, it's possible to determine its compiland with
this information.

llvm-svn: 328178
2018-03-22 04:08:15 +00:00
Aaron Smith 58a32a478f [PDB] Get more DIA table enumerators
Rename the original function and make it a static template.

llvm-svn: 328177
2018-03-22 03:57:06 +00:00
Saleem Abdulrasool 598f3a499d vim: add `dso_local` and `dso_preemptable` keywords
Support the new keywords introduced in SVN r316668.

llvm-svn: 328170
2018-03-21 23:46:09 +00:00
Michael Zolotukhin cc83994bba [test] Try to unbreak hexagon bots after r328160.
llvm-svn: 328167
2018-03-21 22:57:33 +00:00
David Blaikie 2be3922807 Fix a couple of layering violations in Transforms
Remove #include of Transforms/Scalar.h from Transform/Utils to fix layering.

Transforms depends on Transforms/Utils, not the other way around. So
remove the header and the "createStripGCRelocatesPass" function
declaration (& definition) that is unused and motivated this dependency.

Move Transforms/Utils/Local.h into Analysis because it's used by
Analysis/MemoryBuiltins.cpp.

llvm-svn: 328165
2018-03-21 22:34:23 +00:00
Mircea Trofin 556f8f6adc [InstrProf] Encapsulates access to AddrToMD5Map.
Summary:
This fixes a unittest failure introduced by D44717

D44717 introduced lazy sorting of the internal data structures of the
symbol table. The AddrToMD5Map getter was potentially exposing
inconsistent (unsorted) state. We could sort in the accessor, however,
a client may store the pointer and thus bypass the internal state
management of the symbol table. The alternative in this CL blocks
direct access to the state, thus ensuring consistent
externally-observable state.

Reviewers: davidxl, xur, eraman

Reviewed By: xur

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44757

llvm-svn: 328163
2018-03-21 22:27:31 +00:00
Zachary Turner eb62999455 [PDB] Don't ignore bucket 0 when writing the PDB string table.
The hash table is a list of buckets, and the *value* stored in
the bucket cannot be 0 since that is reserved.  However, the code
here was incorrectly skipping over the 0'th bucket entirely.
The 0'th bucket is perfectly fine, just none of these buckets
can contain the value 0.

As a result, whenever there was a string where hash(S) % Size
was equal to 0, we would write the value in the next bucket
instead.  We never caught this in our tests due to *another*
bug, which is that we would iterate the entire list of buckets
looking for the value, only using the hash value as a starting
point.  However, the real algorithm stops when it finds 0 in
a bucket since it takes that to mean "the item is not in the
hash table".

The unit test is updated to carefully construct a set of hash
values that will cause one item to hash to 0 mod bucket count,
and the reader is also updated to return an error indicating that
the item is not found when it encounters a 0 bucket.

llvm-svn: 328162
2018-03-21 22:23:59 +00:00
Michael Zolotukhin 1dce44e8e8 [test] Add tests for opt passes pipelines for O0, O2, O3, and Os.
llvm-svn: 328160
2018-03-21 22:17:31 +00:00
Michael Zolotukhin 7e6fa1d6ae [test] Add tests for llc passes pipelines.
This is basically an extension of existing test
test/CodeGen/X86/O0-pipeline.ll introduced in r302608.

llvm-svn: 328159
2018-03-21 22:17:13 +00:00
Artem Belevich 30512869ff [NVPTX] Make tensor shape part of WMMA intrinsic's name.
This is needed for the upcoming implementation of the
new 8x32x16 and 32x8x16 variants of WMMA instructions
introduced in CUDA 9.1.

Differential Revision: https://reviews.llvm.org/D44719

llvm-svn: 328158
2018-03-21 21:55:02 +00:00
Reid Kleckner bab5d2c69b [llvm-profdata] Use "-o /dev/null" in invalid-profdata.test
Lit automatically rewrites /dev/null to a temp file on Windows.

llvm-svn: 328157
2018-03-21 21:51:53 +00:00
Reid Kleckner 8562c1a198 [PDB] Remove unused private variable, re-applying r327900 after relanding more natvis changes[4~
llvm-svn: 328156
2018-03-21 21:47:26 +00:00
Reid Kleckner 440219d53e [WebAssembly] Really disable wasm register name matcher
The "ShouldEmitMatchRegisterName" bit wasn't taking effect because the
WebAssembly target didn't point to the custom WebAssemblyAsmParser
record.

llvm-svn: 328155
2018-03-21 21:46:47 +00:00
Rafael Espindola c51dc906ea Handle abbr_offset with relocations.
This is mostly just plumbing to get a DWARFDataExtractor where we
compute abbr_offset so we can use getRelocatedValue.

This is part of PR36793.

llvm-svn: 328154
2018-03-21 21:31:25 +00:00
Sanjay Patel 1d0832d9a3 [InstCombine] move/add tests for fmul distribution; NFC
There are at least 3 problems:
1. We're distributing across large patterns, but fail to do that for the minimal patterns.
2. We're not checking uses, so we may create more instructions than we eliminate.
3. We should be able to do these transforms with less than full 'fast' fmuls.

llvm-svn: 328152
2018-03-21 21:28:19 +00:00
Lei Huang efd6f1c8e2 [POWER9][NFC] update testcase check statements
llvm-svn: 328147
2018-03-21 20:59:45 +00:00
Reid Kleckner 762331be07 Revert r328119 "[InstCombine] add folds for xor-of-icmp signbit tests (PR36682)"
This asserts when compiling safe_numerics_unittest.cpp in Chromium with
MSan.

llvm-svn: 328145
2018-03-21 20:35:36 +00:00
Alexander Shaposhnikov 6ecc6e62c1 [llvm-objcopy] Implement support for section groups
This diff adds support for SHT_GROUP sections to llvm-objcopy.
Some sections are interrelated and comprise a group.
For example, a definition of an inline function might require, 
in addition to the section containing its instructions, 
a read-only data section containing literals referenced inside the function.
A section of the type SHT_GROUP contains the indices of the group members,
therefore, it needs to be updated whenever the indices change.
Similarly, the fields sh_link, sh_info should be recalculated as well.

[Resubmit r328012 with the proper handling of endianness]

Test plan: make check-all

Differential revision: https://reviews.llvm.org/D43996

llvm-svn: 328143
2018-03-21 19:53:44 +00:00
Craig Topper 989d94ddde [TableGen] Hoist the code for copying InstRWs from an old scheduling class to a new one out of the loop that assigns instructions to the new class. NFCI
We already know all the of instructions we're processing in the instruction loop belong to no class or all to the same class. So we only have to worry about remapping one class. So hoist it all out and remove the SmallPtrSet that tracked which class we'd already remapped.

I had to introduce new instruction loop inside this code to print an error message, but that only occurs on the error path.

llvm-svn: 328142
2018-03-21 19:52:13 +00:00
Adrian Prantl 4d7bde068f typo
llvm-svn: 328141
2018-03-21 19:33:07 +00:00
Sanjay Patel e235942a1e [InstSimplify] fp_binop X, NaN --> NaN
We propagate the existing NaN value when possible.

Differential Revision: https://reviews.llvm.org/D44521

llvm-svn: 328140
2018-03-21 19:31:53 +00:00
Craig Topper f2ab05c432 [TableGen] Remove unnecessary map lookup and shadowing of a variable. NFCI
We already have an OldSCIdx variable in the outer loop here. And we already did the map lookup in the loop that populated ClassInstrs. And the outer OldSCIdx got it from ClassInstrs.

llvm-svn: 328139
2018-03-21 19:30:33 +00:00
Craig Topper 9fbbe5d9ca [TableGen] Use range-based for loops. NFC
llvm-svn: 328138
2018-03-21 19:30:31 +00:00
Craig Topper 06d783765a [TableGen] Use count_if instead of a manual loop. NFC
llvm-svn: 328137
2018-03-21 19:30:30 +00:00
Craig Topper 2854dc93e1 [X86] Rewrite getOperandBias in X86BaseInfo.h to be a little more structured and update comments to be more clear about what it does. NFC
llvm-svn: 328136
2018-03-21 19:30:28 +00:00
David Blaikie 8820929011 Sink Analysis/ObjectUtil(canBeOmittedFromSymbolTable) into IR so it can be legitimately be used by Object/IRSymtab
llvm-svn: 328135
2018-03-21 19:23:45 +00:00
Matthew Simpson b17fff79f0 [SLP] Add test case for a gather sequence with multiple uses
llvm-svn: 328133
2018-03-21 19:13:14 +00:00
Mircea Trofin 71349ff07d [InstrProf] Support for external functions in text format.
Summary:
External functions appearing as indirect call targets could not be
found in the SymTab, and the value:counter record was represented,
in the text format, using an empty string for the name. This would
then cause a silent parsing error when reading.

This CL:
- adds explicit support for such functions
- fixes the places where we would not propagate errors when reading
- addresses a performance issue due to eager resorting of the SymTab.

Reviewers: xur, eraman, davidxl

Reviewed By: davidxl

Subscribers: llvm-commits

Differential Revision: https://reviews.llvm.org/D44717

llvm-svn: 328132
2018-03-21 19:06:06 +00:00
David Blaikie c72984f802 Ensure that DataTypes.h is installed now that it's moved to llvm-c
llvm-svn: 328130
2018-03-21 18:21:57 +00:00
Andrea Di Biagio 12ef5260ea [llvm-mca] Move the logic that computes the register file usage to the BackendStatistics view.
With this patch, the "instruction dispatched" event now provides information
related to the number of microarchitectural registers used in each register
file. Similarly, the "instruction retired" event is now able to tell how may
registers are freed in each register file.

Currently, the BackendStatistics view is the only consumer of register
usage/pressure information. BackendStatistics uses that info to print out a few
general statistics (i.e. max number of mappings used; total mapping created).
Before this patch, the BackendStatistics was forced to query the Backend to
obtain the register pressure information.

This helps removes that dependency. Now views are completely independent from
the Backend.  As a consequence, it should be easier to address PR36663 and
further modularize the pipeline.

Added a couple of test cases in the BtVer2 specific directory.

llvm-svn: 328129
2018-03-21 18:11:05 +00:00
Simon Pilgrim 949437e882 [SchedModel] Use CodeGenSchedClass::getSchedClassIdx helper directly. NFCI.
llvm-svn: 328128
2018-03-21 18:09:34 +00:00
Simon Pilgrim 4cca3b190b [SchedModel] Use CodeGenSchedClass::isKeyEqual instead of duplicating code. NFCI.
llvm-svn: 328126
2018-03-21 17:57:21 +00:00
Craig Topper 02a114aab4 [Docs] Remove some WIP X86 documentation I accidentally leaked into r328031.
I didn't mean to commit it, but I guess I failed to switch branches or stash it in my local tree.

llvm-svn: 328124
2018-03-21 17:32:57 +00:00
David Blaikie 99e172532c Reapply Support layering fixes.
Compiler.h is used by Demangle (which Support depends on) - so sink it
into Demangle to avoid a circular dependency

DataTypes.h is used by llvm-c (which Support depends on) - so sink it
into llvm-c.

DataTypes.h could probably be fixed the other way - making llvm-c depend
on Support instead of Support depending on llvm-c - if anyone feels
that's the better option, happy to work with them on that.

I /think/ this'll address the layering issues that previous attempts to
commit this have triggered in the Modules buildbot, but I haven't been
able to reproduce that build so can't say for sure. If anyone's having
trouble with this - it might be worth taking a look to see if there's a
quick fix/something small I missed rather than revert, but no worries.

llvm-svn: 328123
2018-03-21 17:31:49 +00:00
David Blaikie e70cbb03b0 Add missing #includes to Analysis/MustExecute.h
llvm-svn: 328122
2018-03-21 17:31:45 +00:00
Eugene Zelenko c132f8840f [Documentation] Fix markup problems in X86Usage.rst
llvm-svn: 328121
2018-03-21 17:24:04 +00:00
Krzysztof Parzyszek b4bb75d6ad [Hexagon] Generalize DAG mutation for function calls
Add barrier edges to check for any physical register. The previous code
worked for the function return registers: r0/d0, v0/w0.

Patch by Brendon Cahoon.

llvm-svn: 328120
2018-03-21 17:23:32 +00:00
Sanjay Patel 778032f39d [InstCombine] add folds for xor-of-icmp signbit tests (PR36682)
This is part of solving:
https://bugs.llvm.org/show_bug.cgi?id=36682

There's also a leftover improvement from the long-ago-closed:
https://bugs.llvm.org/show_bug.cgi?id=5438

https://rise4fun.com/Alive/dC1

llvm-svn: 328119
2018-03-21 17:17:13 +00:00
Nicolai Haehnle 87aec1b194 TableGen: Remove redundant loop in ListInit::resolveReferences
Summary:
Recursive lookups are handled by the Resolver, so the loop was purely
a waste of runtime.

Change-Id: I2bd23a68b478aea0bbac1a86ca7635adffa28688

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44624

llvm-svn: 328118
2018-03-21 17:13:10 +00:00
Nicolai Haehnle 420e28c78c TableGen: Streamline how defs are instantiated
Summary:
Instantiating def's and defm's needs to perform the following steps:

- for defm's, clone multiclass def prototypes and subsitute template args
- for def's and defm's, add subclass definitions, substituting template
  args
- clone the record based on foreach loops and substitute loop iteration
  variables
- override record variables based on the global 'let' stack
- resolve the record name (this should be simple, but unfortunately it's
  not due to existing .td files relying on rather silly implementation
  details)
- for def(m)s in multiclasses, add the unresolved record as a multiclass
  prototype
- for top-level def(m)s, resolve all internal variable references and add
  them to the record keeper and any active defsets

This change streamlines how we go through these steps, by having both
def's and defm's feed into a single addDef() method that handles foreach,
final resolve, and routing the record to the right place.

This happens to make foreach inside of multiclasses work, as the new
test case demonstrates. Previously, foreach inside multiclasses was not
forbidden by the parser, but it was de facto broken.

Another side effect is that the order of "instantiated from" notes in error
messages is reversed, as the modified test case shows. This is arguably
clearer, since the initial error message ends up pointing directly to
whatever triggered the error, and subsequent notes will point to increasingly
outer layers of multiclasses. This is consistent with how C++ compilers
report nested #includes and nested template instantiations.

Change-Id: Ica146d0db2bc133dd7ed88054371becf24320447

Reviewers: arsenm, craig.topper, tra, MartinO

Subscribers: wdng, llvm-commits

Differential Revision: https://reviews.llvm.org/D44478

llvm-svn: 328117
2018-03-21 17:12:53 +00:00
Eugene Zelenko 3507b0489f [Documentation] Fix markup problem in AMDGPUUsage.rst.
llvm-svn: 328116
2018-03-21 17:09:35 +00:00
Krzysztof Parzyszek c715a5d2b8 [Hexagon] Eliminate subregisters from PHI nodes before pipelining
The pipeliner needs to remove instructions from the SlotIndexes
structure when they are deleted. Otherwise, the SlotIndexes map
has stale data, and an assert will occur when adding new
instructions.

This patch also changes the pipeliner to make the back-edge of
a loop carried dependence 1 cycle. The 1 cycle latency is added
to the anti-dependence that represents the back-edge. This
changes eliminates a couple of hacks added to the pipeliner to
handle the latency of the back-edge. It is needed to correctly
pipeline the test case for the sub-register elimination pass.

llvm-svn: 328113
2018-03-21 16:39:11 +00:00
Reid Kleckner 18574836f9 [WebAssembly] Suppress unused function warning for register name matcher
llvm-svn: 328112
2018-03-21 16:20:58 +00:00
Simon Pilgrim ec2f878779 [X86][Haswell] Merge multiple InstrRW entries that map to the same SchedWriteRes group (NFCI) (PR35955)
I've also merged some VEX/non-VEX instregex strings with a (V?) prefix or (Y?) ymm variant - there are still a lot more of these to do.

llvm-svn: 328111
2018-03-21 16:19:03 +00:00
Simon Pilgrim 96b605d34c [X86][SandyBridge] Merge more VEX/non-VEX instregex patterns (NFCI) (PR35955)
llvm-svn: 328110
2018-03-21 16:05:58 +00:00
Sanjay Patel 3da85ae5a5 [InstCombine] move/add tests for xor-of-icmps (PR36682); NFC
llvm-svn: 328109
2018-03-21 15:54:48 +00:00