Commit Graph

257392 Commits

Author SHA1 Message Date
George Rimar d83ce1b49d [ELF] - Devirtualize LinkerScriptBase::getOutputSectionSize. NFC.
It does not use ELFT templates so can be non-virtual.

llvm-svn: 297727
2017-03-14 10:24:47 +00:00
Tobias Grosser 335b6bf208 Fix typos in ADCE comments
llvm-svn: 297726
2017-03-14 10:18:11 +00:00
George Rimar 851dc1e84d [ELF] - Devirtualize LinkerScriptBase::getOutputSection
It does not use ELFT templates so can be non-virtual.

llvm-svn: 297725
2017-03-14 10:15:53 +00:00
Oliver Stannard 062041113f [ValueTracking] Out of range shifts might be undef
If it is possible for the RHS of a shift operation to be greater than or equal
to the bit-width, then the result might be undef, and we can't report any known
bits.

In some cases, this was allowing a transformation in instcombine which widened
an undef value from i1 to i32, increasing the range of values that a function
could return.

Differential revision: https://reviews.llvm.org/D30781

llvm-svn: 297724
2017-03-14 10:13:17 +00:00
George Rimar d0bee506a0 [ELF] - Simplify LinkerScriptBase::getDot(). NFC.
That makes it not dependent on virtual call,
keeping logic the same.

llvm-svn: 297723
2017-03-14 10:05:43 +00:00
George Rimar 0c1c8085bc [ELF] - Move ThreadBssOffset and Dot to LinkerScriptBase. NFC.
One more step to combine LinkerScript and LinkerScriptBase.

llvm-svn: 297722
2017-03-14 10:00:19 +00:00
Sylvestre Ledru 72e3fa7e2c describe the recent changes in clang-format in the 5.0 release notes
llvm-svn: 297721
2017-03-14 09:43:55 +00:00
George Rimar e21c3af7e9 [ELF] - Remove unnecessary template #4. NFC.
OutputSectionFactory has no ELFT templates anymore.

llvm-svn: 297720
2017-03-14 09:30:25 +00:00
George Rimar 09268b7b1e [ELF] - Remove unnecessary template #3. NFC.
llvm-svn: 297719
2017-03-14 09:25:03 +00:00
George Rimar f08b592390 [ELF] - Remove unnecessary template #2. NFC.
llvm-svn: 297718
2017-03-14 09:19:34 +00:00
George Rimar 788fe38f99 [ELF] - Remove unnecessary template. NFC.
llvm-svn: 297717
2017-03-14 09:14:28 +00:00
Sam Parker 916b1ba617 [ARM] Move SMULW[B|T] isel to DAG Combine
Create nodes for smulwb and smulwt and move their selection from
DAGToDAG to DAG combine. smlawb and smlawt can then be selected
using tablegen. Added some helper functions to detect shift patterns
as well as a wrapper around SimplifyDemandBits. Added a couple of
extra tests.

Differential Revision: https://reviews.llvm.org/D30708

llvm-svn: 297716
2017-03-14 09:13:22 +00:00
Oren Ben Simhon fe34c5e429 Disable Callee Saved Registers
Each Calling convention (CC) defines a static list of registers that should be preserved by a callee function. All other registers should be saved by the caller.
Some CCs use additional condition: If the register is used for passing/returning arguments – the caller needs to save it - even if it is part of the Callee Saved Registers (CSR) list.
The current LLVM implementation doesn’t support it. It will save a register if it is part of the static CSR list and will not care if the register is passed/returned by the callee.
The solution is to dynamically allocate the CSR lists (Only for these CCs). The lists will be updated with actual registers that should be saved by the callee.
Since we need the allocated lists to live as long as the function exists, the list should reside inside the Machine Register Info (MRI) which is a property of the Machine Function and managed by it (and has the same life span).
The lists should be saved in the MRI and populated upon LowerCall and LowerFormalArguments.
The patch will also assist to implement future no_caller_saved_regsiters attribute intended for interrupt handler CC.

Differential Revision: https://reviews.llvm.org/D28566

llvm-svn: 297715
2017-03-14 09:09:26 +00:00
George Rimar 2d2621090d [ELF] - Step to combine LinkerScript and LinkerScriptBase
We can move all not templated functionality to LinkerScriptBase.
Patch do that for hasPhdrsCommands() and shows how it helps to detemplate
things in other places.

Probably we should be able to merge these 2 classes into single one after such steps.
Even if not, it still looks as reasonable cleanup for me.

Differential revision: https://reviews.llvm.org/D30895

llvm-svn: 297714
2017-03-14 09:03:53 +00:00
Eugene Leviant 5784e96f5c [ELF] Fix LMA offset calculation
Differential revision: https://reviews.llvm.org/D30832

llvm-svn: 297713
2017-03-14 08:57:09 +00:00
Eugene Leviant 30c1b436ad [ELF] Fix crash when .eh_frame(_hdr) is discarded
lld crashes when .eh_frame or .eh_frame_hdr section is discarded
in linker script and there is no PHDRS directive.

Differential revision: https://reviews.llvm.org/D30885

llvm-svn: 297712
2017-03-14 08:49:09 +00:00
Eugene Leviant 2968547997 [ELF] Fix error reporting for synthetic sections
Synthetic sections don't belong to any input file, but still they
are input sections. Whenever problem occurs with relocations in
these sections lld crashes in error reporting, trying to print
input file name.

Differential revision: https://reviews.llvm.org/D30889

llvm-svn: 297711
2017-03-14 08:33:45 +00:00
Tobias Grosser d614b3e6bd Preserve the isl-noexceptions.h C++ bindings when updating isl
The bindings currently need to be generated manually, as they are not yet
part of the official isl distribution. Hence, we keep them across updates
assuming they only need to be updated when new functions or functionality
should be exposed.

llvm-svn: 297710
2017-03-14 07:46:28 +00:00
Tobias Grosser 9c19a0e16a Add back header file that was accidentally dropped in previous update
llvm-svn: 297709
2017-03-14 07:39:05 +00:00
Tobias Grosser 593ebdfbd1 Update to isl-0.18-369-g5e613c6
This is a regular maintenance update.

llvm-svn: 297708
2017-03-14 07:33:26 +00:00
Craig Topper 7a5ee1c5ed [AVX-512] Use iPTR instead of i64 in patterns for extract_subvector/insert_subvector index.
llvm-svn: 297707
2017-03-14 06:40:04 +00:00
Craig Topper b0a82eaea6 [AVX-512] Add test cases that demonstrate some patterns that don't work correctly in 32-bit mode. NFC
llvm-svn: 297706
2017-03-14 06:40:00 +00:00
Jonas Paulsson a48ea231c0 [TargetTransformInfo] getIntrinsicInstrCost() scalarization estimation improved
getIntrinsicInstrCost() used to only compute scalarization cost based on types.
This patch improves this so that the actual arguments are checked when they are
available, in order to handle only unique non-constant operands.

Tests updates:

Analysis/CostModel/X86/arith-fp.ll
Transforms/LoopVectorize/AArch64/interleaved_cost.ll
Transforms/LoopVectorize/ARM/interleaved_cost.ll

The improvement in getOperandsScalarizationOverhead() to differentiate on
constants made it necessary to update the interleaved_cost.ll tests even
though they do not relate to intrinsics.

Review: Hal Finkel
https://reviews.llvm.org/D29540

llvm-svn: 297705
2017-03-14 06:35:36 +00:00
Craig Topper 9d50e187cd [AVX-512] Pre-emptively fix more places in fastisel where we might copy a VK1 register into a AH/BH/CH/DH register.
llvm-svn: 297704
2017-03-14 04:18:25 +00:00
Bruno Cardoso Lopes 704c8a929b Fix cmake to find the compiler-rt libs on darwin
Followup for r297553, which left darwin in a broken state
http://green.lab.llvm.org/green/job/clang-stage2-cmake-RgSan_build/3812

rdar://problem/31011980

llvm-svn: 297703
2017-03-14 04:12:29 +00:00
Akira Hatanaka ff8534b896 [CodeGen][ObjC] Fix a bug where the type of an ivar wasn't encoded
correctly.

This fixes PR30413.

Patch by David Lobron.

llvm-svn: 297702
2017-03-14 04:00:52 +00:00
Jason Molenda b9d9ac49eb update.
llvm-svn: 297701
2017-03-14 03:28:27 +00:00
Vedant Kumar 42c17ec5ac [ubsan] Add a nullability sanitizer
Teach UBSan to detect when a value with the _Nonnull type annotation
assumes a null value. Call expressions, initializers, assignments, and
return statements are all checked.

Because _Nonnull does not affect IRGen, the new checks are disabled by
default. The new driver flags are:

  -fsanitize=nullability-arg      (_Nonnull violation in call)
  -fsanitize=nullability-assign   (_Nonnull violation in assignment)
  -fsanitize=nullability-return   (_Nonnull violation in return stmt)
  -fsanitize=nullability          (all of the above)

This patch builds on top of UBSan's existing support for detecting
violations of the nonnull attributes ('nonnull' and 'returns_nonnull'),
and relies on the compiler-rt support for those checks. Eventually we
will need to update the diagnostic messages in compiler-rt (there are
FIXME's for this, which will be addressed in a follow-up).

One point of note is that the nullability-return check is only allowed
to kick in if all arguments to the function satisfy their nullability
preconditions. This makes it necessary to emit some null checks in the
function body itself.

Testing: check-clang and check-ubsan. I also built some Apple ObjC
frameworks with an asserts-enabled compiler, and verified that we get
valid reports.

Differential Revision: https://reviews.llvm.org/D30762

llvm-svn: 297700
2017-03-14 01:56:34 +00:00
Daniel Berlin 620f86ff2b Add missing condprop-xfail.ll that contains the remaining xfail'd tests
llvm-svn: 297699
2017-03-14 01:46:51 +00:00
Nirav Dave 4fc8401abf Recommitting Craig Topper's patch now that r296476 has been recommitted.
When checking if chain node is foldable, make sure the intermediate nodes have a single use across all results not just the result that was used to reach the chain node.

This recovers a test case that was severely broken by r296476, my making sure we don't create ADD/ADC that loads and stores when there is also a flag dependency.

llvm-svn: 297698
2017-03-14 01:42:23 +00:00
Weiming Zhao 4f821702ec [Builtin][AArch64] Fix build errors of test cases
Summary:
{mul,sub}tf3_test.c have build errors [1] because macro "COMPILER_RT_ABI" is defined in "int_lib.h", which should be included in test cases.

[1] http://lab.llvm.org:8011/builders/clang-cmake-aarch64-39vma/builds/4861/steps/ninja%20check%201/logs/FAIL%3A%20Builtins-aarch64-linux%3A%3A%20multf3_test.c

Reviewers: rengolin, sdmitriev, dschuff, compnerd, jroelofs

Reviewed By: jroelofs

Subscribers: llvm-commits, aemerson

Differential Revision: https://reviews.llvm.org/D30872

llvm-svn: 297697
2017-03-14 00:44:15 +00:00
Daniel Jasper c79e4d2d25 clang-format: Make it very slighly more expensive to wrap between "= {".
This prevents unwanted fallout from r296664. Specifically in proto formatting,
this changed:
  optional Aaaaaaaa aaaaaaaa = 12 [
    (aaa) = aaaa,
    (bbbbbbbbbbbbbbbbbbbbbbbbbb) = {
      aaaaaaaaaaaaaaaaa: true,
      aaaaaaaaaaaaaaaa: true
    }
  ];

Into:
  optional Aaaaaaaa aaaaaaaa = 12 [
    (aaa) = aaaa,
    (bbbbbbbbbbbbbbbbbbbbbbbbbb) =
        {aaaaaaaaaaaaaaaaa: true, aaaaaaaaaaaaaaaa: true}
  ];

Which is considered less readable. Generally, it seems preferable to
format such dict literals as blocks rather than contract them to one
line.

llvm-svn: 297696
2017-03-14 00:40:32 +00:00
Nirav Dave 54e22f33d9 In visitSTORE, always use FindBetterChain, rather than only when UseAA is enabled.
Recommiting with compiler time improvements

    Recommitting after fixup of 32-bit aliasing sign offset bug in DAGCombiner.

    * Simplify Consecutive Merge Store Candidate Search

    Now that address aliasing is much less conservative, push through
    simplified store merging search and chain alias analysis which only
    checks for parallel stores through the chain subgraph. This is cleaner
    as the separation of non-interfering loads/stores from the
    store-merging logic.

    When merging stores search up the chain through a single load, and
    finds all possible stores by looking down from through a load and a
    TokenFactor to all stores visited.

    This improves the quality of the output SelectionDAG and the output
    Codegen (save perhaps for some ARM cases where we correctly constructs
    wider loads, but then promotes them to float operations which appear
    but requires more expensive constant generation).

    Some minor peephole optimizations to deal with improved SubDAG shapes (listed below)

    Additional Minor Changes:

      1. Finishes removing unused AliasLoad code

      2. Unifies the chain aggregation in the merged stores across code
         paths

      3. Re-add the Store node to the worklist after calling
         SimplifyDemandedBits.

      4. Increase GatherAllAliasesMaxDepth from 6 to 18. That number is
         arbitrary, but seems sufficient to not cause regressions in
         tests.

      5. Remove Chain dependencies of Memory operations on CopyfromReg
         nodes as these are captured by data dependence

      6. Forward loads-store values through tokenfactors containing
          {CopyToReg,CopyFromReg} Values.

      7. Peephole to convert buildvector of extract_vector_elt to
         extract_subvector if possible (see
         CodeGen/AArch64/store-merge.ll)

      8. Store merging for the ARM target is restricted to 32-bit as
         some in some contexts invalid 64-bit operations are being
         generated. This can be removed once appropriate checks are
         added.

    This finishes the change Matt Arsenault started in r246307 and
    jyknight's original patch.

    Many tests required some changes as memory operations are now
    reorderable, improving load-store forwarding. One test in
    particular is worth noting:

      CodeGen/PowerPC/ppc64-align-long-double.ll - Improved load-store
      forwarding converts a load-store pair into a parallel store and
      a memory-realized bitcast of the same value. However, because we
      lose the sharing of the explicit and implicit store values we
      must create another local store. A similar transformation
      happens before SelectionDAG as well.

    Reviewers: arsenm, hfinkel, tstellarAMD, jyknight, nhaehnle

llvm-svn: 297695
2017-03-14 00:34:14 +00:00
Eli Friedman f5f1762ac6 Fix crash with interrupt attribute on ARM.
An indirect call has no associated function declaration.

llvm-svn: 297694
2017-03-14 00:18:29 +00:00
Juergen Ributzka f978743907 Reapply [VFS] Ignore broken symlinks in the directory iterator.
Modified the tests to accept any iteration order, to run only on Unix, and added
additional error reporting to investigate SystemZ bot issue.

The VFS directory iterator and recursive directory iterator behave differently
from the LLVM counterparts. Once the VFS iterators hit a broken symlink they
immediately abort. The LLVM counterparts don't stat entries unless they have to
descend into the next directory, which allows to recover from this issue by
clearing the error code and skipping to the next entry.

This change adds similar behavior to the VFS iterators. There should be no
change in current behavior in the current CLANG source base, because all
clients have loop exit conditions that also check the error code.

This fixes rdar://problem/30934619.

Differential Revision: https://reviews.llvm.org/D30768

llvm-svn: 297693
2017-03-14 00:14:40 +00:00
Vitaly Buka 0c736d8b36 [libFuzzer] Reorder includes in test
llvm-svn: 297692
2017-03-13 23:49:00 +00:00
Chris Bieneman c934e928cd [debugserver] NFC. Missed one bit of cleanup in r297688
I did this cleanup in the x86_64, but missed it in the i386 code. This just simplifies the calls to thread_get_state.

llvm-svn: 297691
2017-03-13 23:46:50 +00:00
Vitaly Buka 27441e5c47 [libFuzzer] Fix compilation of CustomCrossOverAndMutateTest on Windows
llvm-svn: 297690
2017-03-13 23:46:30 +00:00
Zachary Turner 6ac232caed Add the beginning of PDB diffing support.
For now this only diffs the stream directory and the MSF
Superblock.  Future patches will drill down into individual
streams to find out where the differences lie.

Differential Revision: https://reviews.llvm.org/D30908

llvm-svn: 297689
2017-03-13 23:28:25 +00:00
Chris Bieneman b3c780875d [debugserver] NFC. Cleanup DNBArchImpl*::GetFPUState()
This patch consolidates the DEBUG_FPU_REGS code for i386 and x86_64 to take advantage of the fact that the non-AVX members of the avx register state structure overlap with the standard fpu register state structure.

This reduces the amount of code required to set debug values into the register state structures because the register state structures are stored in a union.

llvm-svn: 297688
2017-03-13 23:27:58 +00:00
Rui Ueyama 034a33a942 Remove a useless temporary variable.
llvm-svn: 297687
2017-03-13 23:26:37 +00:00
Rui Ueyama f327999a45 Simplify and add comments. NFC.
llvm-svn: 297686
2017-03-13 23:23:40 +00:00
Chris Bieneman 1899e8d9e8 [debugserver] This is a small cleanup patch to AVX support detection
Summary:
The first Sandybridge iMacs with AVX support shipped in Spring 2011 with Snow Leopard as their OS. Unfortunately due to a kernel bug debugging AVX code was not really possible until 10.7.4.

The old code here checked the kernel build number to determine when to support AVX, but that code was incorrect. It verified that the kernel build number was greater than xnu-2020, which is the build of the kernel that had the fix for 10.8. The fix was also back ported to 10.7.4. Which means all publicly available OS builds 10.7.4 and later have working AVX support.

This new patch verifies that the host OS is greater than or equal to 10.7.4 by checking that the build number is greater than or equal to 11Exx.

The patch also removes the HasAVX assembly blob in favor of querying the kernel via sysctl for the hardware features.

Using sysctl is slower, however since the code is executed once and the result cached it is a better approach because it is possible for the kernel to disable AVX support on hardware that supports it, so listening to the kernel is a better approach for the debugger to take.

Reviewers: jasonmolenda, spyffe

Subscribers: lldb-commits, mgorny

Differential Revision: https://reviews.llvm.org/D30918

llvm-svn: 297685
2017-03-13 23:19:04 +00:00
Adrian Prantl 19aadf57c8 Revert "Debug Info: Add basic support for external types references."
This reverts commit r242302. External type refs of this form were
never used by any LLVM frontend so this is effectively dead code.
(They were introduced to support clang module debug info, but in the
end we came up with a better design that doesn't use this feature at
all.)

rdar://problem/25897929

Differential Revision: https://reviews.llvm.org/D30917

llvm-svn: 297684
2017-03-13 22:56:14 +00:00
Daniel Berlin 2aa23e8881 NewGVN: We pass rle-nonlocal, we just perform the replacement in a way that keeps the old name instead of the new one
llvm-svn: 297683
2017-03-13 22:43:30 +00:00
Artyom Skrobov bf19d4bc29 [Thumb1] combine ADDC/SUBC with a negative immediate
Summary: This simple optimization has been split out of https://reviews.llvm.org/D30400

Reviewers: efriedma, jmolloy

Subscribers: llvm-commits, rengolin

Differential Revision: https://reviews.llvm.org/D30829

llvm-svn: 297682
2017-03-13 22:36:14 +00:00
Reid Kleckner 987a281afe Fix -Wunused-lambda-capture warning in new code
llvm-svn: 297681
2017-03-13 22:33:07 +00:00
Reid Kleckner 1f55d69227 Widen AST bitfields too small to represent all enumerators
All of these were found by a new warning that I am prototyping,
-Wbitfield-enum-conversion.

Stmt::ExprBits::ObjectKind - This was not wide enough to represent
OK_ObjSubscript, so this was a real, true positive bug.

ObjCDeclSpec::objCDeclQualifier - On Windows, setting DQ_CSNullability
would cause the bitfield to become negative because enum types are
always implicitly 'int' there. This would probably never be noticed
because this is a flag-style enum, so we only ever test one bit at a
time. Switching to 'unsigned' also makes this type pack smaller on
Windows.

FunctionDecl::SClass - Technically, we only need two bits for all valid
function storage classes. Functions can never have automatic or register
storage class. This seems a bit too clever, and we have a bit to spare,
so widening the bitfield seems like the best way to pacify the warning.
You could classify this as a false positive, but widening the bitfield
defends us from invalid ASTs.

llvm-svn: 297680
2017-03-13 22:33:04 +00:00
Rui Ueyama fed8b570b7 Make FileOutputBuffer fail early if you pass a directory.
Previously, it created a temporary directory and then failed when
FileOutputBuffer tried to rename that file to the destination file
(which is actually a directory name).

Differential Revision: https://reviews.llvm.org/D30912

llvm-svn: 297679
2017-03-13 22:19:05 +00:00
Craig Topper 784f241b59 [AVX-512] Fix another case where we are copying from a mask register using AH/BH/CH/DH with fastisel.
Fixes PR32256. Still planning to do an audit for other possible cases.

llvm-svn: 297678
2017-03-13 21:58:54 +00:00