307c053f2e
ExecutionEngine::clearGlobalMappingsFromModule failed to remove reverse
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mappings, which could cause errors and assert-failures. This patch fixes that,
adds a test, and refactors the global-mapping-removal code into a single place.
llvm-svn: 83678
2009-10-09 22:10:27 +00:00
f4eb6777e5
Add a const qualifier.
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llvm-svn: 83677
2009-10-09 22:09:05 +00:00
96a5b87ae2
Use names instead of numbers for some of the magic
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constants used in inlining heuristics (especially
those used in more than one file). No functional change.
llvm-svn: 83675
2009-10-09 21:42:02 +00:00
a2b99107c4
Added another bit of the ARM target assembler to llvm-mc to parse register
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lists. Changed ARMAsmParser::MatchRegisterName to return -1 instead of 0 on
errors so 0-15 values could be returned as register numbers. Also added the
rest of the arm register names to the currently hacked up version to allow more
testing. Some changes to ARMAsmParser::ParseOperand to give different errors
for things not yet supported and some additions to the hacked
ARMAsmParser::MatchInstruction to allow more testing for now.
llvm-svn: 83673
2009-10-09 21:12:28 +00:00
e19c1810d7
isTriviallyReMaterializable checks the
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TargetInstrDesc::isRematerializable flag, so it isn't necessary to do
this check in its callers.
llvm-svn: 83671
2009-10-09 21:02:10 +00:00
7d9dffb413
Fix the x86 test-shrink optimization so that it doesn't shrink comparisons
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when one of the bits being tested would end up being the sign bit in the
narrower type, and a signed comparison is being performed, since this would
change the result of the signed comparison. This fixes PR5132.
llvm-svn: 83670
2009-10-09 20:35:19 +00:00
dd76bb23d1
Add basic infrastructure and x86 support for preserving MachineMemOperand
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information when unfolding memory references.
llvm-svn: 83656
2009-10-09 18:10:05 +00:00
fafa1fe2ad
Check invalid debug info for enums. This may happen when underlyng enum is optimized away. Eventually DwarfChecker will clean this up during llvm verification stage.
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llvm-svn: 83655
2009-10-09 17:51:49 +00:00
26070c5cff
when previous scratch register is killed, flag the value as no longer tracking
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llvm-svn: 83653
2009-10-09 17:33:33 +00:00
dc4893abfe
Revert r83606 and add comments explaining why it isn't safe.
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llvm-svn: 83649
2009-10-09 16:35:06 +00:00
7ddb844a2d
Give Dan and my recent changes, machine LICM is now code size neutral.
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llvm-svn: 83624
2009-10-09 06:31:25 +00:00
ccd4545ecb
Fix a logic error that caused non-rematable loop invariants loads to be licm'ed out of loop.
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llvm-svn: 83622
2009-10-09 06:21:52 +00:00
be27d61cbc
Reset kill markers after live interval is reconstructed.
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llvm-svn: 83608
2009-10-09 01:17:11 +00:00
d65387a49f
Preserve HasNSW and HasNUW when constructing SCEVs for Add and Mul
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instructions.
llvm-svn: 83606
2009-10-09 00:41:22 +00:00
3059924bdd
When considering whether to inline Callee into Caller,
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and that will make Caller too big to inline, see if it
might be better to inline Caller into its callers instead.
This situation is described in PR 2973, although I haven't
tried the specific case in SPASS.
llvm-svn: 83602
2009-10-09 00:11:32 +00:00
816fe0a4aa
Add the ability to track HasNSW and HasNUW on more kinds of SCEV expressions.
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llvm-svn: 83601
2009-10-09 00:10:36 +00:00
84e7967fae
Add codegen support for NEON vst4lane intrinsics with 128-bit vectors.
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llvm-svn: 83600
2009-10-09 00:01:36 +00:00
c409030838
Add codegen support for NEON vst3lane intrinsics with 128-bit vectors.
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llvm-svn: 83598
2009-10-08 23:51:31 +00:00
b851eb356a
Add codegen support for NEON vst2lane intrinsics with 128-bit vectors.
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llvm-svn: 83596
2009-10-08 23:38:24 +00:00
38ba47225a
Add codegen support for NEON vld4lane intrinsics with 128-bit vectors.
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Also fix some copy-and-paste errors in previous changes.
llvm-svn: 83590
2009-10-08 22:53:57 +00:00
e23984fbbe
Remove code that makes no sense.
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llvm-svn: 83589
2009-10-08 22:42:35 +00:00
cf54e934f8
Add codegen support for NEON vld3lane intrinsics with 128-bit vectors.
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llvm-svn: 83585
2009-10-08 22:27:33 +00:00
da3c79698c
Update CMake build yet again after a source file was removed
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llvm-svn: 83575
2009-10-08 21:24:34 +00:00
3dc625cdce
It's possible for a global variable to be optimized out of a metadata object. So
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we should allow a "null" with this dyn_cast.
llvm-svn: 83573
2009-10-08 20:52:51 +00:00
222b86cd54
Use lower16 / upper16 imm modifiers to asmprint 32-bit imms splitted via movt/movw pair.
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llvm-svn: 83572
2009-10-08 20:43:22 +00:00
e1969dcd11
Clear variable debug info map at the end of the function.
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llvm-svn: 83571
2009-10-08 20:41:17 +00:00
c2728f44a9
Add codegen support for NEON vld2lane intrinsics with 128-bit vectors.
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llvm-svn: 83568
2009-10-08 18:56:10 +00:00
fac9476589
Clean up some unnecessary initializations.
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llvm-svn: 83566
2009-10-08 18:52:56 +00:00
4facd965bd
Clean up a comment (indentation was wrong).
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llvm-svn: 83565
2009-10-08 18:51:31 +00:00
2a45a65511
Add a SelectionDAG getTargetInsertSubreg convenience function,
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similar to getTargetExtractSubreg.
llvm-svn: 83564
2009-10-08 18:49:46 +00:00
20b2a77765
Do not record line number to implicitly mark start of function if function has arguments. Extra line number entries trip gdb in some cases.
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llvm-svn: 83563
2009-10-08 18:48:03 +00:00
02fda54e8f
Add missing names for the XCore specific LADD and LSUB nodes.
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llvm-svn: 83556
2009-10-08 17:14:57 +00:00
09984279fd
Add a form of addPreserved which takes a string argument, to allow passes
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to declare that they preserve other passes without needing to pull in
additional header file or library dependencies. Convert MachineFunctionPass
and CodeGenLICM to make use of this.
llvm-svn: 83555
2009-10-08 17:00:02 +00:00
4e13316bf9
Add some peepholes for signed comparisons using ashr X, X, 32.
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llvm-svn: 83549
2009-10-08 15:38:17 +00:00
78765deded
remove LoopVR pass. According to Nick:
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"LoopVR's logic was copied into ScalarEvolution::getUnsignedRange and
::getSignedRange. Please delete LoopVR."
llvm-svn: 83531
2009-10-08 06:42:44 +00:00
b6b0ab6117
Add codegen support for NEON vst4 intrinsics with <1 x i64> vectors.
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llvm-svn: 83526
2009-10-08 05:18:18 +00:00
534ea5ae32
Cleanup up unused R3LiveIn tracking.
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llvm-svn: 83522
2009-10-08 01:50:26 +00:00
c0615aa17f
Re-enable register scavenging in Thumb1 by default.
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llvm-svn: 83521
2009-10-08 01:46:59 +00:00
48a805bc6c
bugfix. The target may use virtual registers that aren't tracked for re-use but are allocated by the scavenger. The re-use algorithm needs to watch for that.
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llvm-svn: 83519
2009-10-08 01:09:45 +00:00
71387b4b2f
Add codegen support for NEON vst3 intrinsics with <1 x i64> vectors.
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llvm-svn: 83518
2009-10-08 00:28:28 +00:00
d4f5670096
Add codegen support for NEON vst2 intrinsics with <1 x i64> vectors.
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llvm-svn: 83513
2009-10-08 00:21:01 +00:00
dafd08ea7e
In instcombine's debug output, avoid printing ADD for instructions that are
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already on the worklist, and print Visited when an instruction is about to be
visited. Net, on one input, this reduced the output size by at least 9x.
llvm-svn: 83510
2009-10-08 00:12:24 +00:00
32cc4ec304
Add codegen support for NEON vld4 intrinsics with <1 x i64> vectors.
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llvm-svn: 83508
2009-10-07 23:54:04 +00:00
5ef3c6d9f4
Add codegen support for NEON vld3 intrinsics with <1 x i64> vectors.
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llvm-svn: 83506
2009-10-07 23:39:57 +00:00
763be1a248
Add codegen support for NEON vld2 intrinsics with <1 x i64> vectors.
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llvm-svn: 83502
2009-10-07 22:57:01 +00:00
456735c54b
reverting thumb1 scavenging default due to test failure while I figure out what's up.
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llvm-svn: 83501
2009-10-07 22:49:41 +00:00
63fe7ff7d9
second half of lazy liveness removal.
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llvm-svn: 83500
2009-10-07 22:49:30 +00:00
e32fe29d29
Fix handling of x86 'R' constraint.
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llvm-svn: 83499
2009-10-07 22:47:20 +00:00
267fa622fa
Enable thumb1 register scavenging by default.
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llvm-svn: 83496
2009-10-07 22:26:31 +00:00
37cf79e5a6
Enable thumb1 register scavenging by default.
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llvm-svn: 83494
2009-10-07 22:26:14 +00:00
Jeffrey Yasskin