075250bda1
Disable this code, which broke many tests last night
...
llvm-svn: 23114
2005-08-27 16:16:51 +00:00
5ee85e89b6
fix PHI node emission for basic blocks that have select_cc's in them on ppc32
...
llvm-svn: 23113
2005-08-27 00:58:02 +00:00
56ca46ee04
Nate noticed that Andrew never did this. This fixes PR600
...
llvm-svn: 23110
2005-08-26 22:50:40 +00:00
e7a2998064
Don't copy regs that are only used in the entry block into a vreg. This
...
changes the code generated for:
short %test(short %A) {
%B = xor short %A, -32768
ret short %B
}
to:
_test:
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
instead of:
_test:
rlwinm r2, r3, 0, 16, 31
xori r2, r3, 32768
xoris r2, r2, 65535
extsh r3, r2
blr
llvm-svn: 23109
2005-08-26 22:49:59 +00:00
d4f43f7967
Make this code safe for when loadRegFromStackSlot inserts multiple instructions.
...
llvm-svn: 23108
2005-08-26 22:18:32 +00:00
4a5ebe94ba
Checking types here is not safe, because multiple types can map to the same
...
register class.
llvm-svn: 23103
2005-08-26 21:39:15 +00:00
13d7c252e5
Call the InsertAtEndOfBasicBlock hook if the usesCustomDAGSchedInserter
...
flag is set on an instruction.
llvm-svn: 23098
2005-08-26 20:54:47 +00:00
373f048a79
Revampt ReplaceAllUsesWith to be more efficient and easier to use.
...
llvm-svn: 23087
2005-08-26 18:36:28 +00:00
c30405e0ee
Change ConstantPoolSDNode to actually hold the Constant itself instead of
...
putting it into the constant pool. This allows the isel machinery to
create constants that it will end up deciding are not needed, without them
ending up in the resultant function constant pool.
llvm-svn: 23081
2005-08-26 17:15:30 +00:00
2091a36631
Fix a huge annoyance: SelectNodeTo took types before the opcode unlike
...
every other SD API. Fix it to take the opcode before the types.
llvm-svn: 23079
2005-08-26 16:36:26 +00:00
c6d481db7a
the 5th operand is the 4th number
...
llvm-svn: 23074
2005-08-26 00:43:46 +00:00
5f573416cd
Add support for targets that want to custom expand select_cc in some cases.
...
llvm-svn: 23071
2005-08-26 00:23:59 +00:00
dff50cadaa
Allow LowerOperation to return a null SDOperand in case it wants to lower
...
some things given to it, but not all.
llvm-svn: 23070
2005-08-26 00:14:16 +00:00
1cb550c603
Fix a nasty bug from a previous patch of mine
...
llvm-svn: 23069
2005-08-26 00:13:12 +00:00
33840c3268
New fold for SELECT_CC
...
llvm-svn: 23058
2005-08-25 20:04:38 +00:00
f9c19157df
Don't auto-cse nodes that return flags
...
llvm-svn: 23055
2005-08-25 19:12:10 +00:00
12756be53b
add printer support for flag operands
...
llvm-svn: 23054
2005-08-25 17:59:23 +00:00
9d28a56d55
simplify the code a bit using isOperationLegal
...
llvm-svn: 23053
2005-08-25 17:54:58 +00:00
8a93f64efa
Add support for flag operands
...
llvm-svn: 23050
2005-08-25 17:48:54 +00:00
407c6415b4
ADd support for TargetConstantPool nodes
...
llvm-svn: 23041
2005-08-25 05:03:06 +00:00
bbe0e7df2c
add a new TargetFrameIndex node
...
llvm-svn: 23035
2005-08-25 00:43:01 +00:00
45e1ce4e28
add a method
...
llvm-svn: 23027
2005-08-24 23:00:29 +00:00
d7ee4d8671
Add ReplaceAllUsesWith that can take a vector of replacement values.
...
Add some foldings to hopefully help the illegal setcc issue, and move some code around.
llvm-svn: 23025
2005-08-24 22:44:39 +00:00
ad9565dfbe
Add support for external symbols, and support for variable arity instructions
...
llvm-svn: 23022
2005-08-24 22:02:41 +00:00
bb8cc0acb2
Fix pasto that prevented VT ndoes from showing up in -view-isel-dags correctly
...
llvm-svn: 23021
2005-08-24 18:30:00 +00:00
86b1658d58
teach selection dag mask tracking about the fact that select_cc operates like
...
select. Also teach it that the bit count instructions can only set the low bits
of the result, depending on the size of the input.
This allows us to compile this:
int %eq0(int %a) {
%tmp.1 = seteq int %a, 0 ; <bool> [#uses=1]
%tmp.2 = cast bool %tmp.1 to int ; <int> [#uses=1]
ret int %tmp.2
}
To this:
_eq0:
cntlzw r2, r3
srwi r3, r2, 5
blr
instead of this:
_eq0:
cntlzw r2, r3
rlwinm r3, r2, 27, 31, 31
blr
when setcc is marked illegal on ppc (which restores parity to non-illegal
setcc). Thanks to Nate for pointing this out.
llvm-svn: 23013
2005-08-24 16:46:55 +00:00
f12eb4d676
Start using isOperationLegal and isTypeLegal to simplify the code
...
llvm-svn: 23012
2005-08-24 16:35:28 +00:00
45bbbb3f11
Teach SelectionDAG how to simplify a few more setcc-equivalent select_cc
...
nodes so that backends don't have to.
llvm-svn: 22999
2005-08-24 04:57:57 +00:00
99282c7b92
Make -view-isel-dags show the dag before instruction selecting, in case
...
the target isel crashes due to unimplemented features like calls :)
llvm-svn: 22997
2005-08-24 00:34:29 +00:00
72eab5dd5c
Fix optimization of select_cc seteq X, 0, 1, 0 -> srl (ctlz X), log2 X size
...
llvm-svn: 22995
2005-08-24 00:21:28 +00:00
eeacce5a60
Implement LiveVariables.h change
...
llvm-svn: 22994
2005-08-24 00:09:33 +00:00
469652752c
adjust to new live variables interface
...
llvm-svn: 22992
2005-08-23 23:42:17 +00:00
774158239b
Simplify this code by using higher-level LiveVariables methods
...
llvm-svn: 22989
2005-08-23 22:51:41 +00:00
22e91cc3b5
Keep track of which registers are related to which other registers.
...
Use this information to avoid doing expensive interval intersections for
registers that could not possible be interesting. This speeds up linscan
on ia64 compiling kc++ in release mode from taking 7.82s to 4.8s(!), total
itanium llc time on this program is 27.3s now. This marginally speeds up
PPC and X86, but they appear to be limited by other parts of linscan, not
this code.
On this program, on itanium, live intervals now takes 41% of llc time.
llvm-svn: 22986
2005-08-23 22:27:31 +00:00
bf8c3939d7
Teach the SelectionDAG how to transform select_cc eq, X, 0, 1, 0 into
...
either seteq X, 0 or srl (ctlz X), size(X-1), depending on what's legal
for the target.
llvm-svn: 22978
2005-08-23 05:41:12 +00:00
987121a61a
Teach Legalize how to turn setcc into select_cc
...
llvm-svn: 22977
2005-08-23 04:29:48 +00:00
834a2316a3
Try to avoid scanning the fixed list. On architectures with a non-stupid
...
number of regs (e.g. most riscs), many functions won't need to use callee
clobbered registers. Do a speculative check to see if we can get a free
register without processing the fixed list (which has all of these). This
saves a lot of time on machines with lots of callee clobbered regs (e.g.
ppc and itanium, also x86).
This reduces ppc llc compile time from 184s -> 172s on kc++. This is probably
worth FAR FAR more on itanium though.
llvm-svn: 22972
2005-08-22 20:59:30 +00:00
95a157ae1a
Move some code in the register assignment case that only needs to happen if
...
we spill out of the fast path. The scan of active_ and the calls to
updateSpillWeights don't need to happen unless a spill occurs. This reduces
debug llc time of kc++ with ppc from 187.3s to 183.2s.
llvm-svn: 22971
2005-08-22 20:20:42 +00:00
7f9e078d11
Fix a problem where constant expr shifts would not have their shift amount
...
promoted to the right type. This fixes: IA64/2005-08-22-LegalizerCrash.ll
llvm-svn: 22969
2005-08-22 17:28:31 +00:00
83b821b584
Speed up this loop a bit, based on some observations that Nate made, and
...
add some comments. This loop really needs to be reevaluated!
llvm-svn: 22966
2005-08-22 16:55:22 +00:00
92626b9bc5
Add a fast-path for register values. Add support for constant pool entries,
...
allowing us to compile this:
float %test2(float* %P) {
%Q = load float* %P
%R = add float %Q, 10.1
ret float %R
}
to this:
_test2:
lfs r2, 0(r3)
lis r3, ha16(.CPI_test2_0)
lfs r3, lo16(.CPI_test2_0)(r3)
fadds f1, r2, r3
blr
llvm-svn: 22962
2005-08-22 01:04:32 +00:00
466fecee19
add anew method
...
llvm-svn: 22957
2005-08-21 22:30:30 +00:00
4866356907
Add support for frame index nodes
...
llvm-svn: 22956
2005-08-21 19:56:04 +00:00
0548f50501
add a method
...
llvm-svn: 22955
2005-08-21 19:48:59 +00:00
707b39fb8c
add a method
...
llvm-svn: 22949
2005-08-21 18:49:33 +00:00
154b2bc59b
Add support for basic blocks, fix a bug in result # computation
...
llvm-svn: 22948
2005-08-21 18:49:29 +00:00
539c3fa863
When legalizing brcond ->brcc or select -> selectcc, make sure to truncate
...
the old condition to a one bit value. The incoming value must have been
promoted, and the top bits are undefined. This causes us to generate:
_test:
rlwinm r2, r3, 0, 31, 31
li r3, 17
cmpwi cr0, r2, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r3, 1
.LBB_test_2: ;
blr
instead of:
_test:
rlwinm r2, r3, 0, 31, 31
li r2, 17
cmpwi cr0, r3, 0
bne .LBB_test_2 ;
.LBB_test_1: ;
li r2, 1
.LBB_test_2: ;
or r3, r2, r2
blr
for:
int %test(bool %c) {
%retval = select bool %c, int 17, int 1
ret int %retval
}
llvm-svn: 22947
2005-08-21 18:03:09 +00:00
4b08ba26d8
fix bogus warning
...
llvm-svn: 22943
2005-08-20 18:07:27 +00:00
319e65696d
Add support for global address nodes
...
llvm-svn: 22940
2005-08-19 22:38:24 +00:00
1be7eddecf
Add support for TargetGlobalAddress nodes
...
llvm-svn: 22938
2005-08-19 22:31:04 +00:00
6d7f814b01
Implement CopyFromReg, TokenFactor, and fix a bug in CopyToReg. This allows
...
us to compile stuff like this:
double %test(double %A, double %B, double %C, double %E) {
%F = mul double %A, %A
%G = add double %F, %B
%H = sub double -0.0, %G
%I = mul double %H, %C
%J = add double %I, %E
ret double %J
}
to:
_test:
fnmadd f0, f1, f1, f2
fmadd f1, f0, f3, f4
blr
woot!
llvm-svn: 22937
2005-08-19 21:43:53 +00:00
0875d1ab89
Fix a bug in previous commit
...
llvm-svn: 22936
2005-08-19 21:34:13 +00:00
4990335eb8
Print physreg register nodes with target names (e.g. F1) instead of numbers
...
llvm-svn: 22934
2005-08-19 21:21:16 +00:00
78b200eb74
Before implementing copyfromreg, we'll implement copytoreg correctly.
...
This gets us this for the previous testcase:
_test:
lis r2, 0
ori r3, r2, 65535
blr
Note that we actually write to r3 (the return reg) correctly now :)
llvm-svn: 22933
2005-08-19 20:50:53 +00:00
cc3035e989
Now that we have operand info for machine instructions, use it to create
...
temporary registers for things that define a register. This allows dag->dag
isel to compile this:
int %test() { ret int 65535 }
into:
_test:
lis r2, 0
ori r2, r2, 65535
blr
Next up, getting CopyFromReg to work, allowing arguments and cross-bb values.
llvm-svn: 22932
2005-08-19 20:45:43 +00:00
486e36cfde
Fix VC++ constant truncation warning.
...
llvm-svn: 22907
2005-08-19 16:19:21 +00:00
d1f22b1282
Fix VC++ precedence warning.
...
llvm-svn: 22902
2005-08-19 04:39:48 +00:00
d18beab94c
Fix computation of # operands, add a temporary hack for CopyToReg
...
llvm-svn: 22896
2005-08-19 01:01:34 +00:00
0c8c2c102d
add a new -view-sched-dags option to view dags as they are sent to the scheduler.
...
llvm-svn: 22878
2005-08-18 20:11:49 +00:00
d342de9aaa
Implement the first chunk of a code emitter. This is sophisticated enough to
...
codegen:
_empty:
.LBB_empty_0: ;
blr
but can't do anything more (yet). :)
llvm-svn: 22876
2005-08-18 20:07:59 +00:00
1b4727de7d
new file, obviously just a stub
...
llvm-svn: 22868
2005-08-18 18:45:24 +00:00
1a908c8920
Enable critical edge splitting by default
...
llvm-svn: 22863
2005-08-18 17:35:14 +00:00
19a271a67b
Add support for target DAG nodes that take 4 operands, such as PowerPC's
...
rlwinm.
llvm-svn: 22856
2005-08-18 07:30:15 +00:00
802080d812
Fix printing of VTSDNodes
...
llvm-svn: 22853
2005-08-18 03:31:02 +00:00
d66e616545
Move the code dependency for MathExtras.h from SelectionDAGNodes.h.
...
Added some class dividers in SelectionDAG.cpp.
llvm-svn: 22841
2005-08-17 20:08:02 +00:00
b74c666186
Culling out use of unions for converting FP to bits and vice versa.
...
llvm-svn: 22838
2005-08-17 19:34:49 +00:00
ab0de9d7fc
Fix a bug in RemoveDeadNodes where it would crash when its "optional"
...
argument is not specified.
Implement ReplaceAllUsesWith.
llvm-svn: 22834
2005-08-17 19:00:20 +00:00
686d6a1cb2
Switched to using BitsToDouble for int_to_float to avoid aliasing problem.
...
llvm-svn: 22831
2005-08-17 17:42:52 +00:00
898ba557d0
Change hex float constants for the sake of VC++.
...
llvm-svn: 22828
2005-08-17 09:44:59 +00:00
c9950c11a9
Add a new beta option for critical edge splitting, to avoid a problem that
...
Nate noticed in yacr2 (and I know occurs in other places as well).
This is still rough, as the critical edge blocks are not intelligently placed
but is added to get some idea to see if this improves performance.
llvm-svn: 22825
2005-08-17 06:37:43 +00:00
ba28c2733f
Fix a regression on X86, where FP values can be promoted too.
...
llvm-svn: 22822
2005-08-17 06:06:25 +00:00
f2516a9180
Added generic code expansion for [signed|unsigned] i32 to [f32|f64] casts in the
...
legalizer. PowerPC now uses this expansion instead of ISel version.
Example:
// signed integer to double conversion
double f1(signed x) {
return (double)x;
}
// unsigned integer to double conversion
double f2(unsigned x) {
return (double)x;
}
// signed integer to float conversion
float f3(signed x) {
return (float)x;
}
// unsigned integer to float conversion
float f4(unsigned x) {
return (float)x;
}
Byte Code:
internal fastcc double %_Z2f1i(int %x) {
entry:
%tmp.1 = cast int %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc double %_Z2f2j(uint %x) {
entry:
%tmp.1 = cast uint %x to double ; <double> [#uses=1]
ret double %tmp.1
}
internal fastcc float %_Z2f3i(int %x) {
entry:
%tmp.1 = cast int %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc float %_Z2f4j(uint %x) {
entry:
%tmp.1 = cast uint %x to float ; <float> [#uses=1]
ret float %tmp.1
}
internal fastcc double %_Z2g1i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
ret double %tmp.14
}
internal fastcc double %_Z2g2j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
ret double %tmp.9
}
internal fastcc float %_Z2g3i(int %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.2 = cast int %x to uint ; <uint> [#uses=1]
%tmp.3 = xor uint %tmp.2, 2147483648 ; <uint> [#uses=1]
%tmp.5 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %tmp.3, uint* %tmp.5
%tmp.9 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.10 = load double* %tmp.9 ; <double> [#uses=1]
%tmp.13 = load double* cast (long* %signed_bias to double*) ; <double> [#uses=1]
%tmp.14 = sub double %tmp.10, %tmp.13 ; <double> [#uses=1]
%tmp.16 = cast double %tmp.14 to float ; <float> [#uses=1]
ret float %tmp.16
}
internal fastcc float %_Z2g4j(uint %x) {
entry:
%buffer = alloca [2 x uint] ; <[2 x uint]*> [#uses=3]
%tmp.0 = getelementptr [2 x uint]* %buffer, int 0, int 0 ; <uint*> [#uses=1]
store uint 1127219200, uint* %tmp.0
%tmp.1 = getelementptr [2 x uint]* %buffer, int 0, int 1 ; <uint*> [#uses=1]
store uint %x, uint* %tmp.1
%tmp.4 = cast [2 x uint]* %buffer to double* ; <double*> [#uses=1]
%tmp.5 = load double* %tmp.4 ; <double> [#uses=1]
%tmp.8 = load double* cast (long* %unsigned_bias to double*) ; <double> [#uses=1]
%tmp.9 = sub double %tmp.5, %tmp.8 ; <double> [#uses=1]
%tmp.11 = cast double %tmp.9 to float ; <float> [#uses=1]
ret float %tmp.11
}
PowerPC Code:
.machine ppc970
.const
.align 2
.CPIl1__Z2f1i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l1__Z2f1i
l1__Z2f1i:
.LBBl1__Z2f1i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl1__Z2f1i_0)
lfs f1, lo16(.CPIl1__Z2f1i_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl2__Z2f2j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l2__Z2f2j
l2__Z2f2j:
.LBBl2__Z2f2j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl2__Z2f2j_0)
lfs f1, lo16(.CPIl2__Z2f2j_0)(r2)
fsub f1, f0, f1
blr
.const
.align 2
.CPIl3__Z2f3i_0: ; float 0x4330000080000000
.long 1501560836 ; float 4.5036e+15
.text
.align 2
.globl l3__Z2f3i
l3__Z2f3i:
.LBBl3__Z2f3i_0: ; entry
xoris r2, r3, 32768
stw r2, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl3__Z2f3i_0)
lfs f1, lo16(.CPIl3__Z2f3i_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
.const
.align 2
.CPIl4__Z2f4j_0: ; float 0x4330000000000000
.long 1501560832 ; float 4.5036e+15
.text
.align 2
.globl l4__Z2f4j
l4__Z2f4j:
.LBBl4__Z2f4j_0: ; entry
stw r3, -4(r1)
lis r2, 17200
stw r2, -8(r1)
lfd f0, -8(r1)
lis r2, ha16(.CPIl4__Z2f4j_0)
lfs f1, lo16(.CPIl4__Z2f4j_0)(r2)
fsub f0, f0, f1
frsp f1, f0
blr
llvm-svn: 22814
2005-08-17 00:39:29 +00:00
0d2456e1f0
add a new TargetConstant node
...
llvm-svn: 22813
2005-08-17 00:34:06 +00:00
33182325f5
Eliminate the RegSDNode class, which 3 nodes (CopyFromReg/CopyToReg/ImplicitDef)
...
used to tack a register number onto the node.
Instead of doing this, make a new node, RegisterSDNode, which is a leaf
containing a register number. These three operations just become normal
DAG nodes now, instead of requiring special handling.
Note that with this change, it is no longer correct to make illegal
CopyFromReg/CopyToReg nodes. The legalizer will not touch them, and this
is bad, so don't do it. :)
llvm-svn: 22806
2005-08-16 21:55:35 +00:00
371e49515d
Implement BR_CC and BRTWOWAY_CC. This allows the removal of a rather nasty
...
fixme from the PowerPC backend. Emit slightly better code for legalizing
select_cc.
llvm-svn: 22805
2005-08-16 19:49:35 +00:00
bc89226527
Allow passing a dag into dump and getOperationName. If one is available
...
when printing a node, use it to render target operations with their
target instruction name instead of "<<unknown>>".
llvm-svn: 22804
2005-08-16 18:33:07 +00:00
7e57d18b79
Use a extant helper to do this.
...
llvm-svn: 22802
2005-08-16 18:31:23 +00:00
1973278b38
Add some methods for dag->dag isel.
...
Split RemoveNodeFromCSEMaps out of DeleteNodesIfDead to do it.
llvm-svn: 22801
2005-08-16 18:17:10 +00:00
d5e739dcc2
Fix last night's PPC32 regressions by
...
1. Not selecting the false value of a select_cc in the false arm, which
isn't legal for nested selects.
2. Actually returning the node we created and Legalized in the FP_TO_UINT
Expander.
llvm-svn: 22789
2005-08-14 18:38:32 +00:00
36853ee1fd
Teach the legalizer how to legalize FP_TO_UINT.
...
Teach the legalizer to promote FP_TO_UINT to FP_TO_SINT if the wider
FP_TO_UINT is also illegal. This allows us on PPC to codegen
unsigned short foo(float a) { return a; }
as:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
rlwinm r3, r2, 0, 16, 31
blr
instead of:
_foo:
.LBB_foo_0: ; entry
fctiwz f0, f1
stfd f0, -8(r1)
lwz r2, -4(r1)
lis r3, ha16(.CPI_foo_0)
lfs f0, lo16(.CPI_foo_0)(r3)
fcmpu cr0, f1, f0
blt .LBB_foo_2 ; entry
.LBB_foo_1: ; entry
fsubs f0, f1, f0
fctiwz f0, f0
stfd f0, -16(r1)
lwz r2, -12(r1)
xoris r2, r2, 32768
.LBB_foo_2: ; entry
rlwinm r3, r2, 0, 16, 31
blr
llvm-svn: 22785
2005-08-14 01:20:53 +00:00
dc3154ec66
Remove an unncessary argument to SimplifySelectCC and add an additional
...
assert when creating a select_cc node.
llvm-svn: 22780
2005-08-13 06:14:17 +00:00
b6651e81a0
Fix the fabs regression on x86 by abstracting the select_cc optimization
...
out into SimplifySelectCC. This allows both ISD::SELECT and ISD::SELECT_CC
to use the same set of simplifying folds.
llvm-svn: 22779
2005-08-13 06:00:21 +00:00
21381e8424
implement a couple of simple shift foldings.
...
e.g. (X & 7) >> 3 -> 0
llvm-svn: 22774
2005-08-12 23:54:58 +00:00
5c7656fd53
Add a select_cc optimization for recognizing abs(int). This speeds up an
...
integer MPEG encoding loop by a factor of two.
llvm-svn: 22758
2005-08-11 02:18:13 +00:00
180b08897f
Some SELECT_CC cleanups:
...
1. move assertions for node creation to getNode()
2. legalize the values returned in ExpandOp immediately
3. Move select_cc optimizations from SELECT's getNode() to SELECT_CC's,
allowing them to be cleaned up significantly.
This paves the way to pick up additional optimizations on SELECT_CC, such
as sum-of-absolute-differences.
llvm-svn: 22757
2005-08-11 01:12:20 +00:00
e5b86d7442
Add new node, SELECT_CC. This node is for targets that don't natively
...
implement SELECT.
llvm-svn: 22755
2005-08-10 20:51:12 +00:00
21c0fd9e8f
Fix an oversight that may be causing PR617.
...
llvm-svn: 22753
2005-08-10 17:37:53 +00:00
679f5b0b40
Fix spelling, fix some broken canonicalizations by my last patch
...
llvm-svn: 22734
2005-08-09 23:09:05 +00:00
14e060f743
add cc nodes to the AllNodes list so they show up in Graphviz output
...
llvm-svn: 22731
2005-08-09 20:40:02 +00:00
d47675ed24
Eliminate the SetCCSDNode in favor of a CondCodeSDNode class. This pulls the
...
CC out of the SetCC operation, making SETCC a standard ternary operation and
CC's a standard DAG leaf. This will make it possible for other node to use
CC's as operands in the future...
llvm-svn: 22728
2005-08-09 20:20:18 +00:00
88e2d2ee6b
Handle 64-bit constant exprs on 64-bit targets.
...
llvm-svn: 22696
2005-08-08 04:26:32 +00:00
0c26a0b902
add a small simplification that can be exposed after promotion/expansion
...
llvm-svn: 22691
2005-08-07 05:00:44 +00:00
96ad31321a
Change FindEarliestCallSeqEnd (used by libcall insertion) to use a set to
...
avoid revisiting nodes more than once. This eliminates a source of
potentially exponential behavior. For a small function in 191.fma3d
(hexah_stress_divergence_), this speeds up isel from taking > 20mins to
taking 0.07s.
llvm-svn: 22680
2005-08-05 18:10:27 +00:00
1095dc94a9
Fix a use-of-dangling-pointer bug, from the introduction of SrcValue's.
...
llvm-svn: 22679
2005-08-05 16:55:31 +00:00
cabdc34563
Fix a latent bug in the libcall inserter that was exposed by Nate's patch
...
yesterday. This fixes whetstone and a bunch of programs in the External tests.
llvm-svn: 22678
2005-08-05 16:23:57 +00:00
77558da546
Fix a fixme in LegalizeDAG
...
llvm-svn: 22661
2005-08-04 21:43:28 +00:00
a54e201edf
* Unbreak release build
...
* Add comments to #endif pragmas for readability
llvm-svn: 22647
2005-08-04 14:22:41 +00:00
8191442548
Fix PR611, codegen'ing SREM of FP operands to fmod or fmodf instead of
...
the sequence used for integer ops
llvm-svn: 22629
2005-08-03 20:31:37 +00:00
6667bdbaca
Update to use the new MathExtras.h support for log2 computation.
...
Patch contributed by Jim Laskey!
llvm-svn: 22594
2005-08-02 19:26:06 +00:00
4398daf069
Fix casts from long to sbyte on ppc
...
llvm-svn: 22570
2005-08-01 18:16:37 +00:00
546fd5944e
Keep tabs and trailing spaces out.
...
llvm-svn: 22565
2005-07-30 18:33:25 +00:00
941d84a34d
fix float->long conversions on x86
...
llvm-svn: 22563
2005-07-30 01:40:57 +00:00
f59b2daddb
Allow targets to have custom expanders for FP_TO_*INT conversions where
...
both the src and dest values are legal
llvm-svn: 22555
2005-07-30 00:04:12 +00:00
fe68d75aad
Allow targets to define custom expanders for FP_TO_*INT
...
llvm-svn: 22548
2005-07-29 00:33:32 +00:00
44fe26ff07
allow a target to request that unknown FP_TO_*INT conversion be promoted to
...
a larger integer destination.
llvm-svn: 22547
2005-07-29 00:11:56 +00:00
f99f8f9081
instead of having all conversions be handled by one case value, and then have
...
subcases inside, break things out earlier.
llvm-svn: 22546
2005-07-28 23:31:12 +00:00
3faa82219a
new is not a valid default anywhere, so make this pure virtual
...
llvm-svn: 22542
2005-07-28 18:13:59 +00:00
96cbfbbeaf
Fix debug info to not print out recently freed memory.
...
llvm-svn: 22529
2005-07-27 23:11:25 +00:00
9937713252
Print symbolic register names in debug dumps
...
llvm-svn: 22528
2005-07-27 23:03:38 +00:00
5f4ef3c5a8
Eliminate all remaining tabs and trailing spaces.
...
llvm-svn: 22523
2005-07-27 06:12:32 +00:00
1ac40a1245
Remove unnecessary FP_EXTEND. This causes worse codegen for SSE.
...
llvm-svn: 22469
2005-07-19 16:50:03 +00:00
b35912e421
The assertion was wrong: the code only worked for i64. While we're at it,
...
expand the code to work for all integer datatypes. This should unbreak
alpha.
llvm-svn: 22464
2005-07-18 04:31:14 +00:00
a5998ce94f
Only get the .bss and .data sections when needed instead of unconditionally.
...
This allows is to not emit empty sections when .data or .bss is not used.
llvm-svn: 22457
2005-07-16 17:41:06 +00:00
363964e53d
Refactor getSection() method to make it easier to use.
...
llvm-svn: 22455
2005-07-16 17:36:04 +00:00
fd44500427
Major refactor of the ELFWriter code. Instead of building up one big
...
vector that represents the .o file at once, build up a vector for each
section of the .o file. This is needed because the .o file writer needs
to be able to switch between sections as it emits them (e.g. switch
between the .text section and the .rel section when emitting code).
This patch has no functionality change.
llvm-svn: 22453
2005-07-16 08:01:13 +00:00
7e74c834c1
Teach the legalizer how to promote SINT_TO_FP to a wider SINT_TO_FP that
...
the target natively supports. This eliminates some special-case code from
the x86 backend and generates better code as well.
For an i8 to f64 conversion, before & after:
_x87 before:
subl $2, %esp
movb 6(%esp), %al
movsbw %al, %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_x87 after:
subl $2, %esp
movsbw 6(%esp), %ax
movw %ax, (%esp)
filds (%esp)
addl $2, %esp
ret
_sse before:
subl $12, %esp
movb 16(%esp), %al
movsbl %al, %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
_sse after:
subl $12, %esp
movsbl 16(%esp), %eax
cvtsi2sd %eax, %xmm0
addl $12, %esp
ret
llvm-svn: 22452
2005-07-16 02:02:34 +00:00
e3e847bfd7
Break the code for expanding UINT_TO_FP operations out into its own
...
SelectionDAGLegalize::ExpandLegalUINT_TO_FP method.
Add a new method, PromoteLegalUINT_TO_FP, which allows targets to request
that UINT_TO_FP operations be promoted to a larger input type. This is
useful for targets that have some UINT_TO_FP or SINT_TO_FP operations but
not all of them (like X86).
The same should be done with SINT_TO_FP, but this patch does not do that
yet.
llvm-svn: 22447
2005-07-16 00:19:57 +00:00
b47f5e6d54
You can't use config options without config.h
...
llvm-svn: 22446
2005-07-15 22:48:31 +00:00
46524e2573
Make this use the new autoconf support for finding the executables for
...
gv and Graphviz.
llvm-svn: 22434
2005-07-14 05:33:13 +00:00
fcc53ad625
As discussed on IRC, this stuff is just for debugging.
...
llvm-svn: 22432
2005-07-14 05:17:43 +00:00
51ded0e1ee
If the Graphviz program is available, use it to visualize dot graphs.
...
llvm-svn: 22429
2005-07-14 01:10:55 +00:00
f9ddfef872
Fix Alpha/2005-07-12-TwoMallocCalls.ll and PR593.
...
It is not safe to call LegalizeOp on something that has already been legalized.
Instead, just force another iteration of legalization.
This could affect all platforms but X86, as this codepath is dynamically
dead on X86 (ISD::MEMSET and friends are legal).
llvm-svn: 22419
2005-07-13 02:00:04 +00:00
ba08a336f0
Fix test/Regression/CodeGen/Generic/2005-07-12-memcpy-i64-length.ll
...
llvm-svn: 22417
2005-07-13 01:42:45 +00:00
298ac69934
Add support for 64-bit elf files
...
llvm-svn: 22400
2005-07-12 06:57:52 +00:00
33b8232ce0
VC++ demands that the function returns a value
...
llvm-svn: 22393
2005-07-12 02:53:33 +00:00
449e07f390
Clean up code, no functionality changes.
...
llvm-svn: 22382
2005-07-11 06:34:30 +00:00
5bacb00452
Emit a symbol table entry for each function we output to the ELF file. This
...
allows objdump to know which function we are emitting to:
00000000 <foo>: <----
0: b8 01 00 00 00 mov $0x1,%eax
5: 03 44 24 04 add 0x4(%esp,1),%eax
9: c3 ret
... and allows .o files to be useful for linking :)
llvm-svn: 22378
2005-07-11 06:17:35 +00:00
2244f73437
add code to emit the .text section to the section header.
...
Add a *VERY INITIAL* machine code emitter class. This is enough to take
this C function:
int foo(int X) { return X +1; }
and make objdump produce the following:
$ objdump -d t-llvm.o
t-llvm.o: file format elf32-i386
Disassembly of section .text:
00000000 <.text>:
0: b8 01 00 00 00 mov $0x1,%eax
5: 03 44 24 04 add 0x4(%esp,1),%eax
9: c3 ret
Anything using branches or refering to the constant pool or requiring
relocations will not work yet.
llvm-svn: 22375
2005-07-11 05:17:18 +00:00
dfe33bc837
Use a name mangler object to uniquify names and remove nonstandard
...
characters from them.
llvm-svn: 22371
2005-07-11 03:11:47 +00:00
de0a4b1987
Change *EXTLOAD to use an VTSDNode operand instead of being an MVTSDNode.
...
This is the last MVTSDNode.
This allows us to eliminate a bunch of special case code for handling
MVTSDNodes.
llvm-svn: 22367
2005-07-10 01:55:33 +00:00
36db1ed06f
Change TRUNCSTORE to use a VTSDNode operand instead of being an MVTSTDNode
...
llvm-svn: 22366
2005-07-10 00:29:18 +00:00
0b6ba90a72
Introduce a new VTSDNode class with the ultimate goal of eliminating the
...
MVTSDNode class. This class is used to provide an operand to operators
that require an extra type. We start by converting FP_ROUND_INREG and
SIGN_EXTEND_INREG over to using it.
llvm-svn: 22364
2005-07-10 00:07:11 +00:00
748de6e248
Add support for emitting a .data section and .bss section.
...
Add support for emitting external and .bss symbols.
llvm-svn: 22358
2005-07-08 05:47:00 +00:00
1932f5c9be
Add support for emitting the symbol table (and its string table) of the
...
module to the ELF file. Test it by adding support for emitting common
symbols. This allows us to compile this:
%X = weak global int 0
%Y = weak global int 0
%Z = weak global int 0
to an elf file that 'readelf's this:
Symbol table '.symtab' contains 4 entries:
Num: Value Size Type Bind Vis Ndx Name
0: 00000000 0 NOTYPE LOCAL DEFAULT UND
1: 00000004 4 OBJECT GLOBAL DEFAULT COM X
2: 00000004 4 OBJECT GLOBAL DEFAULT COM Y
3: 00000004 4 OBJECT GLOBAL DEFAULT COM Z
llvm-svn: 22343
2005-07-07 07:02:20 +00:00
f5473e44a9
Make several cleanups to Andrews varargs change:
...
1. Pass Value*'s into lowering methods so that the proper pointers can be
added to load/stores from the valist
2. Intrinsics that return void should only return a token chain, not a token
chain/retval pair.
3. Rename LowerVAArgNext -> LowerVAArg, because VANext is long gone.
llvm-svn: 22338
2005-07-05 19:57:53 +00:00
80fe411662
2 fixes:
...
1: Legalize operand in UINT_TO_FP expanision
2: SRA x, const i8 was not promoting the constant to shift amount type.
llvm-svn: 22337
2005-07-05 19:52:39 +00:00
be3a74ca3e
I really didn't think this was necessary. But, Legalize wasn't running again
...
and legalizing the extload. Strange. Should fix most alpha regressions.
llvm-svn: 22329
2005-07-02 20:58:53 +00:00
0a370f4de5
oops
...
llvm-svn: 22320
2005-06-30 19:32:57 +00:00
b5597e38f6
FP EXTLOAD is not support on all archs, expand to LOAD and FP_EXTEND
...
llvm-svn: 22319
2005-06-30 19:22:37 +00:00
2edc1881ac
restore old srcValueNode behavior and try to to work around it
...
llvm-svn: 22315
2005-06-29 18:54:02 +00:00
8192568fbc
tracking the instructions causing loads and stores provides more information than just the pointer being loaded or stored
...
llvm-svn: 22311
2005-06-29 15:57:19 +00:00
d74877a46d
Adapt the code for handling uint -> fp conversion for the 32 bit case to
...
handling it in the 64 bit case. The two code paths should probably be merged.
llvm-svn: 22302
2005-06-27 23:28:32 +00:00
386b151ce6
iniital checkin of ELFWriter implementation
...
For now, the elf writer is only capable of emitting an empty elf file, with
a section table and a section table string table. This will be enhanced
in the future :)
llvm-svn: 22291
2005-06-27 06:29:00 +00:00
253145299b
If we support structs as va_list, we must pass pointers to them to va_copy
...
See last commit for LangRef, this implements it on all targets.
llvm-svn: 22273
2005-06-22 21:04:42 +00:00
9144ec4764
core changes for varargs
...
llvm-svn: 22254
2005-06-18 18:34:52 +00:00
a2e8779b0d
Fix bug 537 test 2, which checks to make sure that we fold A+(B-A) -> B for
...
integer types. Add a couple checks to not perform these kinds of transform
on floating point values.
llvm-svn: 22228
2005-06-16 07:06:03 +00:00
73c4dbae23
aCC and STLport complained about this, because they're like that
...
llvm-svn: 22053
2005-05-15 13:05:48 +00:00
51836bbc82
Add some simplifications for MULH[SU]. This allows us to compile this:
...
long %bar(long %X) {
%Y = mul long %X, 4294967297
ret long %Y
}
to this:
l1_bar:
mov %EAX, DWORD PTR [%ESP + 4]
mov %EDX, %EAX
add %EDX, DWORD PTR [%ESP + 8]
ret
instead of:
l1_bar:
mov %ECX, DWORD PTR [%ESP + 4]
mov %EDX, 1
mov %EAX, %ECX
mul %EDX
add %EDX, %ECX
add %EDX, DWORD PTR [%ESP + 8]
mov %EAX, %ECX
ret
llvm-svn: 22044
2005-05-15 05:39:08 +00:00
468b9577b6
When inserting callee-save register reloads, make sure to skip over any
...
terminator instructions before the 'ret' in case the target has a
multi-instruction return sequence.
llvm-svn: 22041
2005-05-15 03:09:58 +00:00
e4f71d036f
Fix construction of ioport intrinsics, fixing X86/io.llx and io-port.llx
...
llvm-svn: 22026
2005-05-14 13:56:55 +00:00
3268f244e6
allow token chain at start or end of node
...
llvm-svn: 22020
2005-05-14 08:34:53 +00:00
865359958b
remove special case hacks for readport/readio from the binary operator
...
codepath
llvm-svn: 22019
2005-05-14 07:45:46 +00:00
566307f92a
Implement fixme's by memoizing nodes.
...
llvm-svn: 22018
2005-05-14 07:42:29 +00:00
833a4fbdc5
Turn this into a wrapper for a simpler version of getNode.
...
llvm-svn: 22016
2005-05-14 07:32:14 +00:00
96c262e24b
Eliminate special purpose hacks for dynamic_stack_alloc.
...
llvm-svn: 22015
2005-05-14 07:29:57 +00:00
669e8c2c9c
Use the general mechanism for creating multi-value nodes instead of using
...
special case hacks.
llvm-svn: 22014
2005-05-14 07:25:05 +00:00
006f56b177
Wrap long line, actually add node to the graph.
...
llvm-svn: 22011
2005-05-14 06:42:57 +00:00
3eb8693279
legalize target-specific operations
...
llvm-svn: 22010
2005-05-14 06:34:48 +00:00
d553133308
add a getNode() version that allows construction of any node type.
...
llvm-svn: 22009
2005-05-14 06:20:26 +00:00
29dcc71d83
LowerOperation takes a dag
...
llvm-svn: 22004
2005-05-14 05:50:48 +00:00
c08d786ba5
Print the symbolic register name in a register allocator debug dump.
...
llvm-svn: 22002
2005-05-14 05:34:15 +00:00
d3cc996a47
Allow targets to have a custom int64->fp expander if desired
...
llvm-svn: 22001
2005-05-14 05:33:54 +00:00
cbefe72fb2
Align doubles on 8-byte boundaries if possible.
...
llvm-svn: 21993
2005-05-13 23:14:17 +00:00
77b220f3d5
print stack object alignment in -print-machineinstr dumps
...
llvm-svn: 21992
2005-05-13 22:54:44 +00:00
f6fb5e91b2
Tolerate instrs with extra args
...
llvm-svn: 21982
2005-05-13 21:07:15 +00:00
2e77db6af6
Add an isTailCall flag to LowerCallTo
...
llvm-svn: 21958
2005-05-13 18:50:42 +00:00
d0feb64443
Handle TAILCALL node
...
llvm-svn: 21957
2005-05-13 18:43:43 +00:00
d0b0ecca3f
Emit function entry code after lowering hte arguments.
...
llvm-svn: 21931
2005-05-13 07:33:32 +00:00
0220b2952f
Allow targets to emit code into the entry block of each function
...
llvm-svn: 21930
2005-05-13 07:23:21 +00:00
91caf1d039
allow a virtual register to be associated with live-in values.
...
llvm-svn: 21927
2005-05-13 07:08:07 +00:00
bb1d60de9c
Fix a problem that nate reduced for me.
...
llvm-svn: 21923
2005-05-13 05:17:00 +00:00
5a14c8a18e
rename variables and functions to match renamed DAG nodes. Bonus feature:
...
I can actually remember which one is which now!
llvm-svn: 21922
2005-05-13 05:09:11 +00:00
2a4f7312cd
do not call expandop on the same value more than once. This fixes
...
X86/2004-02-22-Casts.llx
llvm-svn: 21919
2005-05-13 04:45:13 +00:00
e3677d6354
fix a bad typeo
...
llvm-svn: 21917
2005-05-12 23:51:40 +00:00
d34cd28aa7
update comment
...
llvm-svn: 21916
2005-05-12 23:24:44 +00:00
2dce703710
rename the ADJCALLSTACKDOWN/ADJCALLSTACKUP nodes to be CALLSEQ_START/BEGIN.
...
llvm-svn: 21915
2005-05-12 23:24:06 +00:00
111778e665
Pass calling convention to use into lower call to
...
llvm-svn: 21900
2005-05-12 19:56:57 +00:00
0bfd177e89
fix expansion of ct[lt]z nodes
...
llvm-svn: 21896
2005-05-12 19:27:51 +00:00
cf5f6b0ccb
Expand 64-bit ctlz/cttz nodes for 32-bit targets
...
llvm-svn: 21895
2005-05-12 19:05:01 +00:00
26f0317f46
Fix uint->fp casts on PPC, allowing UnitTests/2005-05-12-Int64ToFP to
...
work on it.
llvm-svn: 21894
2005-05-12 18:52:34 +00:00
b5a78e0873
Allow something to be legalized multiple times. This can be used to reduce
...
legalization iteration
llvm-svn: 21892
2005-05-12 16:53:42 +00:00
153587e555
Oops, don't do this after we figure out where to insert the call chains.
...
llvm-svn: 21890
2005-05-12 07:00:44 +00:00
8a5ad8468a
Make sure to expand all nodes, avoiding unintentional node duplication.
...
llvm-svn: 21889
2005-05-12 06:54:21 +00:00
d2fb9ea262
handle a common case generated by the uint64 -> FP code path better
...
llvm-svn: 21888
2005-05-12 06:27:02 +00:00
f09c0b435b
add fixme
...
llvm-svn: 21887
2005-05-12 06:04:14 +00:00
a5bf1030bf
Fix a problem where early legalization can cause token chain problems.
...
llvm-svn: 21885
2005-05-12 04:49:08 +00:00
8005e91432
Make legalize a bit more efficient, and canonicalize sub X, C -> add X, -C
...
llvm-svn: 21882
2005-05-12 00:17:04 +00:00
99fa5bc1fa
Necessary changes to codegen cttz efficiently on PowerPC
...
1. Teach LegalizeDAG how to better legalize CTTZ if the target doesn't have
CTPOP, but does have CTLZ
2. Teach PPC32 how to do sub x, const -> add x, -const for valid consts
3. Teach PPC32 how to do and (xor a, -1) b -> andc b, a
4. Teach PPC32 that ISD::CTLZ -> PPC::CNTLZW
llvm-svn: 21880
2005-05-11 23:43:56 +00:00
991ce36798
Fix lowering of ctlz, so now UnitTests/2005-05-11-Popcount-ffs-fls passes
...
with the CBE
llvm-svn: 21875
2005-05-11 20:24:12 +00:00
fe5759b022
Fix lowering of cttz to work with signed values
...
llvm-svn: 21874
2005-05-11 20:02:14 +00:00
9ec975a4b5
fix and concisify intinsic lowering for ctpop. Unfortunately, this code
...
looks completely untested. :(
llvm-svn: 21873
2005-05-11 19:42:05 +00:00
06bbeb646f
Fix the last remaining bug preventing us from switching the X86 BE over
...
from the simple isel to the pattern isel. This forces inserted libcalls
to serialize against other function calls, which was breaking
UnitTests/2005-05-12-Int64ToFP. Hopefully this will fix issues on other
targets as well.
llvm-svn: 21872
2005-05-11 19:02:11 +00:00
724f7eec77
Do not memoize ADJCALLSTACKDOWN nodes, provide a method to hack on them.
...
llvm-svn: 21871
2005-05-11 18:57:39 +00:00
490769c5b6
wrap long line
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llvm-svn: 21870
2005-05-11 18:57:06 +00:00
56add05671
Make sure to legalize generated ctpop nodes, convert tabs to spaces
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llvm-svn: 21868
2005-05-11 18:35:21 +00:00
a1ebbac9c0
expand count-leading/trailing-zeros; the test 2005-05-11-Popcount-ffs-fls.c
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should now pass (the "LLVM" and "REF" results should be identical)
llvm-svn: 21866
2005-05-11 08:45:08 +00:00
7247324047
Add some notes for expanding clz/ctz
...
llvm-svn: 21862
2005-05-11 05:27:09 +00:00
05309bf58e
Simplify this code, use the proper shift amount
...
llvm-svn: 21861
2005-05-11 05:21:31 +00:00
3740f39883
Legalize this correctly
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llvm-svn: 21859
2005-05-11 05:09:47 +00:00
55e9cde37c
implement expansion of ctpop nodes, implementing CodeGen/Generic/llvm-ct-intrinsics.ll
...
llvm-svn: 21856
2005-05-11 04:51:16 +00:00
93f4f5f467
Print bit count nodes correctly
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llvm-svn: 21855
2005-05-11 04:50:30 +00:00
915594d884
Silence some VC++ warnings
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llvm-svn: 21838
2005-05-10 02:22:38 +00:00
2d8b55c476
The semantics of cast X to bool are a comparison against zero, not a truncation!
...
llvm-svn: 21833
2005-05-09 22:17:13 +00:00
ba45e6c432
legalize readio/writeio into a load/store if requested
...
llvm-svn: 21827
2005-05-09 20:36:57 +00:00
5385db5523
legalize READPORT, WRITEPORT, READIO, WRITEIO, at least in the basic cases
...
where they are directly supported by the architecture. Wrap a bunch of
long lines :(
llvm-svn: 21826
2005-05-09 20:23:03 +00:00
20eaeae966
Add support for matching the READPORT, WRITEPORT, READIO, WRITEIO intrinsics
...
llvm-svn: 21825
2005-05-09 20:22:36 +00:00
67ab94510d
Add support for READPORT, WRITEPORT, READIO, WRITEIO
...
llvm-svn: 21824
2005-05-09 20:22:17 +00:00
1ab1691da9
Fold shifts into subsequent SHL's. These shifts often arise due to addrses
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arithmetic lowering.
llvm-svn: 21818
2005-05-09 17:06:45 +00:00
57d294f2ac
Don't use the load/store instruction as the source pointer, use the pointer
...
being stored/loaded through!
llvm-svn: 21806
2005-05-09 04:28:51 +00:00
c14f354895
memoize all nodes, even null Value* nodes. Do not add two token chain outputs
...
llvm-svn: 21805
2005-05-09 04:14:13 +00:00
f5675a0813
wrap long lines
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llvm-svn: 21804
2005-05-09 04:08:33 +00:00
9440d6e260
Print SrcValue nodes correctly
...
llvm-svn: 21803
2005-05-09 04:08:27 +00:00
9acd314ba3
Wrap long lines. Fix "warning: conflicting types for built-in function 'memset'"
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warning from the CBE+GCC.
llvm-svn: 21779
2005-05-08 19:46:29 +00:00
584ed83d4a
* Order #includes alphabetically
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* Remove commented-out debug printouts
llvm-svn: 21707
2005-05-05 23:45:17 +00:00
7876156ba0
When hitting an unsupported intrinsic, actually print it
...
Lower debug info to noops.
llvm-svn: 21698
2005-05-05 17:55:17 +00:00
2dbbb3ab84
ctpop lowering in legalize
...
llvm-svn: 21697
2005-05-05 15:55:21 +00:00
dd426dd04d
Make promoteOp work for CT*
...
Proof?
ubyte %bar(ubyte %x) {
entry:
%tmp.1 = call ubyte %llvm.ctlz( ubyte %x )
ret ubyte %tmp.1
}
==>
zapnot $16,1,$0
CTLZ $0,$0
subq $0,56,$0
zapnot $0,1,$0
ret $31,($26),1
llvm-svn: 21691
2005-05-04 19:11:05 +00:00
5e177826fd
Implement count leading zeros (ctlz), count trailing zeros (cttz), and count
...
population (ctpop). Generic lowering is implemented, however only promotion
is implemented for SelectionDAG at the moment.
More coming soon.
llvm-svn: 21676
2005-05-03 17:19:30 +00:00
d7e534b2b3
Do not use deprecated APIs
...
llvm-svn: 21639
2005-04-30 07:13:31 +00:00
8002640eab
Codegen and legalize sin/cos/llvm.sqrt as FSIN/FCOS/FSQRT calls. This patch
...
was contributed by Morten Ofstad, with some minor tweaks and bug fixes added
by me.
llvm-svn: 21636
2005-04-30 04:43:14 +00:00
30fe4ac2fb
Lower llvm.sqrt -> fsqrt/sqrt
...
llvm-svn: 21629
2005-04-30 04:07:50 +00:00
9d6fa98ec7
Legalize FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21606
2005-04-28 21:44:33 +00:00
2f82d2d58a
Add FSQRT, FSIN, FCOS nodes, patch contributed by Morten Ofstad
...
llvm-svn: 21605
2005-04-28 21:44:03 +00:00
4a73c2cfdc
Implement Value* tracking for loads and stores in the selection DAG. This enables one to use alias analysis in the backends.
...
(TRUNK)Stores and (EXT|ZEXT|SEXT)Loads have an extra SDOperand which is a SrcValueSDNode which contains the Value*. Note that if the operation is introduced by the backend, it will still have the operand, but the value* will be null.
llvm-svn: 21599
2005-04-27 20:10:01 +00:00
cfa7ddd6e2
Fold (X > -1) | (Y > -1) --> (X&Y > -1)
...
llvm-svn: 21552
2005-04-26 01:18:33 +00:00
f806459d90
implement some more logical compares with constants, so that:
...
int foo1(int x, int y) {
int t1 = x >= 0;
int t2 = y >= 0;
return t1 & t2;
}
int foo2(int x, int y) {
int t1 = x == -1;
int t2 = y == -1;
return t1 & t2;
}
produces:
_foo1:
or r2, r4, r3
srwi r2, r2, 31
xori r3, r2, 1
blr
_foo2:
and r2, r4, r3
addic r2, r2, 1
li r2, 0
addze r3, r2
blr
instead of:
_foo1:
srwi r2, r4, 31
xori r2, r2, 1
srwi r3, r3, 31
xori r3, r3, 1
and r3, r2, r3
blr
_foo2:
addic r2, r4, 1
li r2, 0
addze r2, r2
addic r3, r3, 1
li r3, 0
addze r3, r3
and r3, r2, r3
blr
llvm-svn: 21547
2005-04-25 21:20:28 +00:00
d373ff64aa
Codegen x < 0 | y < 0 as (x|y) < 0. This allows us to compile this to:
...
_foo:
or r2, r4, r3
srwi r3, r2, 31
blr
instead of:
_foo:
srwi r2, r4, 31
srwi r3, r3, 31
or r3, r2, r3
blr
llvm-svn: 21544
2005-04-25 21:03:25 +00:00
774511633d
Convert tabs to spaces
...
llvm-svn: 21439
2005-04-22 04:01:18 +00:00
835702a094
Remove trailing whitespace
...
llvm-svn: 21420
2005-04-21 22:36:52 +00:00
f6302441f0
Improve and elimination. On PPC, for:
...
bool %test(int %X) {
%Y = and int %X, 8
%Z = setne int %Y, 0
ret bool %Z
}
we now generate this:
rlwinm r2, r3, 0, 28, 28
srwi r3, r2, 3
instead of this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
I'll leave it to Nate to get it down to one instruction. :)
---------------------------------------------------------------------
llvm-svn: 21391
2005-04-21 06:28:15 +00:00
ab1ed77570
Fold (x & 8) != 0 and (x & 8) == 8 into (x & 8) >> 3.
...
This turns this PPC code:
rlwinm r2, r3, 0, 28, 28
cmpwi cr7, r2, 8
mfcr r2
rlwinm r3, r2, 31, 31, 31
into this:
rlwinm r2, r3, 0, 28, 28
srwi r2, r2, 3
rlwinm r3, r2, 0, 31, 31
Next up, nuking the extra and.
llvm-svn: 21390
2005-04-21 06:12:41 +00:00
b61ecb5875
Fold setcc of MVT::i1 operands into logical operations
...
llvm-svn: 21319
2005-04-18 04:48:12 +00:00
6d40fd01fe
Another minor simplification: handle setcc (zero_extend x), c -> setcc(x, c')
...
llvm-svn: 21318
2005-04-18 04:30:45 +00:00
868d473009
Another simple xform
...
llvm-svn: 21317
2005-04-18 04:11:19 +00:00
bd22d83d15
Fold:
...
// (X != 0) | (Y != 0) -> (X|Y != 0)
// (X == 0) & (Y == 0) -> (X|Y == 0)
Compiling this:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
to this:
_bar:
or r2, r3, r4
addic r3, r2, -1
subfe r3, r3, r2
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
llvm-svn: 21316
2005-04-18 03:59:53 +00:00
d929f8bcd3
Make the AND elimination operation recursive and significantly more powerful,
...
eliminating an and for Nate's testcase:
int %bar(int %a, int %b) {
entry:
%tmp.1 = setne int %a, 0
%tmp.2 = setne int %b, 0
%tmp.3 = or bool %tmp.1, %tmp.2
%retval = cast bool %tmp.3 to int
ret int %retval
}
generating:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r3, r2, r3
blr
instead of:
_bar:
addic r2, r3, -1
subfe r2, r2, r3
addic r3, r4, -1
subfe r3, r3, r4
or r2, r2, r3
rlwinm r3, r2, 0, 31, 31
blr
llvm-svn: 21315
2005-04-18 03:48:41 +00:00
80c095f422
Add a couple missing transforms in getSetCC that were triggering assertions
...
in the PPC Pattern ISel
llvm-svn: 21297
2005-04-14 08:56:52 +00:00
4ddd81657b
Disbale the broken fold of shift + sz[ext] for now
...
Move the transform for select (a < 0) ? b : 0 into the dag from ppc isel
Enable the dag to fold and (setcc, 1) -> setcc for targets where setcc
always produces zero or one.
llvm-svn: 21291
2005-04-13 21:23:31 +00:00
56d177a344
fix an infinite loop
...
llvm-svn: 21289
2005-04-13 20:06:29 +00:00
e3d17d8225
fix some serious miscompiles on ia64, alpha, and ppc
...
llvm-svn: 21288
2005-04-13 19:53:40 +00:00
8c3d409dc7
avoid work when possible, perhaps fix the problem nate and andrew are seeing
...
with != 0 comparisons vanishing.
llvm-svn: 21287
2005-04-13 19:41:05 +00:00
e69ad5fd12
Implement expansion of unsigned i64 -> FP.
...
Note that this probably only works for little endian targets, but is enough
to get siod working :)
llvm-svn: 21280
2005-04-13 05:09:42 +00:00
0efd77eda7
Make expansion of uint->fp cast assert out instead of infinitely recurse.
...
llvm-svn: 21275
2005-04-13 03:42:14 +00:00
b1f25ac188
add back the optimization that Nate added for shl X, (zext_inreg y)
...
llvm-svn: 21273
2005-04-13 02:58:13 +00:00
39844ac337
Oops, remove these too.
...
llvm-svn: 21272
2005-04-13 02:47:57 +00:00
0e852afb4c
Instead of making ZERO_EXTEND_INREG nodes, use the helper method in
...
SelectionDAG to do the job with AND. Don't legalize Z_E_I anymore as
it is gone
llvm-svn: 21266
2005-04-13 02:38:47 +00:00
2b4e3fca38
Remove all foldings of ZERO_EXTEND_INREG, moving them to work for AND nodes
...
instead. OVerall, this increases the amount of folding we can do.
llvm-svn: 21265
2005-04-13 02:38:18 +00:00
ca916ba4a0
Fold shift x, [sz]ext(y) -> shift x, y
...
llvm-svn: 21262
2005-04-12 23:32:28 +00:00
af1c0f7a00
Fold shift by size larger than type size to undef
...
Make llvm undef values generate ISD::UNDEF nodes
llvm-svn: 21261
2005-04-12 23:12:17 +00:00
0b73a6d8bc
promote extload i1 -> extload i8
...
llvm-svn: 21258
2005-04-12 20:30:10 +00:00
Chris Lattner