999da1f3a0
Have SPU handle halfvec stores aligned by 8 bytes.
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llvm-svn: 110576
2010-08-09 16:33:00 +00:00
8b2f70125f
Make SPU backend handle insertelement and
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store for "half vectors"
llvm-svn: 110198
2010-08-04 13:59:48 +00:00
77558b7d13
More SPU v2f32 stuff added: insertelement and shuffle.
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llvm-svn: 110038
2010-08-02 11:22:10 +00:00
68b3886678
Add preliminary v2f32 support for SPU. Like with v2i32, we just
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duplicate the instructions and operate on half vectors.
Also reorder code in SPUInstrInfo.td for better coherency.
llvm-svn: 110037
2010-08-02 10:25:47 +00:00
622f8eb981
Add preliminary v2i32 support for SPU backend. As there are no
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such registers in SPU, this support boils down to "emulating"
them by duplicating instructions on the general purpose registers.
This adds the most basic operations on v2i32: passing parameters,
addition, subtraction, multiplication and a few others.
llvm-svn: 110035
2010-08-02 08:54:39 +00:00
8289f78569
Remove the isMoveInstr() hook.
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llvm-svn: 108567
2010-07-16 22:35:46 +00:00
499f797cdd
Rename DBG_LABEL PROLOG_LABEL, because it's only used during prolog emission and
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thus is a much more meaningful name.
llvm-svn: 108563
2010-07-16 22:20:36 +00:00
92d8998348
Don't pass StringRef by reference.
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llvm-svn: 108366
2010-07-14 22:38:02 +00:00
0961c55161
RISC architectures get their memory operand folding for free.
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The only folding these load/store architectures can do is converting COPY into a
load or store, and the target independent part of foldMemoryOperand already
knows how to do that.
llvm-svn: 108099
2010-07-11 19:19:13 +00:00
1dba6814c9
Replace copyRegToReg with copyPhysReg for CellSPU.
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llvm-svn: 108084
2010-07-11 07:31:03 +00:00
d799ea52cd
Switch SPU calling convention (function arguments)
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to a Tablegen implementation.
llvm-svn: 107913
2010-07-08 21:15:22 +00:00
fe7532a308
Split the SDValue out of OutputArg so that SelectionDAG-independent
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code can do calling-convention queries. This obviates OutputArgReg.
llvm-svn: 107786
2010-07-07 15:54:55 +00:00
a3ca21b228
Propagate debug loc.
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llvm-svn: 107710
2010-07-06 22:08:15 +00:00
d5ac287140
Remove some unused/redundant code.
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llvm-svn: 107622
2010-07-05 18:40:09 +00:00
0664a67fe1
Remove isSS argument from CreateFixedObject. Fixed objects cannot be spill slots so it's always false.
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llvm-svn: 107550
2010-07-03 00:40:23 +00:00
6d28e73acc
Remove initialized but otherwise unused variables.
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llvm-svn: 107127
2010-06-29 11:22:26 +00:00
ce97d55ad9
The hasMemory argument is irrelevant to how the argument
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for an "i" constraint should get lowered; PR 6309. While
this argument was passed around a lot, this is the only
place it was used, so it goes away from a lot of other
places.
llvm-svn: 106893
2010-06-25 21:55:36 +00:00
74b5e3e0ae
remove some dead variables reported by clang++
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llvm-svn: 106428
2010-06-21 17:20:18 +00:00
0ab5a02579
Mark the SPU 'lr' instruction to never have side effects.
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This allows the fast regiser allocator to remove redundant
register moves.
Update a set of tests that depend on the register allocator
to be linear scan.
llvm-svn: 106420
2010-06-21 15:08:16 +00:00
d7f50c118a
Fix the lowering of VECTOR_SHUFFLE on SPU to handle splats.
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llvm-svn: 106419
2010-06-21 14:42:19 +00:00
6f58190f6f
Fix lowering of VECTOR_SHUFFLE on SPU. Old algorithm
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used to choke llc with the attached test.
llvm-svn: 106411
2010-06-21 10:17:36 +00:00
f1d8304fe3
Eliminate unnecessary uses of getZExtValue().
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llvm-svn: 106279
2010-06-18 14:22:04 +00:00
0125b6410a
Add a DebugLoc parameter to TargetInstrInfo::InsertBranch(). This
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addresses a longstanding deficiency noted in many FIXMEs scattered
across all the targets.
This effectively moves the problem up one level, replacing eleven
FIXMEs in the targets with eight FIXMEs in CodeGen, plus one path
through FastISel where we actually supply a DebugLoc, fixing Radar
7421831.
llvm-svn: 106243
2010-06-17 22:43:56 +00:00
5e0862f7f5
Fix SPU to cope with vector insertelement to an undef position.
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We default to inserting to lane 0.
llvm-svn: 105722
2010-06-09 09:58:17 +00:00
056113a211
Handle loading from/storing to undef pointers on SPU by inserting a
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random load/store, rather than crashing llc.
llvm-svn: 105710
2010-06-09 08:29:41 +00:00
6c40caf729
Flag SPU's function call sequence together.
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Discussed here:
http://lists.cs.uiuc.edu/pipermail/llvmdev/2010-June/032107.html
llvm-svn: 105601
2010-06-08 07:55:16 +00:00
ef2b6ce00a
cleanup
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llvm-svn: 105322
2010-06-02 13:53:17 +00:00
8916358f97
Fix handling of 'load' nodes.
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llvm-svn: 105269
2010-06-01 13:34:47 +00:00
738e920edf
Code refactoring: pull SchedPreference enum from TargetLowering.h to TargetMachine.h and put it in its own namespace.
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llvm-svn: 104147
2010-05-19 20:19:50 +00:00
95f6ebcb37
Rename "HasCalls" in MachineFrameInfo to "AdjustsStack" to better describe what
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the variable actually tracks.
N.B., several back-ends are using "HasCalls" as being synonymous for something
that adjusts the stack. This isn't 100% correct and should be looked into.
llvm-svn: 103802
2010-05-14 21:14:32 +00:00
bb919dfb6b
Implement a bunch more TargetSelectionDAGInfo infrastructure.
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Move EmitTargetCodeForMemcpy, EmitTargetCodeForMemset, and
EmitTargetCodeForMemmove out of TargetLowering and into
SelectionDAGInfo to exercise this.
llvm-svn: 103481
2010-05-11 17:31:57 +00:00
9dd3ef8d01
Make SPU backend not assert on jump tables.
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llvm-svn: 103466
2010-05-11 11:00:02 +00:00
92ea401d8f
Fix encoding of 'sf' and 'sfh' instructions.
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llvm-svn: 103399
2010-05-10 08:13:49 +00:00
b3c5c4611c
Testing svn access with a note added to documentation.
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llvm-svn: 103271
2010-05-07 18:06:28 +00:00
779c69bbc5
Add a DebugLoc argument to TargetInstrInfo::copyRegToReg, so that it
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doesn't have to guess.
llvm-svn: 103194
2010-05-06 20:33:48 +00:00
efb126a665
Add argument TargetRegisterInfo to loadRegFromStackSlot and storeRegToStackSlot.
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llvm-svn: 103193
2010-05-06 19:06:44 +00:00
0185047b3f
"on the rare occasion the SPU BE produces illegal assembly - it tries to emit an add instruction of the form 'a reg, reg, imm'."
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Patch by Kalle Raiskila!
llvm-svn: 103021
2010-05-04 17:58:46 +00:00
2094488d81
fix some inconsistent line endings, patch by Jakub Staszak!
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llvm-svn: 102852
2010-05-01 17:36:49 +00:00
4158a0ff6b
Implement -disable-non-leaf-fp-elim which disable frame pointer elimination
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optimization for non-leaf functions. This will be hooked up to gcc's
-momit-leaf-frame-pointer option. rdar://7886181
llvm-svn: 101984
2010-04-21 03:18:23 +00:00
38c1a1a247
teach cellspu how to return i8 and i16 from calls,
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patch by Kalle Raiskila!
llvm-svn: 101875
2010-04-20 05:36:09 +00:00
7d62e33291
Make processor FUs unique for given itinerary. This extends the limit of 32
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FU per CPU arch to 32 per intinerary allowing precise modelling of quite
complex pipelines in the future.
llvm-svn: 101754
2010-04-18 20:31:01 +00:00
20e094c711
Use cast instead of dyn_cast when assuming success.
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llvm-svn: 101636
2010-04-17 15:31:16 +00:00
21cea8ac2e
Use const qualifiers with TargetLowering. This eliminates several
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const_casts, and it reinforces the design of the Target classes being
immutable.
SelectionDAGISel::IsLegalToFold is now a static member function, because
PIC16 uses it in an unconventional way. There is more room for API
cleanup here.
And PIC16's AsmPrinter no longer uses TargetLowering.
llvm-svn: 101635
2010-04-17 15:26:15 +00:00
31ae586c74
Move per-function state out of TargetLowering subclasses and into
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MachineFunctionInfo subclasses.
llvm-svn: 101634
2010-04-17 14:41:14 +00:00
ca0a53ac52
Name these stub files consistently with the SPU and PPC targets' conventions.
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Also rename the classes appropriately. The CMake build already used these
names.
llvm-svn: 101631
2010-04-17 08:50:29 +00:00
9becdddc49
Add skeleton target-specific SelectionDAGInfo files.
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llvm-svn: 101564
2010-04-16 23:04:22 +00:00
bcaf681cde
Add const qualifiers to CodeGen's use of LLVM IR constructs.
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llvm-svn: 101334
2010-04-15 01:51:59 +00:00
1ef9826ff8
"On SPU, variables in the .bss section that are allocated with the .lcomm directive are not aligned on 16 byte boundaries. This causes misaligned loads, as the generated assembly assumes this "default" alignment.
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this patch disables .lcomm in favour of '.local .comm'
Patch by Kalle Raisklia!
llvm-svn: 100875
2010-04-09 18:27:03 +00:00
a6769269f3
Use twines to simplify calls to report_fatal_error. For code size and readability.
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llvm-svn: 100756
2010-04-08 10:44:28 +00:00
2104b8d36e
rename llvm::llvm_report_error -> llvm::report_fatal_error
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llvm-svn: 100709
2010-04-07 22:58:41 +00:00
Kalle Raiskila