Rafael Espindola
8396dd0893
Remove the MCObjectFormat class.
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llvm-svn: 122147
2010-12-18 05:37:28 +00:00
Rafael Espindola
293a7c1840
Add a FIXME and explain a hack.
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llvm-svn: 122144
2010-12-18 04:19:20 +00:00
Michael J. Spencer
01cf728ea9
Fix whitespace.
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llvm-svn: 122142
2010-12-18 04:13:46 +00:00
Michael J. Spencer
4f63507d05
Support/PathV1: Deprecate get{Basename,Dirname,Suffix}.
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llvm-svn: 122141
2010-12-18 04:13:36 +00:00
Rafael Espindola
1ea7f18caa
Fix the note.
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llvm-svn: 122139
2010-12-18 04:01:45 +00:00
Rafael Espindola
5004f4a9b5
Revert 122011, 122012, 122013, 122023 adding back an important optimization.
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I added a note, but suggestions on how to add a test are really welcome.
llvm-svn: 122138
2010-12-18 03:57:21 +00:00
Jakob Stoklund Olesen
1fa7958eaa
Apparently, operandices is not a word.
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llvm-svn: 122135
2010-12-18 03:28:32 +00:00
Rafael Espindola
fdaae0d16f
Move some data to the TargetWriter.
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llvm-svn: 122134
2010-12-18 03:27:34 +00:00
Jakob Stoklund Olesen
3b2966dc7d
Teach the inline spiller to attempt folding a load instruction into its single
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use before rematerializing the load.
This allows us to produce:
addps LCPI0_1(%rip), %xmm2
Instead of:
movaps LCPI0_1(%rip), %xmm3
addps %xmm3, %xmm2
Saving a register and an instruction. The standard spiller already knows how to
do this.
llvm-svn: 122133
2010-12-18 03:04:14 +00:00
Jakob Stoklund Olesen
2a9f194b00
Tweak debug spew.
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llvm-svn: 122132
2010-12-18 03:04:11 +00:00
Bill Wendling
429bb1e2cc
r120333 changed the opcode for the Thumb1 stuff from ARM::tMOVr to
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ARM::tMOVgpr2gpr. But this check didn't change. As a result, we were getting
misaligned references to the jump table from an ADR instruction.
There is a test case, but unfortunately it's sensitive to random code changes.
<rdar://problem/8782223>
llvm-svn: 122131
2010-12-18 02:13:59 +00:00
Bill Wendling
a4dda53686
RemoveUnusedCPEntries can change things. Track it.
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llvm-svn: 122129
2010-12-18 01:53:06 +00:00
Jakob Stoklund Olesen
7971a3eaff
Check that the register is live-in to the loop header before inserting copies in
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the loop predecessors.
The register can be live-out from a predecessor without being live-in to the
loop header if there is a critical edge from the predecessor.
llvm-svn: 122123
2010-12-18 01:06:19 +00:00
Nick Lewycky
1d108cb962
Fix GCC warning:
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lib/CodeGen/RegAllocGreedy.cpp:311: error: unused variable 'PhysReg' [-Wunused-variable]
llvm-svn: 122122
2010-12-18 01:05:55 +00:00
Rafael Espindola
625ccf8222
Relax push instructions.
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llvm-svn: 122121
2010-12-18 01:01:34 +00:00
Nick Lewycky
55a700b0cf
Make LazyValueInfo non-recursive.
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llvm-svn: 122120
2010-12-18 01:00:40 +00:00
Bob Wilson
eda2a9ec89
Rearrange some Neon multiclasses. No functional changes.
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llvm-svn: 122119
2010-12-18 00:42:58 +00:00
Michael J. Spencer
762a55b19f
Support/PathV1: Deprecate getLast.
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llvm-svn: 122116
2010-12-18 00:19:10 +00:00
Owen Anderson
e663aeacf9
Add support to CallbackVH to receive notification when a Value's use-list changes.
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llvm-svn: 122114
2010-12-18 00:07:15 +00:00
Jakob Stoklund Olesen
bf4550e3fb
Pass a Banner argument to the machine code verifier both from
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createMachineVerifierPass and MachineFunction::verify.
The banner is printed before the machine code dump, just like the printer pass.
llvm-svn: 122113
2010-12-18 00:06:56 +00:00
Bob Wilson
00871c71e9
Fix result type of Neon floating-point comparisons against zero.
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The result vector elements are always integers. Radar 8782191.
llvm-svn: 122112
2010-12-18 00:04:33 +00:00
Bob Wilson
f268d0303b
Add some missing entries in ARMTargetLowering::getTargetNodeName.
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llvm-svn: 122111
2010-12-18 00:04:26 +00:00
Bill Wendling
5e3605552e
Whitespace fixes. No functionality change.
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llvm-svn: 122110
2010-12-17 23:27:41 +00:00
Jakob Stoklund Olesen
cf846100d8
Avoid dereferencing end() in collectInterferingVRegs() when there is no
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interference.
llvm-svn: 122108
2010-12-17 23:16:38 +00:00
Jakob Stoklund Olesen
2e98ee31b3
Make the -verify-regalloc command line option available to base classes as
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RegAllocBase::VerifyEnabled.
Run the machine code verifier in a few interesting places during RegAllocGreedy.
llvm-svn: 122107
2010-12-17 23:16:35 +00:00
Jakob Stoklund Olesen
1740e00104
Enable loop splitting in RegAllocGreedy.
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The heuristics split around the largest loop where the current register may be
allocated without interference.
llvm-svn: 122106
2010-12-17 23:16:32 +00:00
Nate Begeman
7aa18bf46a
Add vector versions of some existing scalar transforms to aid codegen in matching psign & pblend operations to the IR produced by clang/gcc for their C idioms.
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llvm-svn: 122105
2010-12-17 23:12:19 +00:00
Bill Wendling
3fff1fd49b
During local stack slot allocation, the materializeFrameBaseRegister function
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may be called. If the entry block is empty, the insertion point iterator will be
the "end()" value. Calling ->getParent() on it (among others) causes problems.
Modify materializeFrameBaseRegister to take the machine basic block and insert
the frame base register at the beginning of that block. (It's very similar to
what the code does all ready. The only difference is that it will always insert
at the beginning of the entry block instead of after a previous materialization
of the frame base register. I doubt that that matters here.)
<rdar://problem/8782198>
llvm-svn: 122104
2010-12-17 23:09:14 +00:00
Bob Wilson
5408144add
Fix a DAGCombiner crash when folding binary vector operations with constant
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BUILD_VECTOR operands where the element type is not legal. I had previously
changed this code to insert TRUNCATE operations, but that was just wrong.
llvm-svn: 122102
2010-12-17 23:06:49 +00:00
Bob Wilson
a7dabbd2cf
Avoid report_fatal_error in ARM's PrintAsmOperand method.
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The standard error handling in AsmPrinter::EmitInlineAsm handles this much
better, so just use it.
llvm-svn: 122100
2010-12-17 23:06:42 +00:00
Bob Wilson
ec3ff9c727
Remove trailing whitespace.
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llvm-svn: 122099
2010-12-17 23:06:32 +00:00
Nate Begeman
97b72c99d2
Add support for matching psign & plendvb to the x86 target
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Remove unnecessary pandn patterns, 'vnot' patfrag looks through bitcasts
llvm-svn: 122098
2010-12-17 22:55:37 +00:00
Owen Anderson
79855298b9
Thumb's forced-PC-alignment requirement applies to the _total_ displacement, not just to the fragment relative
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portion. While the fragment boundary is usually already aligned, it is possible for it not to be, which
would lead to a non-aligned final displacement.
llvm-svn: 122091
2010-12-17 21:49:48 +00:00
Dale Johannesen
cd538afa52
Add a transform to DAG Combiner. This improves the
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code for the case where 32-bit divide by constant is
turned into 64-bit multiply by constant. 8771012.
llvm-svn: 122090
2010-12-17 21:45:49 +00:00
Michael J. Spencer
559e09e39d
Support/Path: Deprecate PathV1::isAbsolute.
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llvm-svn: 122086
2010-12-17 21:21:31 +00:00
Benjamin Kramer
ffa42ced39
PathV2: Use StringRef::substr to simplify substring creation.
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llvm-svn: 122085
2010-12-17 20:27:37 +00:00
Jakob Stoklund Olesen
a043b62870
Allow missing kill flags on an untied operand of a two-address instruction when
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the operand uses the same register as a tied operand:
%r1 = add %r1, %r1
If add were a three-address instruction, kill flags would be required on at
least one of the uses. Since it is a two-address instruction, the tied use
operand must not have a kill flag.
This change makes the kill flag on the untied use operand optional.
llvm-svn: 122082
2010-12-17 19:18:41 +00:00
Jim Grosbach
97f1de7347
If The ARM WriteNopData() gets an unaligned byte count to pad out, fill in with
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a partial value. rdar://8782954
llvm-svn: 122078
2010-12-17 19:03:02 +00:00
Benjamin Kramer
cb520cd8cb
Missed some StringRefRefs.
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llvm-svn: 122077
2010-12-17 18:59:09 +00:00
Jim Grosbach
06ab8b648c
Add bits 31-28 to the Thumb2 encoding of TBB/TBH.
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llvm-svn: 122076
2010-12-17 18:42:56 +00:00
Jim Grosbach
4416dfa8fb
Handle 2 and 4 byte data blob fixup values for ARM.
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llvm-svn: 122075
2010-12-17 18:39:10 +00:00
Benjamin Kramer
292b44baea
Pass StringRefs by value, for consistency.
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llvm-svn: 122074
2010-12-17 18:19:06 +00:00
Jakob Stoklund Olesen
38b6d494d5
Add MachineLoopRange comparators for sorting loop lists by number and by area.
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llvm-svn: 122073
2010-12-17 18:13:52 +00:00
Owen Anderson
1294ea7d53
Reapply r121905 (automatic synthesis of @llvm.sadd.with.overflow) with a fix for a bug that manifested itself
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on the DragonEgg self-host bot. Unfortunately, the testcase is pretty messy and doesn't reduce well due to
interactions with other parts of InstCombine.
llvm-svn: 122072
2010-12-17 18:08:00 +00:00
Rafael Espindola
d11460a65b
Store and free the TargetObjectWriter.
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llvm-svn: 122070
2010-12-17 18:01:31 +00:00
Rafael Espindola
6b5e56c2b1
Stub out explicit MCELFObjectTargetWriter interface.
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llvm-svn: 122067
2010-12-17 17:45:22 +00:00
Rafael Espindola
f0e24d426a
Move createELFObjectWriter to its own header.
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llvm-svn: 122064
2010-12-17 16:59:53 +00:00
Benjamin Kramer
e5f49c4ff2
SimplifyCFG: Ranges can be larger than 64 bits. Fixes Release-selfhost build.
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llvm-svn: 122054
2010-12-17 10:48:14 +00:00
Benjamin Kramer
a29e1bf8ad
Fix mismatched new[]/delete.
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llvm-svn: 122053
2010-12-17 09:56:50 +00:00
Kalle Raiskila
affe15fd67
Don't feed 19 bit immediates to ILA.
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Patch (slightly modified) by Visa Putkinen.
llvm-svn: 122052
2010-12-17 09:36:09 +00:00