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Author SHA1 Message Date
Oren Ben Simhon 9683ecbff6 [X86] Regcall - Adding support for mask types 
Regcall calling convention passes mask types arguments in x86 GPR registers.
The review includes the changes required in order to support v32i1, v16i1 and v8i1.

Differential Revision: https://reviews.llvm.org/D27148

llvm-svn: 289383
 2016-12-11 14:10:52 +00:00
Simon Pilgrim d70c03ad68 Fix line endings 
llvm-svn: 287638
 2016-11-22 13:27:29 +00:00
Oren Ben Simhon 489d6eff4f [X86] RegCall - Handling v64i1 in 32/64 bit target 
Register Calling Convention defines a new behavior for v64i1 types.
This type should be saved in GPR.
However for 32 bit machine we need to split the value into 2 GPRs (because each is 32 bit).

Differential Revision: https://reviews.llvm.org/D26181

llvm-svn: 287217
 2016-11-17 09:59:40 +00:00