Commit Graph

72053 Commits

Author SHA1 Message Date
Duncan P. N. Exon Smith dfd04582ae IR: Reduce RAUW traffic in ConstantExpr
Avoid RAUW-ing `ConstantExpr` when an operand changes unless the new
`ConstantExpr` already has users.  This prevents the RAUW from rippling
up the expression tree unnecessarily.

This commit indirectly adds test coverage for r215953 (this is how I
came across the bug).

This is part of PR20515.

llvm-svn: 215960
2014-08-19 01:12:53 +00:00
Duncan P. N. Exon Smith 344ebf7c9a IR: Replace uses of ConstantAggrUniqueMap with ConstantUniqueMap
Now that `ConstantAggrUniqueMap` and `ConstantUniqueMap` work the same
way, change the aggregates to use the new one.

llvm-svn: 215959
2014-08-19 01:02:18 +00:00
Duncan P. N. Exon Smith 864ccec435 Remove extraneous typenames from r215957
llvm-svn: 215958
2014-08-19 00:55:34 +00:00
Duncan P. N. Exon Smith 8d12558bad IR: Rewrite ConstantUniqueMap
Rewrite `ConstantUniqueMap` to be more similar to
`ConstantAggrUniqueMap`.

  - Use a `DenseMap` with custom MapInfo instead of a `std::map` with
    linear lookups and deletion.
  - Don't waste memory explicitly storing (heavyweight) keys.

Only `ConstantExpr` and `InlineAsm` actually use this data structure, so
I also updated them to use it.

This code cleanup is a precursor to reducing RAUW traffic on
`ConstantExpr` -- I felt badly adding a new (linear) call to
`ConstantUniqueMap::FindExistingKey`, so this designs away the concern.

A follow-up commit will transition the users of `ConstantAggrUniqueMap`
over.

llvm-svn: 215957
2014-08-19 00:42:32 +00:00
Duncan P. N. Exon Smith 3fa26b7661 IR: Declare LookupKey right before its use, NFC
llvm-svn: 215956
2014-08-19 00:24:26 +00:00
Duncan P. N. Exon Smith 1cd4aebefe IR: ArrayRef-ize {Insert,Extract}ValueConstantExpr constructors
No functionality change.

llvm-svn: 215955
2014-08-19 00:23:17 +00:00
Duncan P. N. Exon Smith 25fb110f21 Prevent clang-format from moving the namespace closing brace, NFC
llvm-svn: 215954
2014-08-19 00:21:04 +00:00
Duncan P. N. Exon Smith 7b859ff22c NVPTX: Use RAUW instead of reinventing the wheel
This code had a homemade RAUW that was incorrect when a user was a
constant: instead of calling `replaceUsersWithOnConstant()` it would
incorrectly update the operand in-place, invalidating
`LLVMContextImpl::ExprConstants`.  RAUW does the job better.

The ValueHandle that `GVMap` is holding onto needs to be removed first,
so this commit also removes each variable from the map on-the-fly.

Since deletions from `ExprConstants` use a linear search that compares
directly on the pointer value (instead of using the key), there isn't an
obvious way to expose this with a testcase.

llvm-svn: 215953
2014-08-19 00:20:02 +00:00
Duncan P. N. Exon Smith 171699083d LLParser: Handle BlockAddresses on-the-fly
Previously all `blockaddress()` constants were treated as forward
references.  They were resolved twice:  once at the end of the function
in question, and again at the end of the module.  Furthermore, if the
same blockaddress was referenced N times, the parser created N distinct
`GlobalVariable`s (one for each reference).

Instead, resolve all block addresses at the beginning of the function,
creating the standard `BasicBlock` forward references used for all other
basic block references.  After the function, all references can be
resolved immediately.  To check for the condition of parsing block
addresses from within the same function, I created a reference to the
current per-function-state in `BlockAddressPFS`.

Also, create only one forward-reference per basic block.  Because
forward references to block addresses are rare, the data structure here
shouldn't matter.  If somehow it does someday, this can be pretty easily
changed to a `DenseMap<std::pair<ValID, ValID>, GV>`.

This is part of PR20515.

llvm-svn: 215952
2014-08-19 00:13:19 +00:00
Rafael Espindola 57d9ab648c Use a range loop. NFC.
llvm-svn: 215948
2014-08-18 23:15:59 +00:00
Rafael Espindola 43d22b83dc These classes only need a StringRef, not a MemoryBuffer.
llvm-svn: 215945
2014-08-18 22:28:28 +00:00
Rafael Espindola 7342ca4155 Delete unused method.
llvm-svn: 215944
2014-08-18 22:20:18 +00:00
Robin Morisset 9e98e7f7fc Answer to Philip Reames comments
- add check for volatile (probably unneeded, but I agree that we should be conservative about it).
- strengthen condition from isUnordered() to isSimple(), as I don't understand well enough Unordered semantics (and it also matches the comment better this way) to be confident in the previous behaviour (thanks for catching that one, I had missed the case Monotonic/Unordered).
- separate a condition in two.
- lengthen comment about aliasing and loads
- add tests in GVN/atomic.ll

llvm-svn: 215943
2014-08-18 22:18:14 +00:00
Robin Morisset 4ffe8aaa69 Weak relaxing of the constraints on atomics in MemoryDependencyAnalysis
Monotonic accesses do not have to kill the analysis, as long as the QueryInstr is not
itself atomic.

llvm-svn: 215942
2014-08-18 22:18:11 +00:00
Lang Hames 4f867bfada [MCJIT] Respect target endianness in RuntimeDyldMachO and RuntimeDyldChecker.
This patch may address some of the issues described in http://llvm.org/PR20640.

llvm-svn: 215938
2014-08-18 21:43:16 +00:00
Kevin Enderby ec5ca03674 Make llvm-objdump handle both arm and thumb disassembly from the same Mach-O
file with -macho, the Mach-O specific object file parser option.

After some discussion I chose to do this implementation contained in the logic
of llvm-objdump’s MachODump.cpp using a second disassembler for thumb when
needed and with updates mostly contained in the MachOObjectFile class.

llvm-svn: 215931
2014-08-18 20:21:02 +00:00
Quentin Colombet 7e939fb431 [X86][Haswell][SchedModel] Tidy up.
<rdar://problem/15607571>

llvm-svn: 215924
2014-08-18 17:56:01 +00:00
Quentin Colombet 95e053119e [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

llvm-svn: 215923
2014-08-18 17:55:59 +00:00
Quentin Colombet 81db56d931 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

llvm-svn: 215922
2014-08-18 17:55:56 +00:00
Quentin Colombet c13c50e0f3 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

llvm-svn: 215921
2014-08-18 17:55:53 +00:00
Quentin Colombet 45c469c0c3 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

llvm-svn: 215920
2014-08-18 17:55:51 +00:00
Quentin Colombet ca74f23df7 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Conversion instructions.

<rdar://problem/15607571>

llvm-svn: 215919
2014-08-18 17:55:49 +00:00
Quentin Colombet 71cdecd73c [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point XMM and YMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

llvm-svn: 215918
2014-08-18 17:55:46 +00:00
Quentin Colombet bd11563742 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

llvm-svn: 215917
2014-08-18 17:55:43 +00:00
Quentin Colombet 91513d9522 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

llvm-svn: 215916
2014-08-18 17:55:41 +00:00
Quentin Colombet e9f8b4b7ac [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

llvm-svn: 215915
2014-08-18 17:55:39 +00:00
Quentin Colombet f68e09418c [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer MMX and XMM instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

llvm-svn: 215914
2014-08-18 17:55:36 +00:00
Quentin Colombet 33b0bf200d [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Math instructions.

<rdar://problem/15607571>

llvm-svn: 215913
2014-08-18 17:55:32 +00:00
Quentin Colombet 456c991fb4 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

llvm-svn: 215912
2014-08-18 17:55:29 +00:00
Quentin Colombet 0bc907e5e8 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Floating Point x87 instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

llvm-svn: 215911
2014-08-18 17:55:26 +00:00
Quentin Colombet 6e62be2f5a [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Other instructions.

<rdar://problem/15607571>

llvm-svn: 215910
2014-08-18 17:55:23 +00:00
Quentin Colombet a6c56f5072 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Synchronization instructions.

<rdar://problem/15607571>

llvm-svn: 215909
2014-08-18 17:55:21 +00:00
Quentin Colombet c58fc449fd [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: String instructions.

<rdar://problem/15607571>

llvm-svn: 215908
2014-08-18 17:55:19 +00:00
Quentin Colombet e1b17768a0 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Control transfer instructions.

<rdar://problem/15607571>

llvm-svn: 215907
2014-08-18 17:55:16 +00:00
Quentin Colombet fb887b1c05 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Logic instructions.

<rdar://problem/15607571>

llvm-svn: 215906
2014-08-18 17:55:13 +00:00
Quentin Colombet df26059e13 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Arithmetic instructions.

<rdar://problem/15607571>

llvm-svn: 215905
2014-08-18 17:55:11 +00:00
Quentin Colombet 35d37b7571 [X86][Haswell][SchedModel] Add architecture specific scheduling models.
Group: Integer instructions.
Sub-group: Move instructions.

<rdar://problem/15607571>

llvm-svn: 215904
2014-08-18 17:55:08 +00:00
Robin Morisset b155f529fc Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
Summary:
Make use of isAtLeastRelease/Acquire in the ARM/AArch64 backends
These helper functions are introduced in D4844.
Depends D4844

Test Plan: make check-all passes

Reviewers: jfb

Subscribers: aemerson, llvm-commits, mcrosier, reames

Differential Revision: http://reviews.llvm.org/D4937

llvm-svn: 215902
2014-08-18 16:48:58 +00:00
Oliver Stannard f5469bec97 Teach the AArch64 backend to handle f16
This allows the AArch64 backend to handle fadd, fsub, fmul and fdiv
operations on f16 (half-precision) types by promoting to f32.

llvm-svn: 215891
2014-08-18 14:22:39 +00:00
Oliver Stannard 12993dd916 [ARM,AArch64] Do not tail-call to an externally-defined function with weak linkage
Externally-defined functions with weak linkage should not be
tail-called on ARM or AArch64, as the AAELF spec requires normal calls
to undefined weak functions to be replaced with a NOP or jump to the
next instruction. The behaviour of branch instructions in this
situation (as used for tail calls) is implementation-defined, so we
cannot rely on the linker replacing the tail call with a return.

llvm-svn: 215890
2014-08-18 12:42:15 +00:00
Elena Demikhovsky 34d2d76d25 AVX-512: Fixed a bug in emitting compare for MVT:i1 type.
Added a test.

llvm-svn: 215889
2014-08-18 11:59:06 +00:00
Aaron Ballman f12dc9c802 Silencing an MSVC warning about loop variable conflicting with a variable from an outer scope. NFC.
llvm-svn: 215888
2014-08-18 11:51:41 +00:00
Tim Northover 26bb14e6a7 TableGen: allow use of uint64_t for available features mask.
ARM in particular is getting dangerously close to exceeding 32 bits worth of
possible subtarget features. When this happens, various parts of MC start to
fail inexplicably as masks get truncated to "unsigned".

Mostly just refactoring at present, and there's probably no way to test.

llvm-svn: 215887
2014-08-18 11:49:42 +00:00
Abramo Bagnara 9c2f73ed20 Added forgotten noexcept.
llvm-svn: 215886
2014-08-18 07:48:18 +00:00
Craig Topper 6230691c91 Revert "Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size."
Getting a weird buildbot failure that I need to investigate.

llvm-svn: 215870
2014-08-18 00:24:38 +00:00
Craig Topper 5229cfd163 Repace SmallPtrSet with SmallPtrSetImpl in function arguments to avoid needing to mention the size.
llvm-svn: 215868
2014-08-17 23:47:00 +00:00
Rafael Espindola 3a1623f5e4 Use copy initialization to initialize std::unique_ptr.
Thanks to David Blaikie for the suggestion.

llvm-svn: 215867
2014-08-17 23:38:08 +00:00
Saleem Abdulrasool 3fd996ef5c ARM: mark missing functions from RTABI
Simply indicate the functions that are part of the runtime library that we do
not setup libcalls for.  This is merely for ease of identification.  NFC.

llvm-svn: 215863
2014-08-17 22:51:04 +00:00
Saleem Abdulrasool 017bd57fce ARM: improve RTABI 4.2 conformance on Linux
The set of functions defined in the RTABI was separated for no real reason.
This brings us closer to proper utilisation of the functions defined by the
RTABI.  It also sets the ground for correctly emitting function calls to AEABI
functions on all AEABI conforming platforms.

The previously existing lie on the behaviour of __ldivmod and __uldivmod is
propagated as it is beyond the scope of the change.

The changes to the test are due to the fact that we now use the divmod functions
which return both the quotient and remainder and thus we no longer need to
invoke two functions on Linux (making it closer to EABI's behaviour).

llvm-svn: 215862
2014-08-17 22:51:02 +00:00
Saleem Abdulrasool 740be89f51 ARM: whitespace
Whitespace fix, NFC.

llvm-svn: 215861
2014-08-17 22:50:59 +00:00