3 Commits

Author	SHA1	Message	Date
Sander de Smalen	6cab60fa06	Extend hasStoreToStackSlot with list of FI accesses. ... For instructions that spill/fill to and from multiple frame-indices in a single instruction, hasStoreToStackSlot and hasLoadFromStackSlot should return an array of accesses, rather than just the first encounter of such an access. This better describes FI accesses for AArch64 (paired) LDP/STP instructions. Reviewers: t.p.northover, gberry, thegameg, rengolin, javed.absar, MatzeB Reviewed By: MatzeB Differential Revision: https://reviews.llvm.org/D51537 llvm-svn: 341301	2018-09-03 09:15:58 +00:00
Sanjay Patel	ed1b9695ee	[SelectionDAG] unroll unsupported vector FP ops earlier to avoid libcalls on undef elements (PR38527) ... This solves the motivating case from: https://bugs.llvm.org/show_bug.cgi?id=38527 If we are legalizing an FP vector op that maps to 1 of the LLVM intrinsics that mimic libm calls, but we're going to end up with scalar libcalls for that vector type anyway, then we should unroll the vector op into scalars before widening. This avoids libcalls because we've lost the knowledge that some of the scalar elements are undef. Differential Revision: https://reviews.llvm.org/D50791 llvm-svn: 340469	2018-08-22 22:52:05 +00:00
Sanjay Patel	49a8280f43	[AArch64] add tests for poor vector intrinsic lowering via legalization (PR38527); NFC ... These correspond to the x86 tests added with rL339790 / rL339791, but I widened the non-fsin tests to v3f32 to show the problem because AArch supports v2f32 ops. llvm-svn: 339793	2018-08-15 17:06:21 +00:00