Commit Graph

23 Commits

Author SHA1 Message Date
Thomas Lively f04bed8e79 [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS] (fixed)
llvm-svn: 344287
2018-10-11 20:21:22 +00:00
Thomas Lively ab37189f7e [WebAssembly] Revert rL344180, which was breaking expensive checks
llvm-svn: 344280
2018-10-11 18:45:48 +00:00
Thomas Lively 2ebacb107b [WebAssembly] Saturating float to int intrinsics
Summary:
Although the saturating float to int instructions are already
emitted from normal IR, the fpto{s,u}i instructions produce poison
values if the argument cannot fit in the result type. These intrinsics
are therefore necessary to get guaranteed defined saturating behavior.

Reviewers: aheejin, dschuff

Subscribers: sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53004

llvm-svn: 344204
2018-10-11 00:01:25 +00:00
Thomas Lively eff0542c56 [WebAssembly][NFC] Remove repetition of Defs = [ARGUMENTS]
Summary:
By moving that line into the `I` multiclass.

Reviewers: aheejin

Subscribers: dschuff, sbc100, jgravelle-google, sunfish, llvm-commits

Differential Revision: https://reviews.llvm.org/D53093

llvm-svn: 344180
2018-10-10 20:40:54 +00:00
Wouter van Oortmerssen 48dac3109e [WebAssembly] Modified tablegen defs to have 2 parallel instuction sets.
Summary:
One for register based, much like the existing definitions,
and one for stack based (suffix _S).

This allows us to use registers in most of LLVM (which works better),
and stack based in MC (which results in a simpler and more readable
assembler / disassembler).

Tried to keep this change as small as possible while passing tests,
follow-up commit will:
- Add reg->stack conversion in MI.
- Fix asm/disasm in MC to be stack based.
- Fix emitter to be stack based.

tests passing:
llvm-lit -v `find test -name WebAssembly`

test/CodeGen/WebAssembly
test/MC/WebAssembly
test/MC/Disassembler/WebAssembly
test/DebugInfo/WebAssembly
test/CodeGen/MIR/WebAssembly
test/tools/llvm-objdump/WebAssembly

Reviewers: dschuff, sbc100, jgravelle-google, sunfish

Subscribers: aheejin, JDevlieghere, llvm-commits

Differential Revision: https://reviews.llvm.org/D48183

llvm-svn: 334985
2018-06-18 21:22:44 +00:00
Adrian Prantl 5f8f34e459 Remove \brief commands from doxygen comments.
We've been running doxygen with the autobrief option for a couple of
years now. This makes the \brief markers into our comments
redundant. Since they are a visual distraction and we don't want to
encourage more \brief markers in new code either, this patch removes
them all.

Patch produced by

  for i in $(git grep -l '\\brief'); do perl -pi -e 's/\\brief //g' $i & done

Differential Revision: https://reviews.llvm.org/D46290

llvm-svn: 331272
2018-05-01 15:54:18 +00:00
Dan Gohman 5d2b9354b1 [WebAssembly] Make sign-extension opcodes a distinct feature.
Sign-extension opcodes have been split into a separate proposal from
the main threads proposal, so switch them to their own target
feature. See:

https://github.com/WebAssembly/sign-extension-ops

llvm-svn: 322966
2018-01-19 17:16:24 +00:00
Dan Gohman cdd48b8a6b [WebAssembly] Fix trapping behavior in fptosi/fptoui.
This adds code to protect WebAssembly's `trunc_s` family of opcodes
from values outside their domain. Even though such conversions have
full undefined behavior in C/C++, LLVM IR's `fptosi` and `fptoui` do
not, and only return undef.

This also implements the proposed non-trapping float-to-int conversion
feature and uses that instead when available.

llvm-svn: 319128
2017-11-28 01:13:40 +00:00
Derek Schuff a519fe5a37 [WebAssembly] Add sign extend instructions from atomics proposal
Select them from ISD::SIGN_EXTEND_INREG

Differential Revision: https://reviews.llvm.org/D37603

remove spurious change

llvm-svn: 313101
2017-09-13 00:29:06 +00:00
Dan Gohman c968297b95 [WebAssembly] Update opcode values according to recent spec changes.
This corresponds to the "0xd" opcode renumbering.

llvm-svn: 285014
2016-10-24 20:21:49 +00:00
Dan Gohman 5a68ec7f09 [WebAssembly] Add binary-encoding opcode values to instruction descriptions.
llvm-svn: 283389
2016-10-05 21:24:08 +00:00
Michael Kuperstein 2bc3d4d46c [SelectionDAG] Rename fextend -> fpextend, fround -> fpround, frnd -> fround
The names of the tablegen defs now match the names of the ISD nodes.
This makes the world a slightly saner place, as previously "fround" matched
ISD::FP_ROUND and not ISD::FROUND.

Differential Revision: https://reviews.llvm.org/D23597

llvm-svn: 279129
2016-08-18 20:08:15 +00:00
Dan Gohman df00a9ebc2 [WebAssembly] Implement anyext.
llvm-svn: 255179
2015-12-10 00:17:35 +00:00
Dan Gohman 174b2d83ee [WebAssembly] Set several MCInstrDesc flags.
llvm-svn: 254271
2015-11-29 22:59:19 +00:00
Dan Gohman fb3e0594e4 [WebAssembly] Use a physical register to describe ARGUMENT liveness.
Instead of trying to move ARGUMENT instructions back up to the top after
they've been scheduled or sunk down, use a fake physical register to
create a liveness constraint that prevents ARGUMENT instructions from
moving down in the first place. This is still not entirely ideal, however
it is more robust than letting them move and moving them back.

llvm-svn: 254084
2015-11-25 19:36:19 +00:00
Dan Gohman 1031d4a8c3 [WebAssembly] Use tabs instead of spaces in assembly output.
This seems to be the most popular convention among the other backends.

llvm-svn: 253172
2015-11-15 15:34:19 +00:00
Dan Gohman bc58a7bad0 [WebAssembly] Un-mangle the conversion instruction names.
This arranges the types in the LLVM instruction names in the same order that
they appear in the WebAssembly opcode names, and eliminates
double-underscores.

llvm-svn: 252988
2015-11-13 00:50:04 +00:00
Dan Gohman af29bd4fd4 [WebAssembly] Add AsmString strings for most instructions.
Mangling type information into MachineInstr opcode names was a temporary
measure, and it's starting to get hairy. At the same time, the MC instruction
printer wants to use AsmString strings for printing. This patch takes the
first step, starting the process of adding AsmStrings for instructions.

llvm-svn: 252203
2015-11-05 20:42:30 +00:00
JF Bastien 7b452e2c63 [WebAssembly] Update opcode name format for conversions
Summary:
Conversion opcode name format should be f64.convert_u/i64 not f64_convert_u

Author: s3ththompson
Reviewers: jfb
Subscribers: sunfish, jfb, llvm-commits, dschuff
Differential Revision: http://reviews.llvm.org/D14160

llvm-svn: 251613
2015-10-29 04:10:52 +00:00
Dan Gohman dc51b96b7f [WebAssembly] Implement the remaining conversion operations.
This is a temporary assembly syntax that will likely evolve along with
broader upcoming syntax changes.

llvm-svn: 249225
2015-10-03 02:10:28 +00:00
Dan Gohman d0bf981296 [WebAssembly] Rename several functions and types according to the new spec.
llvm-svn: 248644
2015-09-26 01:09:44 +00:00
Dan Gohman 311b488d76 [WebAssembly] Implement int64-to-int32 conversion.
llvm-svn: 247649
2015-09-15 00:55:19 +00:00
JF Bastien 5ca0baca4a WebAssembly: basic instructions todo, and basic register info.
Summary:
This code is based on AArch64 for modern backend good practice, and NVPTX for
virtual ISA concerns.

Reviewers: sunfish

Subscribers: aemerson, llvm-commits, jfb

Differential Revision: http://reviews.llvm.org/D11070

llvm-svn: 241923
2015-07-10 18:23:10 +00:00