8d2ead2e34
Add support for lowering 128-bit shifts on ppc64.
...
llvm-svn: 48029
2008-03-07 20:36:53 +00:00
bfa252d402
Next bits of PPC byval handling. Basically functional
...
but there are bugs.
llvm-svn: 48028
2008-03-07 20:27:40 +00:00
20b5a2b037
Add support for ppc64 shifts with 7-bit (oversized) shift amount (e.g. PPCshl).
...
llvm-svn: 48027
2008-03-07 20:18:24 +00:00
25ff7e217d
Replace SDT_PPCShiftOp in favor of SDTIntBinOps. This allows it to work
...
with 32 or 64-bit operands/results.
llvm-svn: 48026
2008-03-07 20:13:51 +00:00
0d235052d1
Next bit of PPC ByVal handling; call-site code seems
...
correct now.
llvm-svn: 47978
2008-03-05 23:31:27 +00:00
3fcd946c26
Removed spurious EnablePPCRS check.
...
llvm-svn: 47918
2008-03-04 23:27:33 +00:00
85d41a1c44
Move PPC lowering functions into PPCTargetLowering
...
class (cosmetic). First piece of byval implementation;
this doesn't work yet. No functional change.
llvm-svn: 47917
2008-03-04 23:17:14 +00:00
1af20ad336
Use a command-line option to turn register scavenging on/off for PPC.
...
llvm-svn: 47915
2008-03-04 23:13:51 +00:00
632ea65072
This is the initial check-in for adding register scavenging to PPC. (Currently,
...
PPC-64 doesn't work.) This also lowers the spilling of the CR registers so that
it uses a register other than the default R0 register (the scavenger scrounges
for one). A significant part of this patch fixes how kill information is
handled.
llvm-svn: 47863
2008-03-03 22:19:16 +00:00
6b0a189225
add a note
...
llvm-svn: 47830
2008-03-02 19:27:34 +00:00
bd0bb3f07f
Evan implemented this.
...
llvm-svn: 47827
2008-03-02 17:56:29 +00:00
0e8b146152
Use enumeration for preffered EH dwarf encoding reason
...
llvm-svn: 47770
2008-02-29 22:09:08 +00:00
cbde4c2206
Interface of getByValTypeAlignment differed between
...
generic & x86 versions; change generic to follow x86
and improve comments. Add PPC version (not right
for non-Darwin.)
llvm-svn: 47734
2008-02-28 22:31:51 +00:00
c799065cc3
Add a quick and dirty "loop aligner pass". x86 uses it to align its loops to 16-byte boundaries.
...
llvm-svn: 47703
2008-02-28 00:43:03 +00:00
d73396bef9
EHPreferredDataFormat hook for PPC targets. Looks like Darwin
...
uses the same encoding everywhere. Linux FIXME'ed.
llvm-svn: 47701
2008-02-27 23:49:15 +00:00
26854f242e
Don't hard-code the mask size to be 32, which is incorrect on ppc64
...
and was causing aborts with the new APInt changes. This may also be
fixing an obscure ppc64 bug.
llvm-svn: 47692
2008-02-27 21:12:32 +00:00
97925ec704
Final de-tabification.
...
llvm-svn: 47663
2008-02-27 06:33:05 +00:00
f19609abe8
Convert the last remaining users of the non-APInt form of
...
ComputeMaskedBits to use the APInt form, and remove the
non-APInt form.
llvm-svn: 47654
2008-02-27 01:23:58 +00:00
d7a258d325
Rename PrintableName to Name.
...
llvm-svn: 47629
2008-02-26 21:47:57 +00:00
c24ea4fb41
Change "Name" to "AsmName" in the target register info. Gee, a refactoring tool
...
would have been a Godsend here!
llvm-svn: 47625
2008-02-26 21:11:01 +00:00
a7d1ed4c98
Some platforms use the same name for 32-bit and 64-bit registers (like
...
%r3 on PPC) in their ASM files. However, it's hard for humans to read
during debugging. Adding a new field to the register data that lets you
specify a different name to be printed than the one that goes into the
ASM file -- %x3 instead of %r3, for instance.
llvm-svn: 47534
2008-02-24 00:56:13 +00:00
40d67c59d5
Remove bunch of gcc 4.3-related warnings from Target
...
llvm-svn: 47369
2008-02-20 11:22:39 +00:00
fedcf477b5
I cannot find a libgcc function for this builtin. Therefor expanding it to a noop (which is how it use to be treated). If someone who knows the x86 backend better than me could tell me how to get a lock prefix on an instruction, that would be nice to complete x86 support.
...
llvm-svn: 47213
2008-02-16 14:46:26 +00:00
7b1431785b
Handle \n's in value names for more targets. The asm printers
...
really really really need refactoring :(
llvm-svn: 47171
2008-02-15 19:04:54 +00:00
2e01912f1a
Cosmetics.
...
llvm-svn: 47168
2008-02-15 18:40:53 +00:00
67b818f503
Remove warning about 64-bit code on processor
...
that doesn't support it. Per Chris.
llvm-svn: 47162
2008-02-15 18:09:51 +00:00
6ca3ccf519
Rewrite tblgen handling of subtarget features so
...
it follows the order of the enum, not alphabetical.
The motivation is to make -mattr=+ssse3,+sse41
select SSE41 as it ought to. Added "ignored"
enum values of 0 to PPC and SPU to avoid compiler
warnings.
llvm-svn: 47143
2008-02-14 23:35:16 +00:00
53e1b3f9d5
Change how FP immediates are handled.
...
1) ConstantFP is now expand by default
2) ConstantFP is not turned into TargetConstantFP during Legalize
if it is legal.
This allows ConstantFP to be handled like Constant, allowing for
targets that can encode FP immediates as MachineOperands.
As a bonus, fix up Itanium FP constants, which now correctly match,
and match more constants! Hooray.
llvm-svn: 47121
2008-02-14 08:57:00 +00:00
e1d9ee66ed
Simplify some logic in ComputeMaskedBits. And change ComputeMaskedBits
...
to pass the mask APInt by value, not by reference.
llvm-svn: 47096
2008-02-13 22:28:48 +00:00
21ad494f67
Enable exception handling int JIT
...
llvm-svn: 47079
2008-02-13 18:39:37 +00:00
d973e836f1
Fix the PPC JIT regressions by encoding zeroreg as 0 for BLR.
...
llvm-svn: 47067
2008-02-13 17:24:14 +00:00
f6518cf4ab
don't try to avoid inserting loads when lowering FORMAL_ARGUMENTS.
...
DAGCombine is now quite good at zapifying them.
llvm-svn: 47053
2008-02-13 07:35:30 +00:00
eea32990a9
readme updates
...
llvm-svn: 47051
2008-02-13 07:06:12 +00:00
87abe955fc
Make register scavenging happy by not using a reg (CR0) that isn't defined
...
llvm-svn: 47045
2008-02-13 02:58:33 +00:00
244183ef0d
commuteInstr() can now commute non-ssa machine instrs.
...
llvm-svn: 47043
2008-02-13 02:46:49 +00:00
f990faf23b
Convert SelectionDAG::ComputeMaskedBits to use APInt instead of uint64_t.
...
Add an overload that supports the uint64_t interface for use by clients
that haven't been updated yet.
llvm-svn: 47039
2008-02-13 00:35:47 +00:00
83af1197ca
Revert r46916 PPCTargetAsmInfo.cpp.
...
llvm-svn: 47020
2008-02-12 19:25:12 +00:00
3090b0fbd1
additional missing feature
...
llvm-svn: 46948
2008-02-11 04:16:09 +00:00
3a4be0fdef
Rename MRegisterInfo to TargetRegisterInfo.
...
llvm-svn: 46930
2008-02-10 18:45:23 +00:00
52ea27db17
Match GCC's behaviour for these sections.
...
llvm-svn: 46916
2008-02-10 00:03:54 +00:00
3b3286d4bc
It's not always safe to fold movsd into xorpd, etc. Check the alignment of the load address first to make sure it's 16 byte aligned.
...
llvm-svn: 46893
2008-02-08 21:20:40 +00:00
16d4bc3dc0
Follow Chris' suggestion; change the PseudoSourceValue accessors
...
to return pointers instead of references, since this is always what
is needed.
llvm-svn: 46857
2008-02-07 18:41:25 +00:00
2d489b5081
Re-apply the memory operand changes, with a fix for the static
...
initializer problem, a minor tweak to the way the
DAGISelEmitter finds load/store nodes, and a renaming of the
new PseudoSourceValue objects.
llvm-svn: 46827
2008-02-06 22:27:42 +00:00
f3c89be368
Ident mnemonics appropriately
...
llvm-svn: 46746
2008-02-05 08:49:09 +00:00
2cb9068c78
Dwarf requires variable entries to be in the source order. Right now, since we are recording variable information at isel time this means parameters would appear in the reverse order. The short term fix is to issue recordVariable() at asm printing time instead.
...
llvm-svn: 46724
2008-02-04 23:06:48 +00:00
32e5347eb8
Get rid of the annoying blank lines before labels.
...
llvm-svn: 46667
2008-02-02 08:39:46 +00:00
2aa360adf8
Unbreak ppc debug support.
...
llvm-svn: 46665
2008-02-02 05:06:29 +00:00
efd142a920
SDIsel processes llvm.dbg.declare by recording the variable debug information descriptor and its corresponding stack frame index in MachineModuleInfo. This only works if the local variable is "homed" in the stack frame. It does not work for byval parameter, etc.
...
Added ISD::DECLARE node type to represent llvm.dbg.declare intrinsic. Now the intrinsic calls are lowered into a SDNode and lives on through out the codegen passes.
For now, since all the debugging information recording is done at isel time, when a ISD::DECLARE node is selected, it has the side effect of also recording the variable. This is a short term solution that should be fixed in time.
llvm-svn: 46659
2008-02-02 04:07:54 +00:00
d6e44ab5ec
Remove the nasty LABEL hack with a much less evil one. Now llvm.dbg.func.start implies a stoppoint is set. SelectionDAGISel records a new source line but does not create a ISD::LABEL node for this special stoppoint. Asm printer will magically print this label. This ensures nothing is emitted before.
...
llvm-svn: 46635
2008-02-01 09:10:45 +00:00
27b32b87ed
Revert 46556 and 46585. Dan please fix the PseudoSourceValue problem and re-commit.
...
llvm-svn: 46623
2008-01-31 21:00:00 +00:00
1c6c16ea11
Add an extra operand to LABEL nodes which distinguishes between debug, EH, or misc labels. This fixes the EH breakage. However I am not convinced this is *the* solution.
...
llvm-svn: 46609
2008-01-31 09:59:15 +00:00
3c0486fb38
Makes the same change in ppc backend: avoid inserting prologue before debug labels.
...
llvm-svn: 46596
2008-01-31 03:33:38 +00:00
9ba4d76816
Rename ISD::FLT_ROUNDS to ISD::FLT_ROUNDS_ to avoid conflicting
...
with the real FLT_ROUNDS (defined in <float.h>).
llvm-svn: 46587
2008-01-31 00:41:03 +00:00
3646fdda67
Create a new class, MemOperand, for describing memory references
...
in the backend. Introduce a new SDNode type, MemOperandSDNode, for
holding a MemOperand in the SelectionDAG IR, and add a MemOperand
list to MachineInstr, and code to manage them. Remove the offset
field from SrcValueSDNode; uses of SrcValueSDNode that were using
it are all all using MemOperandSDNode now.
Also, begin updating some getLoad and getStore calls to use the
PseudoSourceValue objects.
Most of this was written by Florian Brander, some
reorganization and updating to TOT by me.
llvm-svn: 46585
2008-01-31 00:25:39 +00:00
29cfb67e28
Even though InsertAtEndOfBasicBlock is an ugly hack it still deserves a proper name. Rename it to EmitInstrWithCustomInserter since it does not necessarily insert
...
instruction at the end.
llvm-svn: 46562
2008-01-30 18:18:23 +00:00
47a7d6fafe
Factor the addressing mode and the load/store VT out of LoadSDNode
...
and StoreSDNode into their common base class LSBaseSDNode. Member
functions getLoadedVT and getStoredVT are replaced with the common
getMemoryVT to simplify code that will handle both loads and stores.
llvm-svn: 46538
2008-01-30 00:15:11 +00:00
1a17ef02c8
If there's no instructions being emitted on X86 for a function, emit a
...
nop. Emit the nop directly for PPC.
llvm-svn: 46398
2008-01-26 09:03:52 +00:00
5079483957
If there are no machine instructions emitted for a function, then insert
...
a "nop" instruction so that we don't have the function's label associated
with something that it's not supposed to be associated with.
llvm-svn: 46394
2008-01-26 06:51:24 +00:00
919ad97c01
JITEmitter.cpp was trying to sync the icache for function stubs, but
...
was actually passing a completely incorrect size to sys_icache_invalidate.
Instead of having the JITEmitter do this (which doesn't have the correct
size), just make the target sync its own stubs.
llvm-svn: 46354
2008-01-25 16:41:09 +00:00
95d46ef887
The last pieces needed for loading arbitrary
...
precision integers. This won't actually work
(and most of the code is dead) unless the new
legalization machinery is turned on. While
there, I rationalized the handling of i1, and
removed some bogus (and unused) sextload patterns.
For i1, this could result in microscopically
better code for some architectures (not X86).
It might also result in worse code if annotating
with AssertZExt nodes turns out to be more harmful
than helpful.
llvm-svn: 46280
2008-01-23 20:39:46 +00:00
7f1ff5fedd
Honor explicit section information on Darwin.
...
llvm-svn: 46267
2008-01-23 00:58:14 +00:00
5c94cb3596
Implement flt_rounds for PowerPC.
...
llvm-svn: 46174
2008-01-18 19:55:37 +00:00
87757d38b3
get symbolic information for ppc ldbl nodes.
...
llvm-svn: 46165
2008-01-18 18:51:16 +00:00
f5b46f7dad
Fix a latent bug exposed by my truncstore patch. We compiled stfiwx-2.ll to:
...
_test:
fctiwz f0, f1
stfiwx f0, 0, r4
blr
instead of:
_test:
fctiwz f0, f1
stfd f0, -8(r1)
nop
nop
lwz r2, -4(r1)
stb r2, 0(r4)
blr
The former is not correct (stores 4 bytes, not 1).
llvm-svn: 46161
2008-01-18 16:54:56 +00:00
60a9855799
Revert the part of 45848 that treated weak globals
...
as weak globals rather than commons. While not wrong,
this change tickled a latent bug in Darwin's strip,
so revert it for now as a workaround.
llvm-svn: 46144
2008-01-17 23:04:07 +00:00
1ea55cf816
This commit changes:
...
1. Legalize now always promotes truncstore of i1 to i8.
2. Remove patterns and gunk related to truncstore i1 from targets.
3. Rename the StoreXAction stuff to TruncStoreAction in TLI.
4. Make the TLI TruncStoreAction table a 2d table to handle from/to conversions.
5. Mark a wide variety of invalid truncstores as such in various targets, e.g.
X86 currently doesn't support truncstore of any of its integer types.
6. Add legalize support for truncstores with invalid value input types.
7. Add a dag combine transform to turn store(truncate) into truncstore when
safe.
The later allows us to compile CodeGen/X86/storetrunc-fp.ll to:
_foo:
fldt 20(%esp)
fldt 4(%esp)
faddp %st(1)
movl 36(%esp), %eax
fstps (%eax)
ret
instead of:
_foo:
subl $4, %esp
fldt 24(%esp)
fldt 8(%esp)
faddp %st(1)
fstps (%esp)
movl 40(%esp), %eax
movss (%esp), %xmm0
movss %xmm0, (%eax)
addl $4, %esp
ret
llvm-svn: 46140
2008-01-17 19:59:44 +00:00
72733e573b
* Introduce a new SelectionDAG::getIntPtrConstant method
...
and switch various codegen pieces and the X86 backend over
to using it.
* Add some comments to SelectionDAGNodes.h
* Introduce a second argument to FP_ROUND, which indicates
whether the FP_ROUND changes the value of its input. If
not it is safe to xform things like fp_extend(fp_round(x)) -> x.
llvm-svn: 46125
2008-01-17 07:00:52 +00:00
59a2250b0d
Fix and enable EH for x86-64 Darwin. Adds
...
ShortenEHDataFor64Bits as a not-very-accurate
abstraction to cover all the changes in DwarfWriter.
Some cosmetic changes to Darwin assembly code for
gcc testsuite compatibility.
llvm-svn: 46029
2008-01-15 23:24:56 +00:00
8e07533f20
If someone wants to implement ppc TRAP, they can go for it :)
...
llvm-svn: 46019
2008-01-15 22:15:02 +00:00
9a249b0ce5
rename SDTRet -> SDTNone.
...
Move definition of 'trap' sdnode up from x86 instrinfo to targetselectiondag.td.
llvm-svn: 46017
2008-01-15 22:02:54 +00:00
596875118c
rename MachineInstr::setInstrDescriptor -> setDesc
...
llvm-svn: 45871
2008-01-11 18:10:50 +00:00
2ff66f08f2
Weak things initialized to 0 don't go in bss on Darwin.
...
Cosmetic changes to spacing to match gcc (some dejagnu
tests actually care).
llvm-svn: 45848
2008-01-11 00:54:37 +00:00
53c954fa86
Output sinl for a long double FSIN node, not sin.
...
Likewise fix up a bunch of other libcalls. While
there I remove NEG_F32 and NEG_F64 since they are
not used anywhere. This fixes 9 Ada ACATS failures.
llvm-svn: 45833
2008-01-10 10:28:30 +00:00
aca7ca3730
remove explicit sets of 'neverHasSideEffects' that can now be
...
inferred from the instr patterns.
llvm-svn: 45824
2008-01-10 05:45:39 +00:00
94de7bc3aa
get def use info more correct.
...
llvm-svn: 45821
2008-01-10 05:12:37 +00:00
7ecb3b79c7
Emit unused EH frames for weak definitions on Darwin,
...
because assembler/linker can't cope with weak absolutes.
PR 1880.
llvm-svn: 45811
2008-01-10 02:03:30 +00:00
bb956ca730
Use size_t to store Pos, avoid truncating value
...
on 64-bit builds. Analysis and original patch
by Török Edwin. Code audit found another place
with the same problem, also fixed here.
llvm-svn: 45746
2008-01-08 10:06:15 +00:00
89f36e6b21
Finally implement correct ordered comparisons for PPC, even though
...
the code generated is not wonderful. This turns a miscompilation into
a code quality bug (noted in the ppc readme). This fixes PR642, which
is over 2 years old (!). Nate, please review this.
llvm-svn: 45742
2008-01-08 06:46:30 +00:00
03ad885039
rename TargetInstrDescriptor -> TargetInstrDesc.
...
Make MachineInstr::getDesc return a reference instead
of a pointer, since it can never be null.
llvm-svn: 45695
2008-01-07 07:27:27 +00:00
d004f54155
use predicate.
...
llvm-svn: 45691
2008-01-07 06:37:29 +00:00
6077962101
no need to explicitly clear these fields.
...
llvm-svn: 45683
2008-01-07 04:55:09 +00:00
b0d06b4381
Move a bunch more accessors from TargetInstrInfo to TargetInstrDescriptor
...
llvm-svn: 45680
2008-01-07 03:13:06 +00:00
f0f438a517
remove MachineOpCode typedef.
...
llvm-svn: 45679
2008-01-07 02:48:55 +00:00
a98c679de0
Rename MachineInstr::getInstrDescriptor -> getDesc(), which reflects
...
that it is cheap and efficient to get.
Move a variety of predicates from TargetInstrInfo into
TargetInstrDescriptor, which makes it much easier to query a predicate
when you don't have TII around. Now you can use MI->getDesc()->isBranch()
instead of going through TII, and this is much more efficient anyway. Not
all of the predicates have been moved over yet.
Update old code that used MI->getInstrDescriptor()->Flags to use the
new predicates in many places.
llvm-svn: 45674
2008-01-07 01:56:04 +00:00
2a3be7bb6c
Move even more functionality from MRegisterInfo into TargetInstrInfo.
...
Some day I'll get it all moved over...
llvm-svn: 45672
2008-01-07 01:35:02 +00:00
a4ce4f6987
rename isLoad -> isSimpleLoad due to evan's desire to have such a predicate.
...
llvm-svn: 45667
2008-01-06 23:38:27 +00:00
10324d0175
rename isStore -> mayStore to more accurately reflect what it captures.
...
llvm-svn: 45656
2008-01-06 08:36:04 +00:00
a348f55ec6
Change the 'isStore' inferrer to look for 'SDNPMayStore'
...
instead of "ISD::STORE". This allows us to mark target-specific dag
nodes as storing (such as ppc byteswap stores). This allows us to remove
more explicit isStore flags from the .td files.
Finally, add a warning for when a .td file contains an explicit
isStore and tblgen is able to infer it.
llvm-svn: 45654
2008-01-06 06:44:58 +00:00
e20f380fbf
remove some isStore flags that are now inferred automatically.
...
llvm-svn: 45652
2008-01-06 05:53:26 +00:00
2e1ba07f16
Correct order of parameters.
...
llvm-svn: 45562
2008-01-04 02:22:21 +00:00
563fcc3428
Change MachineRelocation::DoesntNeedFnStub to NeedStub. This fields will be used
...
for non-function GV relocations that require function address stubs (e.g. Mac OS X in non-static mode).
llvm-svn: 45527
2008-01-03 02:56:28 +00:00
dcbc0f3029
leopard and above support alignment for common symbols.
...
llvm-svn: 45493
2008-01-02 19:35:16 +00:00
eee14601b1
Move some more instruction creation methods from RegisterInfo into InstrInfo.
...
llvm-svn: 45484
2008-01-01 21:11:32 +00:00
b0fb17fd34
Fix a bug in my previous patch: refer to the impl not the pure virtual version. It's unclear why gcc would ever compile this...
...
llvm-svn: 45476
2008-01-01 01:05:34 +00:00
25568e4cef
Fix a problem where lib/Target/TargetInstrInfo.h would include and use
...
a header file from libcodegen. This violates a layering order: codegen
depends on target, not the other way around. The fix to this is to
split TII into two classes, TII and TargetInstrInfoImpl, which defines
stuff that depends on libcodegen. It is defined in libcodegen, where
the base is not.
llvm-svn: 45475
2008-01-01 01:03:04 +00:00
7a73ae9a86
Move copyRegToReg from MRegisterInfo to TargetInstrInfo. This is part of the
...
Machine-level API cleanup instigated by Chris.
llvm-svn: 45470
2007-12-31 06:32:00 +00:00
a10fff51d9
Rename SSARegMap -> MachineRegisterInfo in keeping with the idea
...
that "machine" classes are used to represent the current state of
the code being compiled. Given this expanded name, we can start
moving other stuff into it. For now, move the UsedPhysRegs and
LiveIn/LoveOuts vectors from MachineFunction into it.
Update all the clients to match.
This also reduces some needless #includes, such as MachineModuleInfo
from MachineFunction.
llvm-svn: 45467
2007-12-31 04:13:23 +00:00
a5bb370aa4
Add new shorter predicates for testing machine operands for various types:
...
e.g. MO.isMBB() instead of MO.isMachineBasicBlock(). I don't plan on
switching everything over, so new clients should just start using the
shorter names.
Remove old long accessors, switching everything over to use the short
accessor: getMachineBasicBlock() -> getMBB(),
getConstantPoolIndex() -> getIndex(), setMachineBasicBlock -> setMBB(), etc.
llvm-svn: 45464
2007-12-30 23:10:15 +00:00
6005589faf
More cleanups for MachineOperand:
...
- Eliminate the static "print" method for operands, moving it
into MachineOperand::print.
- Change various set* methods for register flags to take a bool
for the value to set it to. Remove unset* methods.
- Group methods more logically by operand flavor in MachineOperand.h
llvm-svn: 45461
2007-12-30 21:56:09 +00:00
5c4637816e
Use MachineOperand::getImm instead of MachineOperand::getImmedValue. Likewise setImmedValue -> setImm
...
llvm-svn: 45453
2007-12-30 20:49:49 +00:00
f3ebc3f3d2
Remove attribution from file headers, per discussion on llvmdev.
...
llvm-svn: 45418
2007-12-29 20:36:04 +00:00
a087a8d2ce
remove attribution from lib Makefiles.
...
llvm-svn: 45415
2007-12-29 20:09:26 +00:00
31a2c3948e
Fix unintented change from last commit
...
llvm-svn: 45282
2007-12-21 12:22:29 +00:00
80c741e160
Enable EH for linux/ppc32 targets
...
llvm-svn: 45281
2007-12-21 12:19:44 +00:00
eadbf4b91c
Enable EH on PPC Darwin. This basically works; there
...
are a couple of issues that show up with the optimizer,
but I don't think they're really EH problems.
(llvm-gcc testsuite users note: By default the testsuite
uses the unwinding code that's built as part of your local
llvm-gcc, which does not work. You need to trick it into
using the installed system unwinding code to get useful
results.)
llvm-svn: 45221
2007-12-19 21:54:36 +00:00
ca77ecb40a
Mark the "isRemat" instruction as never having side effects.
...
llvm-svn: 45190
2007-12-19 06:07:48 +00:00
6e68381e02
Implicit def instructions, e.g. X86::IMPLICIT_DEF_GR32, are always re-materializable and they should not be spilled.
...
llvm-svn: 44960
2007-12-12 23:12:09 +00:00
f47015bc74
Fix a significant code quality regression I introduced on PPC64 quite
...
a while ago. We now produce:
_foo:
mflr r0
std r0, 16(r1)
ld r2, 16(r1)
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
instead of:
_foo:
mflr r0
std r0, 16(r1)
lis r0, 0
ori r0, r0, 16
ldx r2, r1, r0
std r2, 0(r3)
ld r0, 16(r1)
mtlr r0
blr
for:
void foo(void **X) {
*X = __builtin_return_address(0);
}
on ppc64.
llvm-svn: 44701
2007-12-08 07:04:58 +00:00
f6a8156e4f
implement __builtin_return_addr(0) on ppc.
...
llvm-svn: 44700
2007-12-08 06:59:59 +00:00
a6c8297e84
refactor some code to avoid overloading the name 'usesLR' in
...
different places to mean different things. Document what the
one in PPCFunctionInfo means and when it is valid.
llvm-svn: 44699
2007-12-08 06:39:11 +00:00
ab87e735cd
Fix a compilation warning.
...
llvm-svn: 44691
2007-12-08 01:00:21 +00:00
fb706bc52b
Initial commit of the machine code LICM pass. It successfully hoists this:
...
_foo:
li r2, 0
LBB1_1: ; bb
li r5, 0
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
to:
_foo:
li r2, 0
li r5, 0
LBB1_1: ; bb
stw r5, 0(r3)
addi r2, r2, 1
addi r3, r3, 4
cmplw cr0, r2, r4
bne cr0, LBB1_1 ; bb
LBB1_2: ; return
blr
ZOMG!! :-)
Moar to come...
llvm-svn: 44687
2007-12-07 21:42:31 +00:00
3b8a674469
Added canFoldMemoryOperand for PPC.
...
llvm-svn: 44623
2007-12-05 18:41:29 +00:00
bb26301864
Add a argument to storeRegToStackSlot and storeRegToAddr to specify whether
...
the stored register is killed.
llvm-svn: 44600
2007-12-05 03:14:33 +00:00
f45a1d623c
Remove redundant foldMemoryOperand variants and other code clean up.
...
llvm-svn: 44517
2007-12-02 08:30:39 +00:00
69fda0a716
Allow some reloads to be folded in multi-use cases. Specifically testl r, r -> cmpl [mem], 0.
...
llvm-svn: 44479
2007-12-01 02:07:52 +00:00
57ee7c6630
Implement ExpandOperationResult for ppc i64 fp->int, which fixes
...
CodeGen/Generic/fp_to_int.ll among others. Its unclear why this
just started failing...
llvm-svn: 44407
2007-11-28 18:44:47 +00:00
79ae9895f6
Fix a crash on invalid code due to memcpy lowering.
...
llvm-svn: 44378
2007-11-27 22:14:42 +00:00
763e110a9f
Fix .eh table linkage issues on Darwin. Some EH support
...
for Darwin PPC, but it's not fully working yet.
llvm-svn: 44258
2007-11-20 23:24:42 +00:00
aad83c8ee5
Remove meaningless qualifiers from return types, avoiding compiler warnings.
...
llvm-svn: 44240
2007-11-19 20:46:23 +00:00
7904708369
Revert previous; these files aren't ready to go in yet.
...
llvm-svn: 44057
2007-11-13 19:16:02 +00:00
7a7085f6d3
Add parameter to getDwarfRegNum to permit targets
...
to use different mappings for EH and debug info;
no functional change yet.
Fix warning in X86CodeEmitter.
llvm-svn: 44056
2007-11-13 19:13:01 +00:00
77b13af9a6
Unifacalize the CALLSEQ{START,END} stuff.
...
llvm-svn: 44045
2007-11-13 09:19:02 +00:00
f359fed9f9
Unify CALLSEQ_{START,END}. They take 4 parameters: the chain, two stack
...
adjustment fields, and an optional flag. If there is a "dynamic_stackalloc" in
the code, make sure that it's bracketed by CALLSEQ_START and CALLSEQ_END. If
not, then there is the potential for the stack to be changed while the stack's
being used by another instruction (like a call).
This can only result in tears...
llvm-svn: 44037
2007-11-13 00:44:25 +00:00
bfb139ec93
Completely forgot, that we have some debug information emission on PPC. This should fix
...
some regressions on ppc nightly tests.
llvm-svn: 44029
2007-11-12 23:36:13 +00:00
933b5b7e62
Add a flag for indirect branch instructions.
...
Target maintainers: please check that the instructions for your target are correctly marked.
llvm-svn: 44012
2007-11-12 07:39:39 +00:00
4edfea438a
Use TableGen to emit information for dwarf register numbers.
...
This makes DwarfRegNum to accept list of numbers instead.
Added three different "flavours", but only slightly tested on x86-32/linux.
Please check another subtargets if possible,
llvm-svn: 43997
2007-11-11 19:50:10 +00:00
283207a71c
Eliminate the remaining uses of getTypeSize. This
...
should only effect x86 when using long double. Now
12/16 bytes are output for long double globals (the
exact amount depends on the alignment). This brings
globals in line with the rest of LLVM: the space
reserved for an object is now always the ABI size.
One tricky point is that only 10 bytes should be
output for long double if it is a field in a packed
struct, which is the reason for the additional
argument to EmitGlobalConstant.
llvm-svn: 43688
2007-11-05 00:04:43 +00:00
d954dcd138
Fix crash before main on ppc/linux with static constructors. PR1771
...
llvm-svn: 43676
2007-11-04 17:32:10 +00:00
10f4152471
Disable a couple more things for ppcf128.
...
llvm-svn: 43267
2007-10-23 23:20:14 +00:00
ec271b104c
Temporary solution: added a different set of BCTRL_Macho / BCTRL_ELF with right callee-saved defs set for ppc64.
...
llvm-svn: 43248
2007-10-23 06:42:42 +00:00
bdbed66333
Use ptr type in the immediate field of a BxA instruction so we don't end up selecting 32-bit call instruction for ppc64.
...
llvm-svn: 43228
2007-10-22 19:46:19 +00:00
b193576bc6
comment fixes
...
llvm-svn: 43168
2007-10-19 04:08:28 +00:00
10432e5a67
More ppcf128 issues (maybe the last)?
...
llvm-svn: 43160
2007-10-19 00:59:18 +00:00
463e2ab0ac
- Added getOpcodeAfterMemoryUnfold(). It doesn't unfold an instruction, but only returns the opcode of the instruction post unfolding.
...
- Fix some copy+paste bugs.
llvm-svn: 43153
2007-10-18 22:40:57 +00:00
aa9a225699
Use SmallVectorImpl instead of SmallVector with hardcoded size in MRegister public interface.
...
llvm-svn: 43150
2007-10-18 21:29:24 +00:00
1366653e2f
Fix a bug handling frame references in ppc inline asm when the frame offset
...
doesn't fit into 16 bits.
llvm-svn: 43032
2007-10-16 18:00:18 +00:00
06a4954e6e
Change LowerFP_TO_SINT to create the specific code it needs instead of
...
unconditionally creating an i64 bitcast. With the future legalizer
design, operation legalization can't introduce new nodes with illegal
types.
This fixes the rest of olden on ppc32.
llvm-svn: 43005
2007-10-15 20:14:52 +00:00
cdf3609130
Revert 42908 for now.
...
llvm-svn: 42960
2007-10-14 05:57:21 +00:00
2f6b6d6fb0
Fix type mismatch error in PPC Altivec (only causes
...
a problem when asserts are on). From vecLib.
llvm-svn: 42959
2007-10-14 01:58:32 +00:00
dc35bd79ca
Change the names used for internal labels to use the current
...
function symbol name instead of a codegen-assigned function
number.
Thanks Evan! :-)
llvm-svn: 42908
2007-10-12 14:53:36 +00:00
9013eaff9a
Mark vector pow, ctpop, cttz, and ctlz as Expand on PowerPC.
...
llvm-svn: 42904
2007-10-12 14:08:57 +00:00
482732af9d
Set ISD::FPOW to Expand.
...
llvm-svn: 42881
2007-10-11 23:21:31 +00:00
666323eacd
Next PPC long double bits: ppcf128->i32 conversion.
...
Surprisingly complicated.
Adds getTargetNode for 2 outputs, no inputs (missing).
llvm-svn: 42822
2007-10-10 01:01:31 +00:00
71f0d7d76e
When we start enabling SMUL_LOHI/UMUL_LOHI or SDIVREM/UDIVREM in
...
target-indepenent lowering, don't use them on PowerPC.
llvm-svn: 42755
2007-10-08 17:28:24 +00:00
f864ac96d8
Next powerpc long double bits. Comparisons work,
...
although not well, and shortening FP converts.
llvm-svn: 42672
2007-10-06 01:24:11 +00:00
c0154c06d6
First round of ppc long double. call/return and
...
basic arithmetic works.
Rename RTLIB long double functions to distinguish
different flavors of long double; the lib functions
have different names, alas.
llvm-svn: 42644
2007-10-05 20:04:43 +00:00
f4cf5dcdd2
- Added a few target hooks to generate load / store instructions from / to any
...
address (not just from / to frameindexes).
- Added target hooks to unfold load / store instructions / SDNodes into separate
load, data processing, store instructions / SDNodes.
llvm-svn: 42621
2007-10-05 01:32:41 +00:00
c731c97fac
Use empty() member functions when that's what's being tested for instead
...
of comparing begin() and end().
llvm-svn: 42585
2007-10-03 19:26:29 +00:00
a1d46c7d0a
TargetAsmInfo::getAddressSize() was incorrect for x86-64 and 64-bit targets
...
other than PPC64. Instead of fixing it, just remove it and fix all the
places that use it to use TargetData::getPointerSize() instead, as there
aren't very many. Most of the references were in DwarfWriter.cpp.
llvm-svn: 42419
2007-09-27 23:12:31 +00:00
c1e4e3743b
Allow copyRegToReg to emit cross register classes copies.
...
Tested with "make check"!
llvm-svn: 42346
2007-09-26 06:25:56 +00:00
57211c5550
More explicit keywords.
...
llvm-svn: 42316
2007-09-25 20:27:06 +00:00
1ff71872c2
Honor user-defined section specification of a global, ignores whether its initializer is null.
...
llvm-svn: 42182
2007-09-21 00:41:19 +00:00
d29f938335
Do not override user specified section.
...
llvm-svn: 42179
2007-09-20 23:07:37 +00:00
9da02f5ee2
Remove isReg, isImm, and isMBB, and change all their users to use
...
isRegister, isImmediate, and isMachineBasicBlock, which are equivalent,
and more popular.
llvm-svn: 41958
2007-09-14 20:33:02 +00:00
5196f617a1
Fix comments.
...
llvm-svn: 41947
2007-09-14 01:57:02 +00:00
66c22e8fd6
Enable indirect encoding for the personality function
...
llvm-svn: 41873
2007-09-11 23:55:40 +00:00
3e18e504ae
Remove (somewhat confusing) Imp<> helper, use let Defs = [], Uses = [] instead.
...
llvm-svn: 41863
2007-09-11 19:55:27 +00:00
86e0119822
Fold the adjust_trampoline intrinsic into
...
init_trampoline. There is now only one
trampoline intrinsic.
llvm-svn: 41841
2007-09-11 14:10:23 +00:00
6777b72659
Add some notes about better flag handling.
...
llvm-svn: 41808
2007-09-10 21:43:18 +00:00
9929bc403d
Add missing index versions of instructions to the map.
...
llvm-svn: 41776
2007-09-07 22:01:02 +00:00
e2f23a3abf
Add lengthof and endof templates that hide a lot of sizeof computations.
...
Patch by Sterling Stein!
llvm-svn: 41758
2007-09-07 04:06:50 +00:00
b65ef38590
LVXL and STVXL are also a load and store resp.
...
llvm-svn: 41733
2007-09-05 23:47:12 +00:00
b9bf812ba5
Add the 64-bit versions of the DS* Altivec instructions.
...
llvm-svn: 41717
2007-09-05 04:05:20 +00:00
4dbd9f254a
Fix for PR1613: added 64-bit rotate left PPC instructions and patterns.
...
llvm-svn: 41711
2007-09-04 20:20:29 +00:00
3cf889f75e
Enhance APFloat to retain bits of NaNs (fixes oggenc).
...
Use APFloat interfaces for more references, mostly
of ConstantFPSDNode.
llvm-svn: 41632
2007-08-31 04:03:46 +00:00
9a25d98c86
Add a variant of foldMemoryOperand to fold any load / store, not just load / store from / to stack slots.
...
llvm-svn: 41597
2007-08-30 05:52:20 +00:00
10e18dea2a
Use i64 on a PPC64 machine
...
llvm-svn: 41590
2007-08-30 00:59:19 +00:00
d8c9cb9182
rename isOperandValidForConstraint to LowerAsmOperandForConstraint,
...
changing the interface to allow for future changes.
llvm-svn: 41384
2007-08-25 00:47:38 +00:00
a124f69c52
Disable EH generation until PPC works 100%.
...
llvm-svn: 41360
2007-08-24 16:00:15 +00:00
92c6a65d4e
new example
...
llvm-svn: 41318
2007-08-23 15:16:03 +00:00
f5124b36e4
Fix arguments for some Altivec instructions. From SWB.
...
llvm-svn: 40957
2007-08-09 00:49:19 +00:00
4e7ff3593c
Fix spelling of mtvscr and mfvscr.
...
llvm-svn: 40908
2007-08-07 23:08:00 +00:00
c5283ecd6f
long double patch 2 of N. Handle it in TargetData.
...
(I've tried to get the info right for all targets,
but I'm not expert on all of them - check yours.)
llvm-svn: 40792
2007-08-03 20:20:50 +00:00
5f6a9da530
More explicit keywords.
...
llvm-svn: 40757
2007-08-02 21:21:54 +00:00
58c3c30921
Some out operands were incorrectly specified as input operands.
...
llvm-svn: 40697
2007-08-01 23:07:38 +00:00
581d2795dc
Vector fneg must be expanded into fsub -0.0, X.
...
llvm-svn: 40586
2007-07-30 07:51:22 +00:00
644f917358
Support for trampolines, except for X86 codegen which is
...
still under discussion.
llvm-svn: 40549
2007-07-27 12:58:54 +00:00
cf0a5349de
Don't ignore the return value of AsmPrinter::doInitialization and
...
AsmPrinter::doFinalization.
llvm-svn: 40487
2007-07-25 19:33:14 +00:00
5805c46e8f
Fix debug info and globals filled with zeros.
...
llvm-svn: 40483
2007-07-25 03:48:45 +00:00
ac1591be42
No more noResults.
...
llvm-svn: 40132
2007-07-21 00:34:19 +00:00
9d5df0a5f6
Added -print-emitted-asm to print out JIT generated asm to cerr.
...
llvm-svn: 40123
2007-07-20 21:56:13 +00:00
9081ab8127
Oops. These stores actually produce results.
...
llvm-svn: 40074
2007-07-20 00:20:46 +00:00
94b5a80b93
Change instruction description to split OperandList into OutOperandList and
...
InOperandList. This gives one piece of important information: # of results
produced by an instruction.
An example of the change:
def ADD32rr : I<0x01, MRMDestReg, (ops GR32:$dst, GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
=>
def ADD32rr : I<0x01, MRMDestReg, (outs GR32:$dst), (ins GR32:$src1, GR32:$src2),
"add{l} {$src2, $dst|$dst, $src2}",
[(set GR32:$dst, (add GR32:$src1, GR32:$src2))]>;
llvm-svn: 40033
2007-07-19 01:14:50 +00:00
383a324735
Long live the exception handling!
...
This patch fills the last necessary bits to enable exceptions
handling in LLVM. Currently only on x86-32/linux.
In fact, this patch adds necessary intrinsics (and their lowering) which
represent really weird target-specific gcc builtins used inside unwinder.
After corresponding llvm-gcc patch will land (easy) exceptions should be
more or less workable. However, exceptions handling support should not be
thought as 'finished': I expect many small and not so small glitches
everywhere.
llvm-svn: 39855
2007-07-14 14:06:15 +00:00
2182f06f2d
Skeleton of post-RA scheduler; doesn't do anything yet.
...
Change name of -sched option and DEBUG_TYPE to
pre-RA-sched; adjust testcases.
llvm-svn: 39816
2007-07-13 17:13:54 +00:00
09d73c0305
Assert when TLS is not implemented.
...
llvm-svn: 39737
2007-07-11 17:19:51 +00:00
f8f531bf69
Change getCopyToParts and getCopyFromParts to always use target-endian
...
register ordering, for both physical and virtual registers. Update the PPC
target lowering for calls to expect registers for the call result to
already be in target order.
llvm-svn: 38471
2007-07-09 20:59:04 +00:00
517290ae52
The various "getModuleMatchQuality" implementations should return
...
zero if they see a target triple they don't understand.
llvm-svn: 38463
2007-07-09 17:25:29 +00:00
76a97c5f8a
Do away with ImmutablePredicateOperand.
...
llvm-svn: 37961
2007-07-06 23:22:46 +00:00
e16561cd5d
Here is the bulk of the sanitizing.
...
Almost all occurrences of "bytecode" in the sources have been eliminated.
llvm-svn: 37913
2007-07-05 17:07:56 +00:00
ea4a82bcfb
PPC conditional branch predicate does not change after isel.
...
llvm-svn: 37893
2007-07-05 07:09:50 +00:00
2660cef6d7
Convert .cvsignore files
...
llvm-svn: 37801
2007-06-29 16:35:07 +00:00
58d1eacd80
Prevent PPC::BCC first operand, the PRED number, from being isel'd into a LI instruction.
...
llvm-svn: 37790
2007-06-29 01:25:06 +00:00
309d3d51b3
Move ComputeMaskedBits, MaskedValueIsZero, and ComputeNumSignBits from
...
TargetLowering to SelectionDAG so that they have more convenient
access to the current DAG, in preparation for the ValueType routines
being changed from standalone functions to members of SelectionDAG for
the pre-legalize vector type changes.
llvm-svn: 37704
2007-06-22 14:59:07 +00:00
7936d91f70
describe an argument, hide it.
...
llvm-svn: 37650
2007-06-19 05:46:06 +00:00
944200be45
If a function is vararg, never pass inreg arguments in registers. Thanks to
...
Anton for half of this patch.
llvm-svn: 37641
2007-06-19 00:13:10 +00:00
5c4413120f
Rename MVT::getVectorBaseType to MVT::getVectorElementType.
...
llvm-svn: 37579
2007-06-14 22:58:02 +00:00
c68554683d
Handle blocks with 2 unconditional branches in AnalyzeBranch.
...
llvm-svn: 37571
2007-06-13 17:59:52 +00:00
5514bbef46
Add a utility routine to check for unpredicated terminator instruction.
...
llvm-svn: 37528
2007-06-08 21:59:56 +00:00
cff3e122b0
Implementation of compilation callback in PPC ELF32
...
llvm-svn: 37340
2007-05-29 16:33:18 +00:00
f9cbdc676c
name change requested by review of previous patch
...
llvm-svn: 37289
2007-05-22 18:31:04 +00:00
82810c8a13
Make tail merging the default, except on powerPC. There was no prior art
...
for a target-dependent default with a command-line override; this way
should be generally usable.
llvm-svn: 37285
2007-05-22 17:14:46 +00:00
fc94eb66d2
BlockHasNoFallThrough() now returns true if block ends with a return instruction.
...
llvm-svn: 37266
2007-05-21 18:44:17 +00:00
c12dd5207d
Apply this patch:
...
http://lists.cs.uiuc.edu/pipermail/llvm-commits/Week-of-Mon-20070514/049845.html
llvm-svn: 37240
2007-05-18 23:21:46 +00:00
99be49dd9b
RemoveBranch() and InsertBranch() now returns number of instructions deleted / inserted.
...
llvm-svn: 37192
2007-05-18 00:05:48 +00:00
3e549e9d5f
add support for 128-bit add/sub on ppc64
...
llvm-svn: 37158
2007-05-17 06:52:46 +00:00
0b7472da6f
fix some subtle inline asm selection issues
...
llvm-svn: 37067
2007-05-15 01:31:05 +00:00
d194a8603d
PredicateOperand can be used as a normal operand for isel.
...
llvm-svn: 36947
2007-05-08 21:06:08 +00:00
f50ba31ec6
R0 is a sub-register of X0, etc.
...
llvm-svn: 36939
2007-05-08 17:03:51 +00:00
90bb4fc96b
revert accidental commit
...
llvm-svn: 36668
2007-05-03 16:40:25 +00:00
c1a2a3b344
add support for printing offset of global
...
llvm-svn: 36667
2007-05-03 16:39:48 +00:00
8c78a0bff0
Drop 'const'
...
llvm-svn: 36662
2007-05-03 01:11:54 +00:00
e95c6ad802
Use 'static const char' instead of 'static const int'.
...
Due to darwin gcc bug, one version of darwin linker coalesces
static const int, which defauts PassID based pass identification.
llvm-svn: 36652
2007-05-02 21:39:20 +00:00
09f162ca6a
Do not use typeinfo to identify pass in pass manager.
...
llvm-svn: 36632
2007-05-01 21:15:47 +00:00
5662b21db1
eliminateFrameIndex() change.
...
llvm-svn: 36626
2007-05-01 09:13:03 +00:00
27a625a74b
llvm bug #1350 , parts 1, 2, and 3.
...
llvm-svn: 36618
2007-05-01 05:57:02 +00:00
0ba174534c
Match MachineFunction::UsedPhysRegs changes.
...
llvm-svn: 36452
2007-04-25 22:13:27 +00:00
8cd224e81c
Relex assertions to account for additional implicit def / use operands.
...
llvm-svn: 36430
2007-04-25 07:12:14 +00:00
cb35c61a4b
Fix PR1351 and CodeGen/PowerPC/2007-04-24-InlineAsm-I-Modifier.ll
...
llvm-svn: 36410
2007-04-24 22:51:03 +00:00
19ccd6226c
Fix a bug in PPCTargetLowering::isLegalAddressingMode, scales other than 0/1/2
...
are always unsupported.
llvm-svn: 35835
2007-04-09 22:10:05 +00:00
e9f516384d
Squelch a warning about mismatch between sign of constant and sign of return
...
type.
llvm-svn: 35674
2007-04-04 22:07:24 +00:00
23710a7da3
Starting implementation of the ELF32 ABI specification of varargs handling.
...
LowerVASTART emits the right code if the subtarget is ELF32, the other intrinsics
(VAARG, VACOPY and VAEND) are not yet implemented.
llvm-svn: 35625
2007-04-03 13:59:52 +00:00
b3e99a18ee
The PPC64 ELF ABI is "intended to use the same structure layout and calling convention rules
...
as the 64-bit PowerOpen ABI" (Reference http://www.linux-foundation.org/spec/ELF/ppc64/ ).
Change all ELF tests to ELF32.
llvm-svn: 35624
2007-04-03 12:35:28 +00:00
ab559f6e3c
Addition to the previous commit for getCalleeSavedRegClasses:
...
"The ELF ABI specifies F1-F8 registers as argument registers for double, not
F1-F10. This affects only ELF, not MachO."
llvm-svn: 35623
2007-04-03 10:57:49 +00:00
fbfc451ba9
The ELF ABI specifies F1-F8 registers as argument registers for double, not
...
F1-F10. This affects only ELF, not MachO.
llvm-svn: 35622
2007-04-03 10:27:07 +00:00
3e21eb7fd7
Fix a bug which caused us to never be able to use signed comparisons for
...
equality comparisons of a constant. This allows us to codegen the 'sintzero'
loop in PR1288 as:
LBB1_1: ;cond_next
li r4, 0
addi r2, r2, 1
stw r4, 0(r3)
addi r3, r3, 4
cmpwi cr0, r2, -1
bne cr0, LBB1_1 ;cond_next
instead of:
LBB1_1: ;cond_next
addi r2, r2, 1
li r4, 0
xoris r5, r2, 65535
stw r4, 0(r3)
addi r3, r3, 4
cmplwi cr0, r5, 65535
bne cr0, LBB1_1 ;cond_next
This implements CodeGen/PowerPC/compare-simm.ll, and also cuts 74
instructions out of kc++.
llvm-svn: 35590
2007-04-02 05:59:42 +00:00
075b4db621
add a note
...
llvm-svn: 35530
2007-03-31 07:06:25 +00:00
1eb94d973a
implement the new addressing mode description hook.
...
llvm-svn: 35521
2007-03-30 23:15:24 +00:00
682baf2dda
"The C standards do say that "char" may either be a "signed char" or "unsigned
...
char" and it is up to the compilers implementation or the platform which is
followed."
http://www.arm.linux.org.uk/docs/faqs/signedchar.php
llvm-svn: 35382
2007-03-27 16:33:08 +00:00
26ad3e7191
add a note
...
llvm-svn: 35334
2007-03-25 05:10:46 +00:00
9c9e2f1af2
add a note
...
llvm-svn: 35330
2007-03-25 04:46:28 +00:00
8810241ebc
Fix CodeGen/PowerPC/2007-03-24-cntlzd.ll
...
llvm-svn: 35329
2007-03-25 04:44:03 +00:00
d685514e2e
switch TargetLowering::getConstraintType to take the entire constraint,
...
not just the first letter. No functionality change.
llvm-svn: 35322
2007-03-25 02:14:49 +00:00
4ea5217880
Protect R31's frame offset from being used by callee-saved registers, when R31
...
is the frame pointer.
llvm-svn: 35233
2007-03-21 16:44:14 +00:00
61f39d186c
Added MRegisterInfo hook to re-materialize an instruction.
...
llvm-svn: 35205
2007-03-20 08:09:38 +00:00
7aad92868c
Stack and register alignment of call arguments in the ELF ABI
...
llvm-svn: 35083
2007-03-13 15:02:46 +00:00
b9dce9db85
More flexible TargetLowering LSR hooks for testing whether an immediate is a legal target address immediate or scale.
...
llvm-svn: 35074
2007-03-12 23:29:01 +00:00
ddf082082c
Putting more constants which do not contain relocations into .literal{4|8|16}
...
llvm-svn: 35026
2007-03-08 08:31:54 +00:00
d918477ac3
For Darwin, put constant data into .const, .const_data, .literal{4|8|16}
...
sections.
llvm-svn: 35017
2007-03-08 01:25:25 +00:00
8b8cac289b
Minor interface change.
...
llvm-svn: 34967
2007-03-06 10:05:14 +00:00
4f2e4e0f92
Switch PPC return lower to use an autogenerated CC description.
...
llvm-svn: 34940
2007-03-06 00:59:59 +00:00
e6049c2f08
Emit low/high immediate loads properly for Linux/PPC.
...
llvm-svn: 34871
2007-03-03 05:29:51 +00:00
75ab9799df
Implemented the frameaddress intrinsic for PPC.
...
llvm-svn: 34787
2007-03-01 13:11:38 +00:00
e0232ec706
More Mach-O writer improvements.
...
llvm-svn: 34740
2007-02-28 07:40:50 +00:00
95ae95a6a6
PEI now passes a RegScavenger ptr to eliminateFrameIndex.
...
llvm-svn: 34707
2007-02-28 00:21:17 +00:00
b524dfd557
Fix parenthesis for BCTRL_{ELF|Macho} test.
...
llvm-svn: 34668
2007-02-27 13:10:41 +00:00
89d81878d2
Differentiate between the MachO and the ELF ABI the CALL instruction.
...
llvm-svn: 34667
2007-02-27 13:01:19 +00:00
b6e200bd68
Duplicate use of LR, take 2.
...
llvm-svn: 34666
2007-02-27 11:55:45 +00:00
5d7ce57c13
Backing out Jim's LR spill changes. This was causing llvm-gcc bootstrapping
...
to infinite loop:
PPCMachineFunctionInfo.h updated: 1.2 -> 1.3
PPCRegisterInfo.cpp updated: 1.110 -> 1.111
PPCRegisterInfo.h updated: 1.28 -> 1.29
llvm-svn: 34652
2007-02-27 02:55:29 +00:00
535bd6d3ba
always lower to RETFLAG, never leave it as just ret.
...
llvm-svn: 34639
2007-02-26 19:44:02 +00:00
1ee61ab414
no really, this is the right patch
...
llvm-svn: 34605
2007-02-25 20:01:40 +00:00
4d2f5f8740
always promote float varargs to double.
...
llvm-svn: 34604
2007-02-25 19:59:18 +00:00
84ab9a556c
one important bugfix: PPC32 didn't have both elf and macho support for
...
external symbols and global addresses. Add the missing ones.
one important workaround: PPCISD::CALL is matched by both PPCcall_ELF
and PPCcall_Macho, disable the _ELF patterns for now.
llvm-svn: 34601
2007-02-25 19:20:53 +00:00
43df5b335c
implement support for the linux/ppc function call ABI. Patch by
...
Nicolas Geoffray!
llvm-svn: 34574
2007-02-25 05:34:32 +00:00
b9bd34f54a
Add XLForm_1_ext template, patch by Nicolas Geoffray.
...
llvm-svn: 34573
2007-02-25 05:07:49 +00:00
249edb8b67
Improve JIT support for linux/ppc: Patch by Nicolas Geoffray!
...
llvm-svn: 34572
2007-02-25 05:04:13 +00:00
2f28a3cf08
Don't spill LR as a callee saved register.
...
llvm-svn: 34533
2007-02-23 20:34:16 +00:00
df5899258c
By default, spills kills the register being stored.
...
llvm-svn: 34515
2007-02-23 01:10:04 +00:00
0416b204c9
remove obsolete file
...
llvm-svn: 34506
2007-02-22 23:48:43 +00:00
e0008e23cf
Simplify lowering and selection of exception ops.
...
llvm-svn: 34488
2007-02-22 14:56:36 +00:00
3796abea0f
Support to provide exception and selector registers.
...
llvm-svn: 34482
2007-02-21 22:54:50 +00:00
18fc09723c
Add support for changes in DwarfWriter.
...
llvm-svn: 34478
2007-02-21 22:47:38 +00:00
af76e0e58f
Add TAI field for exception table section.
...
llvm-svn: 34477
2007-02-21 22:43:40 +00:00
f7ed82da10
Re-apply my liveintervalanalysis changes. Now with PR1207 fixes.
...
llvm-svn: 34428
2007-02-19 21:49:54 +00:00
da81bf4d3e
For PR1207:
...
Revert patches that caused the problem. Evan, please investigate and reapply
when you've discovered the problem.
llvm-svn: 34399
2007-02-19 03:20:00 +00:00
9865be6d40
Added getReservedRegs().
...
llvm-svn: 34376
2007-02-17 11:06:00 +00:00
1f7d60262e
Fix ixaddrs as well, allowing ppc64 to compile to:
...
_test2:
li r2, 0
lis r3, 1
std r2, 9024(r3)
blr
instead of:
_test2:
lis r2, 1
li r3, 0
ori r2, r2, 9024
std r3, 0(r2)
blr
This implements CodeGen/PowerPC/LargeAbsoluteAddr.ll:test2
llvm-svn: 34373
2007-02-17 06:57:26 +00:00
4a9c0bb147
Compile test/CodeGen/PowerPC/LargeAbsoluteAddr.ll to:
...
_test:
lis r2, 743
li r3, 0
stw r3, 32751(r2)
blr
instead of:
_test:
li r2, 0
stw r2, 32751(48693248)
blr
Implement support for ppc64 as well, allowing it to produce better code.
llvm-svn: 34371
2007-02-17 06:44:03 +00:00
8091f28d1a
fix incorrect encoding of vminsw.
...
llvm-svn: 34351
2007-02-16 21:20:09 +00:00
945e437c65
Generalize TargetData strings, to support more interesting forms of data.
...
Patch by Scott Michel.
llvm-svn: 34266
2007-02-14 05:52:17 +00:00
c9088b4c8e
add a note
...
llvm-svn: 34101
2007-02-09 17:38:01 +00:00
ba52b94fa2
Remove fixed item
...
llvm-svn: 34081
2007-02-09 04:19:54 +00:00
e796b6de45
Fixed comments.
...
llvm-svn: 34040
2007-02-08 06:05:08 +00:00
2aa9a42f24
Moved the MachOWriter and ELFWriter out of the Target/* files. Placed the
...
definition of it into the CodeGen library. This is so that a backend doesn't
necessarily add in these writers if it doesn't use them (like in the lli
program).
llvm-svn: 34034
2007-02-08 01:39:44 +00:00
4e8ad36338
Dead files. Functionality has been taken over by the Add*Writer functions.
...
llvm-svn: 34029
2007-02-08 01:32:51 +00:00
a883f55eca
Moved the GetTargetRelocation method from PPCMachOWriter to here. It uses
...
non-Mach-O-specific information.
llvm-svn: 33819
2007-02-03 02:41:58 +00:00
2c350921e2
Moved the GetTargetRelocation method to the PPCMachOWriterInfo object. The
...
PPCMachOWriter is now trivial.
llvm-svn: 33818
2007-02-03 02:40:57 +00:00
c3de9b4b14
Support for non-landing pad exception handling.
...
llvm-svn: 33755
2007-02-01 16:31:34 +00:00
f7937005a3
Fix CodeGen/PowerPC/2007-01-31-InlineAsmAddrMode.ll
...
llvm-svn: 33732
2007-02-01 00:39:08 +00:00
37ebf9317b
A relatively simple PPC optimization.
...
llvm-svn: 33709
2007-01-31 19:49:20 +00:00
5301e7c605
For PR1136: Rename GlobalVariable::isExternal as isDeclaration to avoid
...
confusion with external linkage types.
llvm-svn: 33663
2007-01-30 20:08:39 +00:00
0e083d0161
Darwin -static should codegen static ctors / dtors to .constructor / .destructor sections.
...
llvm-svn: 33657
2007-01-30 08:04:53 +00:00
3f9f250928
Only gather frame info if debug or eh.
...
llvm-svn: 33639
2007-01-29 23:20:22 +00:00
eda5997cc8
Finish off bug 680, allowing targets to custom lower frame and return
...
address nodes.
llvm-svn: 33636
2007-01-29 22:58:52 +00:00
e3b09fbbb0
We'd still like to register allocate r2 on darwin before the callee-save
...
regs.
llvm-svn: 33635
2007-01-29 22:57:48 +00:00
17f250005a
Update some of the llvm in the readme
...
llvm-svn: 33630
2007-01-29 21:21:22 +00:00
b4a2f05d1c
Landing pad-less eh for PPC.
...
llvm-svn: 33622
2007-01-29 18:51:14 +00:00
037c867b54
Propagate changes from my local tree. This patch includes:
...
1. New parameter attribute called 'inreg'. It has meaning "place this
parameter in registers, if possible". This is some generalization of
gcc's regparm(n) attribute. It's currently used only in X86-32 backend.
2. Completely rewritten CC handling/lowering code inside X86 backend.
Merged stdcall + c CCs and fastcall + fast CC.
3. Dropped CSRET CC. We cannot add struct return variant for each
target-specific CC (e.g. stdcall + csretcc and so on).
4. Instead of CSRET CC introduced 'sret' parameter attribute. Setting in
on first attribute has meaning 'This is hidden pointer to structure
return. Handle it gently'.
5. Fixed small bug in llvm-extract + add new feature to
FunctionExtraction pass, which relinks all internal-linkaged callees
from deleted function to external linkage. This will allow further
linking everything together.
NOTEs: 1. Documentation will be updated soon.
2. llvm-upgrade should be improved to translate csret => sret.
Before this, there will be some unexpected test fails.
llvm-svn: 33597
2007-01-28 13:31:35 +00:00
debcb5530c
Fix a spelling error
...
llvm-svn: 33556
2007-01-26 22:40:50 +00:00
f209495e93
Handle multiple functions, properly mangle symbols, and fix support for
...
scattered relocations.
llvm-svn: 33555
2007-01-26 22:39:48 +00:00
c56315c2b5
Change the MachineDebugInfo to MachineModuleInfo to better reflect usage
...
for debugging and exception handling.
llvm-svn: 33550
2007-01-26 21:22:28 +00:00
f9e5445ed4
Make LABEL a builtin opcode.
...
llvm-svn: 33537
2007-01-26 14:34:52 +00:00
313c2937f0
Fix comment.
...
llvm-svn: 33508
2007-01-25 22:48:25 +00:00
5acf2fbb43
- Tell PEI that PPC will handle stack frame rounding itself.
...
- Do not round up to max. alignment of stack object if it is > stack alignment.
It will have to be handled with dynamic aligning code.
llvm-svn: 33505
2007-01-25 22:25:04 +00:00
48518548bd
Fix test/CFrontend/2007-01-24-InlineAsmCModifier.c on PPC
...
llvm-svn: 33494
2007-01-25 02:52:50 +00:00
f6c63fec92
Repair debug frames as a prelude to eh_frames. Switched to using MachineMoves
...
by value so that clean up is less confusing (these vectors tend to be small.)
llvm-svn: 33488
2007-01-24 18:45:13 +00:00
06a03210af
Make ivars private and use getters. Have the MachOWriter return "Mach-O
...
Writer" for the pass name.
llvm-svn: 33483
2007-01-24 07:13:56 +00:00
40cb811cf8
Add a field for and construction of the PPCMachOWriterInfo object.
...
llvm-svn: 33480
2007-01-24 03:41:36 +00:00
56f1058309
Move the getJTRelocation method out of here.
...
llvm-svn: 33479
2007-01-24 03:40:33 +00:00
a1b7b8a485
New "TargetMachOWriterInfo" class. It holds target-specific information
...
that the MachOWriter needs in order to do its writing stuff 'n things.
llvm-svn: 33475
2007-01-24 03:36:05 +00:00
16e58be1bc
hasFP() is now a virtual method of MRegisterInfo.
...
llvm-svn: 33455
2007-01-23 00:57:47 +00:00
9f3a7eb9b2
Double and long preferred alignment set to 8 bytes.
...
llvm-svn: 33447
2007-01-22 23:11:06 +00:00
28c5b8618a
Needed to build on PPC Linux.
...
llvm-svn: 33352
2007-01-19 04:36:02 +00:00
889d934d00
move contents of PR587 to here.
...
llvm-svn: 33333
2007-01-18 07:34:57 +00:00
e750f61ac5
Have the OutputBuffer take the is64Bit and isLittleEndian booleans.
...
llvm-svn: 33316
2007-01-18 01:23:11 +00:00
c1ea85b4c4
Modify emission of jump tables on darwin to emit an extra "l" label that
...
delimits the boundaries of jump tables. This lets the linker's dead code
stripping optimization do a better job.
llvm-svn: 33315
2007-01-18 01:15:58 +00:00
cd9c1f035a
Changed to use the OutputBuffer instead of the methods in MachO and ELF
...
writers.
llvm-svn: 33311
2007-01-17 22:22:31 +00:00
38ee6519b7
Revert patch.
...
llvm-svn: 33298
2007-01-17 09:06:13 +00:00
05e5a5ee6c
Create the specified TargetObjInfo and use it.
...
llvm-svn: 33291
2007-01-17 03:51:37 +00:00
f758157385
New "TargetObjInfo" class. This holds information that the object writers will
...
use to write things to the file. It's abstract so each target should implement
its own version for each writer type.
llvm-svn: 33286
2007-01-17 03:46:30 +00:00
c7b2ab9bdf
Instead of yet another enum indicating the "assembly language flavor",
...
just use the one that's in the subtarget.
llvm-svn: 33255
2007-01-16 09:29:17 +00:00
e21237e59a
Fix for PR1095:
...
LLVM would miscompile ASM dialects when compiling for PPC. Added dialects for
the X86 and PPC backends. It defaults to "0", the first variant of a compound
inline asm expression.
llvm-svn: 33246
2007-01-16 03:42:04 +00:00
3c84b551db
add support for hidden visibility to darwin/ppc and linux/ppc targets
...
llvm-svn: 33200
2007-01-14 06:37:54 +00:00
72a56fc44c
Disable the macho writer until it is 100% functional. Enabling it when
...
broken invites bug reports.
llvm-svn: 32961
2007-01-06 22:27:58 +00:00
8bc7ddb84d
setSetCCIsExpensive is gone.
...
llvm-svn: 32941
2007-01-05 23:42:53 +00:00
74b46e8c05
Fix naming inconsistency.
...
llvm-svn: 32823
2007-01-02 21:33:40 +00:00
28663c73ef
Changes from Nick Lewycky with a simplified PPCTargetAsmInfo.
...
llvm-svn: 32735
2006-12-21 20:26:09 +00:00
4c90a6df16
Oops.
...
llvm-svn: 32724
2006-12-20 21:35:00 +00:00
c2c861d00e
Original patch was overly complicated.
...
llvm-svn: 32723
2006-12-20 21:33:34 +00:00
41621a72f5
Changes to target powerpc for non-Darwin assemblers.
...
1. Patches from Nick Lewycky.
2. Code to filter register names and print them as numeric values on
non-Darwin systems.
llvm-svn: 32721
2006-12-20 20:56:46 +00:00
1ef9cd400d
eliminate static ctors for Statistic objects.
...
llvm-svn: 32703
2006-12-19 22:59:26 +00:00
d7998d0e6d
move ExtWeakSymbols to AsmPrinter
...
llvm-svn: 32648
2006-12-18 03:37:18 +00:00
360a14be02
Apply B. Scott Michel's patch for PR1054, thanks!
...
llvm-svn: 32630
2006-12-16 20:23:42 +00:00
a0850e98ee
Patterns no longer needed due to fix in the DAG combiner.
...
llvm-svn: 32612
2006-12-15 21:39:31 +00:00
73d307d12d
Not all test cases are created equal. This fix is needed.
...
llvm-svn: 32605
2006-12-15 18:51:01 +00:00
38b1d53afe
Not needed. Misinterpreted error message from other bug (Missing load/store
...
relocations.)
llvm-svn: 32604
2006-12-15 18:45:32 +00:00
b0367c987e
Missing load/store relocations.
...
llvm-svn: 32601
2006-12-15 16:44:10 +00:00
36d826dca2
Provide 64-bit support for i64 sextload<i8>.
...
llvm-svn: 32600
2006-12-15 14:34:11 +00:00
f07cc990dd
Provide support for FP_TO_UINT.
...
llvm-svn: 32599
2006-12-15 14:32:57 +00:00
59e7a777da
Honor cpu directive, take two.
...
llvm-svn: 32492
2006-12-12 20:57:08 +00:00
8171e58bd9
Rollback changes to take a different tack.
...
llvm-svn: 32488
2006-12-12 19:26:50 +00:00
7c3cab9ddc
Honor the command line specification for machine type.
...
llvm-svn: 32483
2006-12-12 16:07:33 +00:00
095e6f3044
Reduce number of instructions to load 64-bit constants.
...
llvm-svn: 32481
2006-12-12 13:23:43 +00:00
f4646a7e54
Another step forward in PPC64 JIT support: we now no-longer need stubs
...
emitted for external globals in PPC64-JIT-PIC mode (which is good because
we didn't handle them before!).
This also fixes a bug handling the picbase delta, which we would get wrong
in some cases.
llvm-svn: 32451
2006-12-11 23:22:45 +00:00
b1f3157638
getInstrItineraryData shouldn't copy the itineraries
...
llvm-svn: 32448
2006-12-11 21:42:55 +00:00
2b136a73bd
Missing opcode.
...
llvm-svn: 32439
2006-12-11 18:45:56 +00:00
e95909a4ef
Layout proper frame for ppc64.
...
llvm-svn: 32436
2006-12-11 18:10:54 +00:00
e8da58b3f9
Properly mangles symbol table names
...
Supports constant pools
Supports relocations to jump tables
Supports relocations within the data segment (global = address of global)
Allocates memory in a non-hacky for all non-code objects.
llvm-svn: 32430
2006-12-11 02:20:45 +00:00
3b7c257cae
Cleaned setjmp/longjmp lowering interfaces. Now we're producing right
...
code (both asm & cbe) for Mingw32 target.
Removed autoconf checks for underscored versions of setjmp/longjmp.
llvm-svn: 32415
2006-12-10 23:12:42 +00:00
6af2220815
Reverting until finding the cause of secondary bugs.
...
llvm-svn: 32413
2006-12-10 13:09:42 +00:00
04c832d4ab
__PPC64CompilationCallback code was allowing registers to be clobbered by stub.
...
llvm-svn: 32412
2006-12-10 12:13:31 +00:00
09fecf9a47
this is an initial patch to switch the ppc64 jit over to working in PIC mode,
...
which allows the code to be above the 2G marker. We still need to JIT emit
dyld stubs to support external, weak, common, etc globals, but that will
happen tomorrow.
llvm-svn: 32348
2006-12-08 04:54:03 +00:00
13535c2d93
fix incorrect encoding of rldicr, used by ppc64 function stubs, etc.
...
llvm-svn: 32341
2006-12-07 23:44:07 +00:00
9bfb1e1f29
What should be the last unnecessary <iostream>s in the library.
...
llvm-svn: 32333
2006-12-07 22:21:48 +00:00
a9a817dc7d
fix CodeGen/PowerPC/2006-12-07-LargeAlloca.ll on ppc64
...
llvm-svn: 32331
2006-12-07 22:15:58 +00:00
d8e7451dc3
Fix i64 uint_to_fp on ppc64
...
llvm-svn: 32297
2006-12-07 01:24:16 +00:00
43c0eb839c
implement sextinreg i8->i64 and i16->i64
...
llvm-svn: 32293
2006-12-06 21:46:13 +00:00
9472eb83c3
fix another sradi encoding bug. This fixes Olden/health with the ppc64 jit.
...
llvm-svn: 32291
2006-12-06 21:35:10 +00:00
aeadac88ea
fix the jit encoding of sradi, simplify the MDForm1 description.
...
llvm-svn: 32285
2006-12-06 20:02:54 +00:00
Dan Gohman