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4 Commits

Author SHA1 Message Date
Matt Arsenault 60b91e0ba2 AMDGPU: Remove unnecessary IR from MIR tests 
llvm-svn: 307311
 2017-07-06 20:56:57 +00:00
Stanislav Mekhanoshin 286a4225b9 [AMDGPU] Fix SIFoldOperands crash with clamp 
Fixes bug #33302. Pass did not account that Src1 of max instruction
can be an immediate.

Differential Revision: https://reviews.llvm.org/D33884

llvm-svn: 304696
 2017-06-05 01:03:04 +00:00
Matt Arsenault 3cb390498e AMDGPU: Fold omod into instructions 
llvm-svn: 296372
 2017-02-27 19:35:42 +00:00
Matt Arsenault d5c6515b68 AMDGPU: Fold FP clamp as modifier bit 
The manual is unclear on the details of this. It's not
clear to me if denormals are not allowed with clamp,
or if that is only omod. Not allowing denorms for
fp16 or fp64 isn't useful so I also question if that
is really a restriction. Same with whether this is valid
without IEEE mode enabled.

llvm-svn: 295905
 2017-02-22 23:27:53 +00:00