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3 Commits

Author SHA1 Message Date
Kazushi (Jam) Marukawa 3c80478d73 [VE] Update branch instructions 
Summary:
Changing all mnemonic to match assembly instructions to simplify mnemonic
naming rules. This time update all branch instructions.  This also change
to use %s10 register consistently.

Differential Revision: https://reviews.llvm.org/D78889
 2020-04-28 09:41:01 +02:00
Kazushi (Jam) Marukawa e981a46a77 [VE] Update lea/load/store instructions 
Summary:
Modify lea/load/store instructions to accept `disp(index, base)`
style addressing mode (called ASX format).  Also, uniform the
number of DAG nodes to have 3 operands for this ASX format
instructions, and update selectADDR functions to lower
appropriate MI.

Reviewers: arsenm, simoll, k-ishizaka

Reviewed By: simoll

Differential Revision: https://reviews.llvm.org/D76822
 2020-04-06 11:49:46 +02:00
Kazushi (Jam) Marukawa 60431bd728 [VE] Support for PIC (global data and calls) 
Summary: Support for PIC with tests for global variables and function calls.

Reviewed By: arsenm

Differential Revision: https://reviews.llvm.org/D74536
 2020-02-14 09:50:02 +01:00