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58 Commits

Author SHA1 Message Date
Venkatraman Govindaraju 98aa7fab7e [Sparc] Correct quad register list in the asm parser. 
Add test cases to check parsing of v9 double registers and their aliased quad registers.

llvm-svn: 199974
 2014-01-24 05:24:01 +00:00
Eric Christopher 7383d4a9c5 Fix out of bounds access to the double regs array. Given the 
code this looks correct, but could use review. The previous
was definitely not correct.

llvm-svn: 199940
 2014-01-23 21:41:10 +00:00
Venkatraman Govindaraju cd4d9ac62a [Sparc] Add support for parsing floating point instructions. 
llvm-svn: 199033
 2014-01-12 04:48:54 +00:00
Venkatraman Govindaraju 0d288d3105 [Sparc] Add support for parsing jmpl instruction and make indirect call and jmp instructions as aliases to jmpl. 
llvm-svn: 198909
 2014-01-10 01:48:17 +00:00
Venkatraman Govindaraju b3b7c38983 [Sparc] Add support for parsing branch instructions and conditional moves. 
llvm-svn: 198738
 2014-01-08 06:14:52 +00:00
Venkatraman Govindaraju 559c4ac377 [Sparc] Add support for parsing sparc asm modifiers such as %hi, %lo etc., 
Also, correct the offsets for FixupsKindInfo.

llvm-svn: 198681
 2014-01-07 08:00:49 +00:00
Venkatraman Govindaraju 0458b599f8 [Sparc] Add support for parsing memory operands in sparc AsmParser. 
llvm-svn: 198658
 2014-01-07 01:49:11 +00:00
Venkatraman Govindaraju c2dee7dc74 [Sparc] Add the initial implementation of an asm parser for sparc/sparcv9. 
llvm-svn: 198484
 2014-01-04 11:30:13 +00:00