Commit Graph

24744 Commits

Author SHA1 Message Date
Duncan Sands 3a52056d4d Use removeAllCalledFunctions rather than removing
edges one by one by hand.

llvm-svn: 55836
2008-09-05 14:56:53 +00:00
Duncan Sands 7c8fb1ad93 Remove trailing whitespace.
llvm-svn: 55835
2008-09-05 12:37:12 +00:00
Duncan Sands 6dd02b5219 Make this pass return that it made a change if
it modifies a functions attributes.

llvm-svn: 55831
2008-09-05 09:08:37 +00:00
Duncan Sands 4d50e984bb "Fix" PR2762. The testcase now crashes codegen
elsewhere due to a missing pattern for
v2f64 = sint_to_fp v2i32.  That is PR2687.

llvm-svn: 55828
2008-09-05 08:13:35 +00:00
Dan Gohman 921ddd69ba Fix a search+replace-o.
llvm-svn: 55824
2008-09-05 01:58:21 +00:00
Dale Johannesen f2a52bbee5 Add -flimit-float-precision to enable some faster,
but less accurate (non-IEEE) code sequences for
certain math library functions.  Add the first of
several such expansions.  Don't worry, if you don't
turn it on it won't affect you.

llvm-svn: 55823
2008-09-05 01:48:15 +00:00
Dan Gohman 09faf81b6c Check a comparion's operand type for legality before
expanding its operands.

llvm-svn: 55820
2008-09-05 01:33:56 +00:00
Dan Gohman ffd89d40d2 Fix X86FastISel code for comparisons and conditional branches
to check the result of getRegForValue before using it, and
to check for illegal operand types.

llvm-svn: 55819
2008-09-05 01:15:35 +00:00
Dan Gohman ea56bdde34 FastISel support for unreachable.
llvm-svn: 55818
2008-09-05 01:08:41 +00:00
Dan Gohman 5b4a9f4a69 In FastISel mode, the scheduler may be invoked multiple times
in the same block. Fix the entry-block handling to only run at
at the beginning of the entry block, and not any other times.

llvm-svn: 55817
2008-09-05 01:07:48 +00:00
Dan Gohman a5753b31be X86FastISel support for conditional branches.
llvm-svn: 55816
2008-09-05 01:06:14 +00:00
Owen Anderson 50288e3c99 Add initial support for selecting constant materializations that require constant
pool loads on X86 in fast isel.  This isn't actually used yet.

llvm-svn: 55814
2008-09-05 00:06:23 +00:00
Dan Gohman 09fdbcf400 X86FastISel support for ICmpInst and FCmpInst.
llvm-svn: 55811
2008-09-04 23:26:51 +00:00
Evan Cheng 6c94b99c62 For whatever the reason, x86 CallingConv::Fast (i.e. fastcc) was not passing scalar arguments in registers. This patch defines a new fastcc CC which is slightly different from the FastCall CC. In addition to passing integer arguments in ECX and EDX, it also specify doubles are passed in 8-byte slots which are 8-byte aligned (instead of 4-byte aligned). This avoids a potential performance hazard where doubles span cacheline boundaries.
llvm-svn: 55807
2008-09-04 22:59:58 +00:00
Devang Patel 40519f0370 A loop may be unswitched multiple times. Reconstruct dom info. at the end.
llvm-svn: 55806
2008-09-04 22:43:59 +00:00
Devang Patel b9d5e02811 If function notes say optimize for size, then adjust alignment.
llvm-svn: 55794
2008-09-04 21:03:41 +00:00
Dan Gohman 5eba3bcac6 Add an include of SmallSet.h.
llvm-svn: 55793
2008-09-04 20:49:27 +00:00
Devang Patel 00ec74616b Initialize loop data first.
llvm-svn: 55792
2008-09-04 20:36:36 +00:00
Duncan Sands 21a57993dc Neaten this up a bit. No functionality change.
llvm-svn: 55789
2008-09-04 19:16:20 +00:00
Devang Patel d52071540c Do not unswitch if the function notes say we're optimizing this function for size.
llvm-svn: 55786
2008-09-04 18:55:13 +00:00
Andrew Lenharth 19fb2aba50 try to seperate the mechanism into something others can use
llvm-svn: 55785
2008-09-04 18:51:26 +00:00
Dale Johannesen fe1bb7964c Add intrinsic forms of pow and exp2. The non-intrinsic
forms remain to handle older IR files, but will go away soon.

llvm-svn: 55781
2008-09-04 18:30:46 +00:00
Dan Gohman a79db30d28 Tidy up several unbeseeming casts from pointer to intptr_t.
llvm-svn: 55779
2008-09-04 17:05:41 +00:00
Owen Anderson b8c7ba228f Fix the ordering of operands to the store (inverted relative to LLVM IR), and fix the testcase.
llvm-svn: 55777
2008-09-04 16:48:33 +00:00
Dan Gohman 634412fe35 Clean up uses of TargetLowering::getTargetMachine.
llvm-svn: 55769
2008-09-04 15:39:15 +00:00
Andrew Lenharth 95d573a7f0 cleanup as per Duncan's review
llvm-svn: 55766
2008-09-04 14:34:22 +00:00
Owen Anderson 4f948bd87a Add a first attempt at implementing stores for X86 fast isel using target hooks.
Dan or Evan, please review.

llvm-svn: 55764
2008-09-04 07:08:58 +00:00
Evan Cheng 8d8f47d50b Load from GV stub should be locally CSE'd.
llvm-svn: 55763
2008-09-04 06:18:33 +00:00
Evan Cheng 93d40ae1e1 Fix an overly strict assertion. Source register of a copy may not be killed, it may be killed by an implicit super-register use.
llvm-svn: 55762
2008-09-04 05:43:55 +00:00
Evan Cheng 3152edf474 Remove code that pad number of bytes to pop for X86_FastCall CC. The code doesn't do the "aligning" for Cygwin, Mingw, and Windows. But aligning it on Darwin and Linux breaks gcc compatibility. That ruled out all the platforms we support!
llvm-svn: 55756
2008-09-04 01:04:15 +00:00
Dale Johannesen da2d80688b Add intrinsics for log, log2, log10, exp, exp2.
No functional change (and no FE change to generate them).

llvm-svn: 55753
2008-09-04 00:47:13 +00:00
Dan Gohman e039d5580e Do trivial local CSE for constants and other non-Instruction values
in FastISel.

llvm-svn: 55748
2008-09-03 23:32:19 +00:00
Dan Gohman 45df9951f5 Put RegsForValue in the llvm namespace to avoid warnings about
classes in the llvm namespace having members with types from
anonymous namespaces.

llvm-svn: 55747
2008-09-03 23:18:39 +00:00
Dan Gohman 7bda51f5a4 Create HandlePHINodesInSuccessorBlocksFast, a version of
HandlePHINodesInSuccessorBlocks that works FastISel-style. This
allows PHI nodes to be updated correctly while using FastISel.

This also involves some code reorganization; ValueMap and
MBBMap are now members of the FastISel class, so they needn't
be passed around explicitly anymore. Also, SelectInstructions
is changed to SelectInstruction, and only does one instruction
at a time.

llvm-svn: 55746
2008-09-03 23:12:08 +00:00
Devang Patel a26e2075b8 Update inline threshold for current function if the notes say, optimize for size.
llvm-svn: 55745
2008-09-03 23:06:09 +00:00
Owen Anderson 2fbfb70530 Fix a bug that prevented PRE from applying in some cases.
llvm-svn: 55744
2008-09-03 23:06:07 +00:00
Devang Patel 397d895bb8 Avoid extra comma.
llvm-svn: 55742
2008-09-03 22:55:40 +00:00
Devang Patel 3771a1281f Parse and print opt_size note.
llvm-svn: 55740
2008-09-03 22:10:21 +00:00
Andrew Lenharth 9fed8f5b9c Initial version of a Partial Specialization IPO pass. It triggers a couple hundred times on 176.gcc. I don't know the performance impact yet, the heuristic is quite simple still.
llvm-svn: 55734
2008-09-03 21:00:28 +00:00
Dale Johannesen 5c1ff11fc3 Do not emit a UsedDirective for things in the llvm.used
list that have internal linkage; the linker doesn't need
or want this.  (These objects must still be preserved
at compile time, so just removing them from the llvm.used
list doesn't work.)  Should affect only Darwin.

llvm-svn: 55722
2008-09-03 20:34:58 +00:00
Devang Patel a563d24e5d Fix typo in a comment.
llvm-svn: 55720
2008-09-03 20:25:40 +00:00
Devang Patel a4211876e5 Add parentheses to make code more readable.
llvm-svn: 55717
2008-09-03 19:57:15 +00:00
Devang Patel 50c66cdb0d Fix comments.
llvm-svn: 55716
2008-09-03 19:52:17 +00:00
Duncan Sands ee088a7093 If a SCC has a node without a function, then the SCC
analysis would bail out without removing function
records for other members of the SCC (which may exist
if those functions read or wrote global variables).
Since these are initialized to "readnone", this
resulted in incorrect alias analysis results.

llvm-svn: 55714
2008-09-03 19:37:16 +00:00
Devang Patel 924d9084d8 Add custom inliner that handles only functions that are marked as always_inline.
llvm-svn: 55713
2008-09-03 18:50:53 +00:00
Devang Patel 0d442ffa2b Handle "always inline" note during inline cost analysis.
llvm-svn: 55712
2008-09-03 18:47:45 +00:00
Devang Patel 79661994b1 Check noinline note and ignore other notes.
llvm-svn: 55711
2008-09-03 18:46:35 +00:00
Devang Patel 62be9ad270 Handle "noinline" note inside the simple inliner.
llvm-svn: 55708
2008-09-03 18:10:21 +00:00
Owen Anderson b1b9398ea7 Oops, I accidentally broke the fallback case with my last commit.
llvm-svn: 55704
2008-09-03 17:51:57 +00:00
Owen Anderson ea666816c2 Fix an issue where we were reusing materializations of constants in blocks not dominated by the materialization. This is
the simple fix, materializing the constant before every use.  It might be better to either track domination of uses or
to materialize all constants and the beginning of the function and let remat sort when to do materialization at uses.

llvm-svn: 55703
2008-09-03 17:37:03 +00:00
Dan Gohman 575fad337c Split the SelectionDAG-building code, including the FunctionLoweringInfo
and SelectionDAGLowering classes, out of SelectionDAGISel.cpp and put
it in a separate file, SelectionDAGBuild.cpp.

llvm-svn: 55701
2008-09-03 16:12:24 +00:00
Duncan Sands e74d7502d2 Fix maxo bado thinko.
llvm-svn: 55700
2008-09-03 16:10:55 +00:00
Dan Gohman b10f1a5c60 Separate MachineInstr-emitting routines from actual scheduling
routines and move them into a separate file, ScheduleDAGEmit.cpp.

llvm-svn: 55699
2008-09-03 16:01:59 +00:00
Dan Gohman c7367b4546 Fix addRegisterDead and addRegisterKilled to be more thorough
when searching for redundant subregister dead/kill bits.

Previously it was common to see instructions marked like this:
  "RET %EAX<imp-use,kill>, %AX<imp-use,kill>"

With this change, addRegisterKilled continues scanning after
finding the %EAX operand, so it proceeds to discover the
redundant %AX kill and eliminates it, producing this:
  "RET %EAX<imp-use,kill>"

This currently has no effect on the generated code.

llvm-svn: 55698
2008-09-03 15:56:16 +00:00
Duncan Sands 0eca0571f8 Since onlyReadsMemory returns true if in fact
doesNotAccessMemory, check doesNotAccessMemory
first, since otherwise functions may be
marked readonly rather than readnone.

llvm-svn: 55697
2008-09-03 15:31:24 +00:00
Duncan Sands 42c644ef03 Cleanup GlobalsModRef a bit. When analysing the
callgraph, when one member of a SCC calls another
then the analysis would drop to mod-ref because
there is (usually) no function info for the callee
yet; fix this.  Teach the analysis about function
attributes, in particular the readonly attribute
(which requires being careful about globals).

llvm-svn: 55696
2008-09-03 12:55:42 +00:00
Nick Lewycky ac5c7d514f Try to fold each element of a vector. This is needed to maintain structural
equivalence.

llvm-svn: 55694
2008-09-03 06:48:55 +00:00
Evan Cheng a41ee2974b Add X86 target hook to implement load (even from GlobalAddress).
llvm-svn: 55693
2008-09-03 06:44:39 +00:00
Evan Cheng 31ddd09f4a If TargetSelectInstruction returns true, move to next instruction.
llvm-svn: 55692
2008-09-03 06:43:41 +00:00
Nick Lewycky 2fcb26cc75 Don't apply this transform to vectors. Fixes PR2756.
llvm-svn: 55690
2008-09-03 06:24:21 +00:00
Nick Lewycky f023db6444 Don't crash when trying to constant fold a vector with some elements that can't
be folded. Instead, fail to fold the entire vector.

We could also return a vector with some elements folded and some not. If anyone
thinks that's a better approach, please speak up!

llvm-svn: 55689
2008-09-03 05:54:33 +00:00
Ted Kremenek 2175b55dc7 Fix capitalization in #include of FastISel.h. This unbreaks the build on case-sensitive filesystems.
llvm-svn: 55687
2008-09-03 02:54:11 +00:00
Evan Cheng 8f23ec96b0 Unbreak fast isel.
llvm-svn: 55685
2008-09-03 01:04:47 +00:00
Devang Patel bcd39345de Add additional check to ensure that iv is canonicalized.
llvm-svn: 55682
2008-09-03 00:29:13 +00:00
Devang Patel b530f08122 Check iteration count.
llvm-svn: 55680
2008-09-03 00:10:56 +00:00
Evan Cheng 24422d4928 Let tblgen only generate fastisel routines, not the class definition. This makes it easier for targets to define its own fastisel class.
llvm-svn: 55679
2008-09-03 00:03:49 +00:00
Devang Patel 81fed043c5 While removing PHI, use basicblock to identify incoming value.
llvm-svn: 55678
2008-09-03 00:02:42 +00:00
Devang Patel 7e59270272 s/FP_AlwaysInline/FN_NOTE_AlwaysInline/g
llvm-svn: 55676
2008-09-02 22:43:57 +00:00
Devang Patel 43c5a52e07 If all IV uses are extending integer IV then change the type of IV itself, if possible.
llvm-svn: 55674
2008-09-02 22:18:08 +00:00
Devang Patel bfa535af9f respect inline=never and inline=always notes.
llvm-svn: 55673
2008-09-02 22:16:13 +00:00
Evan Cheng 09ff2e7372 80 col violations.
llvm-svn: 55668
2008-09-02 21:59:13 +00:00
Devang Patel ca9d93e627 Read and write function notes.
llvm-svn: 55657
2008-09-02 21:47:13 +00:00
Devang Patel 805b37ca43 Use bitwise AND.
llvm-svn: 55656
2008-09-02 21:46:44 +00:00
Devang Patel 600879c8e8 Print function notes.
llvm-svn: 55647
2008-09-02 20:56:33 +00:00
Devang Patel c57b7a0fc8 Parse function notes.
llvm-svn: 55646
2008-09-02 20:52:40 +00:00
Devang Patel d334a43a86 Initialize function notes.
llvm-svn: 55645
2008-09-02 20:51:15 +00:00
Dale Johannesen bc69829b22 Fix some bugs in the code sequences for atomics.
llvm-svn: 55643
2008-09-02 20:30:23 +00:00
Dan Gohman 115267fdc6 Ensure that HandlePHINodesInSuccessorBlocks is run for all blocks,
even in FastISel mode in the case where FastISel successfully 
selects all the instructions. 

llvm-svn: 55641
2008-09-02 20:17:56 +00:00
Nuno Lopes 99341f2d9d plug a little memleak in verifyFunction()
# first commit to llvm, so whatch out :)

llvm-svn: 55631
2008-09-02 11:30:10 +00:00
Evan Cheng 52b181206f MMI may be null.
llvm-svn: 55626
2008-09-02 08:14:01 +00:00
Evan Cheng df8cdc3717 Add Mac OS X compatible JIT callback routine.
llvm-svn: 55625
2008-09-02 07:49:03 +00:00
Evan Cheng 3be5b728b1 Revamp ARM JIT.
llvm-svn: 55624
2008-09-02 06:52:38 +00:00
Evan Cheng 34f3a962b0 Change getBinaryCodeForInstr prototype. First operand MachineInstr& should be const. Make corresponding changes.
llvm-svn: 55623
2008-09-02 06:51:36 +00:00
Gabor Greif 9c64e61176 Provide two overloads of AnalyzeNewNode.
The first can update the SDNode in an SDValue
while the second is called with SDNode* and
returns a possibly updated SDNode*.

This patch has no intended functional impact,
but helps eliminating ugly temporary SDValues.

llvm-svn: 55608
2008-09-01 15:10:19 +00:00
Duncan Sands 4b31a2a7ce Even though no caller actually uses the new value
(what matters is that it is added to the worklist),
it seems more logical to return it.

llvm-svn: 55606
2008-09-01 13:11:13 +00:00
Duncan Sands 130d9efec3 Add a small pass that sets the readnone/readonly
attributes on functions, based on the result of
alias analysis.  It's not hardwired to use
GlobalsModRef even though this is the only (AFAIK)
alias analysis that results in this pass actually
doing something.  Enable as follows:
  opt ... -globalsmodref-aa -markmodref ...
Advantages of this pass: (1) records the result
of globalsmodref in the bitcode, meaning it is
available for use by later passes (currently
the pass manager isn't smart enough to magically
make an advanced alias analysis available to all
later passes), which may expose more optimization
opportunities; (2) hopefully speeds up compilation
when code is optimized twice, for example when a
file is compiled to bitcode, then later LTO is done
on it: marking functions readonly/readnone when
producing the initial bitcode should speed up alias
analysis during LTO; (3) good for discovering that
globalsmodref doesn't work very well :)
Not currently turned on by default.

llvm-svn: 55604
2008-09-01 11:40:11 +00:00
Evan Cheng fa558788e7 Control flow instruction encodings.
llvm-svn: 55601
2008-09-01 08:25:56 +00:00
Evan Cheng c288cc0572 ldm / stm instruction encodings.
llvm-svn: 55599
2008-09-01 07:48:18 +00:00
Evan Cheng c37532b24a AXI2 and AXI3 instruction encodings.
llvm-svn: 55598
2008-09-01 07:34:13 +00:00
Evan Cheng a282723499 Reorganize instruction formats again; AXI1 encoding.
llvm-svn: 55597
2008-09-01 07:19:00 +00:00
Evan Cheng 169eccc24e addrmode3 instruction encodings.
llvm-svn: 55596
2008-09-01 07:00:14 +00:00
Evan Cheng 624844b4dd Reorganize some instruction format definitions. No functionality change.
llvm-svn: 55594
2008-09-01 01:51:14 +00:00
Evan Cheng cccca875b1 Rest of addrmode2 instruction encodings.
llvm-svn: 55593
2008-09-01 01:27:33 +00:00
Evan Cheng 01fd3f129a Addr2 word / byte load encodings.
llvm-svn: 55591
2008-08-31 19:02:21 +00:00
Evan Cheng 5b6c931e1f Addr1 instructions opcodes are encoded in bits 21-24; encode S bit.
llvm-svn: 55590
2008-08-31 18:32:16 +00:00
Gabor Greif 81d6a38434 fix a bunch of 80-col violations
llvm-svn: 55588
2008-08-31 15:37:04 +00:00
Bill Wendling aebd2662d3 Revert the "XFAIL" for the rotate_ops.ll testcase. Instead, mark ISD::ROTR
instructions in CellSPU as "Expand" so that they won't be generated. I added a
"FIXME" so that this hack can be addressed and reverted once ISD::ROTR is
supported in the .td files.

llvm-svn: 55582
2008-08-31 02:59:23 +00:00
Bill Wendling 62cf24343c Expand for ROTR with MVT::i64.
Dale, Could you please review this?

llvm-svn: 55581
2008-08-31 02:53:19 +00:00
Bill Wendling 58bb4f1bf0 Cosmetic changes to Machine LICM. No functionality change.
llvm-svn: 55578
2008-08-31 02:30:23 +00:00
Bill Wendling 11284ea499 Another situation where ROTR is cheaper than ROTL.
llvm-svn: 55577
2008-08-31 01:13:31 +00:00
Bill Wendling 4822a7ac8a For this pattern, ROTR is the cheaper option.
llvm-svn: 55576
2008-08-31 01:04:56 +00:00
Bill Wendling fc72416447 - Fix comment so that it describes how the code really works:
// fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotl x, y)
   // fold (or (shl x, (*ext y)), (srl x, (*ext (sub 32, y)))) ->
   //   (rotr x, (sub 32, y))

Example: (x == 0xDEADBEEF and y == 4)

    (x << 4) | (x >> 28)
 => 0xEADBEEF0 | 0x0000000D
 => 0xEADBEEFD

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => 0xEADBEEFD

- Fix comment and code for second version. It wasn't using the rot* propertly.

   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) -> 
   //   (rotr x, y)
   // fold (or (shl x, (*ext (sub 32, y))), (srl x, (*ext r))) ->
   //   (rotl x, (sub 32, y))

    (x << 28) | (x >> 4)
 => 0xD0000000 | 0x0DEADBEE
 => 0xDDEADBEE

    (rotl x, 4)
 => 0xEADBEEFD

    (rotr x, 28)
 => (0xEADBEEFD)

llvm-svn: 55575
2008-08-31 00:37:27 +00:00
Gabor Greif 66ccf603a9 typo
llvm-svn: 55574
2008-08-30 22:16:05 +00:00
Gabor Greif e12264bf41 fix some 80-col violations
llvm-svn: 55571
2008-08-30 19:29:20 +00:00
Gordon Henriksen eeb6537abb PR2731: C and Ocaml bindings for setTailCall and isTailCall.
Based on patch by Giorgos Korfiatis.

llvm-svn: 55570
2008-08-30 16:34:54 +00:00
Gordon Henriksen b52d1ed7e9 Fix ConstantExpr::getInsertElement.
Breakage was exposed in the Ocaml bindings tests after Chris
uncommented an assertion in r55084.

llvm-svn: 55566
2008-08-30 15:41:51 +00:00
Gabor Greif a719239719 fix some 80-col violations
llvm-svn: 55565
2008-08-30 10:09:02 +00:00
Evan Cheng a3771d5bd9 Re-apply 55467 with fix. If copy is being replaced by remat'ed def, transfer the implicit defs onto the remat'ed instruction.
llvm-svn: 55564
2008-08-30 09:09:33 +00:00
Evan Cheng 542ac62971 Fold isRematerializable checks into isSafeToReMat.
llvm-svn: 55563
2008-08-30 09:07:18 +00:00
Evan Cheng b8d588d89c For now, can't mark XOR64rr isAsCheapAsAMove. It's technically correct. But various passes cannot handle remating these.
llvm-svn: 55562
2008-08-30 08:54:22 +00:00
Evan Cheng cfb7f3abdf Transform (x << (y&31)) -> (x << y). This takes advantage of the fact x86 shift instructions 2nd operand (shift count) is limited to 0 to 31 (or 63 in the x86-64 case).
llvm-svn: 55558
2008-08-30 02:03:58 +00:00
Owen Anderson 6f0c51d9da Fix an issue where a use might be selected before a def, and then we didn't respect the pre-chosen vreg
assignment when selecting the def.  This is the naive solution to the problem: insert a copy to the pre-chosen
vreg.  Other solutions might be preferable, such as:
  1) Passing the dest reg into FastEmit_.  However, this would require the higher level code to know about reg classes, which they don't currently.
  2) Selecting blocks in reverse postorder.  This has some compile time cost for computing the order, and we'd need to measure its impact.

llvm-svn: 55555
2008-08-30 00:38:46 +00:00
Dale Johannesen 340d264f52 Add ppc partial-word ATOMIC_CMP_SWAP.
llvm-svn: 55554
2008-08-30 00:08:53 +00:00
Evan Cheng 3fddc7e906 Swap fp comparison operands and change predicate to allow load folding (safely this time).
llvm-svn: 55553
2008-08-29 23:22:12 +00:00
Evan Cheng f93bc7f755 Use static_cast instead of C style cast.
llvm-svn: 55552
2008-08-29 23:21:31 +00:00
Evan Cheng 894be333f1 Fix 80 col. violations.
llvm-svn: 55551
2008-08-29 23:20:46 +00:00
Evan Cheng 5e7658c2e4 Back out 55498. It broken Apple style bootstrapping.
llvm-svn: 55549
2008-08-29 22:21:44 +00:00
Evan Cheng b3ed09703c Backing out 55521. Not safe.
llvm-svn: 55548
2008-08-29 22:13:21 +00:00
Dale Johannesen f0a88d6b2a Add partial word version of ATOMIC_SWAP.
llvm-svn: 55546
2008-08-29 18:29:46 +00:00
Owen Anderson 0673a8af14 Add initial support for fast isel of instructions that have inputs pinned to physical registers.
llvm-svn: 55545
2008-08-29 17:45:56 +00:00
Chris Lattner b1a635b30c regenerate
llvm-svn: 55542
2008-08-29 17:20:18 +00:00
Chris Lattner b25e5eab23 Asmprint nameless instructions as:
%4 = add ...

instead of:

add ...    ; 4

This makes opt -print-cfg output actually usable and makes .ll files
generally easier to read.  This fixes PR2480

llvm-svn: 55541
2008-08-29 17:19:30 +00:00
Chris Lattner a51c7030e2 Add support for parsing .ll files that have numbers in front of
nameless values, such as:

%3 = add i32 4, 2

This fixes the first half of PR2480

llvm-svn: 55539
2008-08-29 17:12:13 +00:00
Evan Cheng 44b2138b9a TableGen'ing instruction encodings.
llvm-svn: 55533
2008-08-29 07:42:03 +00:00
Evan Cheng c139c221dd addrmode1 (data processing) instruction encoding: bits 5-6 are 0, bits 7-10 encode the opcode.
llvm-svn: 55531
2008-08-29 07:40:52 +00:00
Evan Cheng 9f717afd68 MVN is addrmode1.
llvm-svn: 55530
2008-08-29 07:36:24 +00:00
Evan Cheng ee98fa9db2 More refactoring.
llvm-svn: 55528
2008-08-29 06:41:12 +00:00
Evan Cheng 960b17a3c2 Swap fp comparison operands and change predicate to allow load folding.
llvm-svn: 55521
2008-08-28 23:48:31 +00:00
Evan Cheng 2d37f19ef2 Refactor ARM instruction format definitions into a separate file. No functionality changes.
llvm-svn: 55518
2008-08-28 23:39:26 +00:00
Dan Gohman d58f3e36d0 Add a target callback for FastISel.
llvm-svn: 55512
2008-08-28 23:21:34 +00:00
Gabor Greif 95d77f5466 remove tabs, fix > 80 cols
llvm-svn: 55511
2008-08-28 23:19:51 +00:00
Chris Lattner e6fe88391a rename destroy -> releaseMemory to properly hook into passmgr.
llvm-svn: 55508
2008-08-28 22:56:53 +00:00
Nicolas Geoffray b011a8f611 Add support for JIT exceptions on Darwin. Since we're dealing with libgcc,
whose darwin code was written after the ability to dynamically register frames,
we need to do special hacks to make things work.

llvm-svn: 55507
2008-08-28 22:34:49 +00:00
Gabor Greif f304a7aa4d erect abstraction boundaries for accessing SDValue members, rename Val -> Node to reflect semantics
llvm-svn: 55504
2008-08-28 21:40:38 +00:00
Dan Gohman c45733f194 Implement null and undef values for FastISel.
llvm-svn: 55500
2008-08-28 21:19:07 +00:00
Mon P Wang 1e137300bd In lowering SELECT_CC, removed cases where we can't flip the true and false when the compare value has a NaN
llvm-svn: 55499
2008-08-28 21:04:05 +00:00
Dan Gohman f27e33baa7 Optimize DAGCombiner's worklist processing. Previously it started
its work by putting all nodes in the worklist, requiring a big
dynamic allocation. Now, DAGCombiner just iterates over the AllNodes
list and maintains a worklist for nodes that are newly created or
need to be revisited. This allows the worklist to stay small in most
cases, so it can be a SmallVector.

This has the side effect of making DAGCombine not miss a folding
opportunity in alloca-align-rounding.ll.

llvm-svn: 55498
2008-08-28 21:01:56 +00:00
Dan Gohman 17da671922 Move CaseBlock, JumpTable, and BitTestBlock to be members of
SelectionDAGLowering instead of being in an anonymous namespace.
This fixes warnings about SelectionDAGLowering having fields
using anonymous namespaces.

llvm-svn: 55497
2008-08-28 20:38:18 +00:00
Dan Gohman 360c57f683 Fix a FastISel bug where the instructions from lowering the arguments
were being emitted after the first instructions of the entry block.

llvm-svn: 55496
2008-08-28 20:28:56 +00:00
Rafael Espindola 26d54b3ef3 Use resize instead of reserve. Reserve doesn't change size().
llvm-svn: 55486
2008-08-28 18:32:53 +00:00
Rafael Espindola 6c8a99a778 Reduce the size of the Parts vector.
llvm-svn: 55483
2008-08-28 18:29:58 +00:00
Owen Anderson d8a82b75e2 Hook up support for fast-isel of trunc instructions, using the newly working support for EXTRACT_SUBREG.
llvm-svn: 55482
2008-08-28 18:26:01 +00:00
Dale Johannesen a32affb9ba Implement partial-word binary atomics on ppc.
llvm-svn: 55478
2008-08-28 17:53:09 +00:00
Owen Anderson 9cd1a5e530 FastEmitInst_extractsubreg doesn't need to be passed the register class. It can get it from MachineRegisterInfo instead.
llvm-svn: 55476
2008-08-28 17:47:37 +00:00
Dan Gohman 04cf2e4540 Revert r55467; it causes regressions in UnitTests/Vector/divides,
Benchmarks/sim/sim, and others on x86-64.

llvm-svn: 55475
2008-08-28 17:22:54 +00:00
Rafael Espindola 029c1c8460 Correctly resize the Parts array.
llvm-svn: 55471
2008-08-28 14:24:45 +00:00
Evan Cheng 6975602024 If a copy isn't coalesced, but its src is defined by trivial computation. Re-materialize the src to replace the copy.
llvm-svn: 55467
2008-08-28 07:53:51 +00:00
Evan Cheng 97af20f85f FsFLD0S{S|D} and V_SETALLONES are as cheap as moves.
llvm-svn: 55466
2008-08-28 07:52:25 +00:00
Chris Lattner e5a22c06c5 Make the verifier reject instructions which have null pointers
for operands: rdar://6179606.  no testcase, because I can't write
a .ll file that is this broken ;-)

llvm-svn: 55460
2008-08-28 04:02:44 +00:00
Chris Lattner 65df1188c6 Clear the intervals list in "destroy", patch by
Prakash Prabhu!

llvm-svn: 55458
2008-08-28 03:33:03 +00:00