Commit Graph

372 Commits

Author SHA1 Message Date
Robert Flack 96ad3de54b Convert mmap options for target in InferiorCallMmap.
Converts the MAP_PRIVATE and MAP_ANON options to the target platform constants
(on which the call runs) rather than using those of the compiled host.

Test Plan:
Run test suite, the following tests requiring memory allocation / JIT support
begin passing when running mac -> linux:
Test11588.py
TestAnonymous.py
TestBreakpointConditions.py
TestCPPStaticMethods.py
TestCStrings.py
TestCallStdStringFunction.py
TestDataFormatterCpp.py
TestDataFormatterStdList.py
TestExprDoesntBlock.py
TestExprHelpExamples.py
TestFunctionTypes.py
TestPrintfAfterUp.py
TestSBValuePersist.py
TestSetValues.py

Differential Revision: http://reviews.llvm.org/D9511

llvm-svn: 236933
2015-05-09 15:53:31 +00:00
Chaoren Lin 6598431c7a Same issue as in D8685 but for i386.
llvm-svn: 235454
2015-04-21 23:00:58 +00:00
Ed Maste 97df86ceb1 FreeBSD/arm core file support
Patch by Andrew Turner, with minor edits. XCode changes are mine; please
update if necessary.

llvm-svn: 235305
2015-04-20 13:58:19 +00:00
Ed Maste 8902e530bc Correct machine type for 32-bit arm
Reported by Andrew Turner.

llvm-svn: 235275
2015-04-19 18:27:00 +00:00
Omair Javaid 3f57216ca4 Adds Register Context Linux/POSIX for ARM Architecture
This patch is major step towards supporting lldb on ARM.
This adds all the required bits to support register manipulation on Linux Arm.
Also adds utility enumerations, definitions and register context classes for arm.

llvm-svn: 234870
2015-04-14 07:30:20 +00:00
Mohit K. Bhakkad 2c2acf9602 [LLDB][MIPS] Add LinuxSignals for mips64 and change trap opcode for mips64el.
Patch by Sagar Thakur

- Added LinuxSignals for MIPS64.
- Changed software trap opcode for mips64el.

Reviewers: clayborg, tberghammer.

Subscribers: emaste, jaydeep, bhushan, mohit.bhakkad, llvm-commits.

Differential Revision: http://reviews.llvm.org/D8856

llvm-svn: 234469
2015-04-09 07:12:15 +00:00
Greg Clayton ab745c2ad8 Fix stepping a virtual thread when the python operating system was enabled.
The OperatingSystem plug-ins allow code to detect threads in memory and then say "memory thread 0x11111" is backed by the actual thread 1. 

You can then single step these virtual threads. A problem arose when thread specific breakpoints were used during thread plans where we would say "set a breakpoint on thread 0x11111" and we would hit the breakpoint on the real thread 1 and the thread IDs wouldn't match and we would get rid of the "stopped at breakpoint" stop info due to this mismatch. Code was added to ensure these events get forwarded and thus allow single stepping a memory thread to work correctly.

Added a test case for this as well.

<rdar://problem/19211770>

llvm-svn: 234364
2015-04-07 22:17:41 +00:00
Zachary Turner 6f21907a89 Fix printing of function names during unwind logging.
llvm-svn: 234172
2015-04-06 16:23:30 +00:00
Ed Maste 4b1063c76c Fix FreeBSD crash after r233837
The FreeBSD debug register access is a little usual, but in any case
different from Linux. As it stands it's not possible to share an
implementation of DR_OFFSET, so revert that part of r233837 and provide
a separate FreeBSD and Linux implementation.

We'll still want a better fix, but this should restore basic
functionality (and the buildbot).

llvm-svn: 234048
2015-04-03 20:49:08 +00:00
Chaoren Lin 4ced470a31 Fix issue where GPR and FPR registers have overlapping byte offsets.
Summary:
The implementation of GDBRemoteRegisterContext relies on byte offsets to cache
register values. GPR, FPR, etc. should start on different offsets. This is
correctly done in debugserver (in DNBArchImplX86_64.cpp), but not on Linux or
FreeBSD (in RegisterInfos_x86_64.h).

Test Plan: `register read st0` no longer overwrites `rbp` on Linux with LLGS.

Reviewers: sivachandra, jingham, emaste, ovyalov, clayborg

Reviewed By: clayborg

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D8685

llvm-svn: 233837
2015-04-01 20:40:34 +00:00
Tamas Berghammer db264a6d09 Move several plugin to its own namespace
Affected paths:
* Plugins/Platform/Android/*
* Plugins/Platform/Linux/*
* Plugins/Platform/gdb-server/*
* Plugins/Process/Linux/*
* Plugins/Process/gdb-remote/*

Differential revision: http://reviews.llvm.org/D8654

llvm-svn: 233679
2015-03-31 09:52:22 +00:00
Tamas Berghammer 492519c884 Specify LLDB_REGNUM_GENERIC_ARG* registers for arm64
llvm-svn: 233369
2015-03-27 10:29:25 +00:00
Ed Maste 7754d21ae0 Handle FreeBSD/arm64 core files
This is derived from FreeBSD/mips64 and Darwin and Linux arm64 support.

Differential Revision:	http://reviews.llvm.org/D7835

llvm-svn: 233273
2015-03-26 14:20:00 +00:00
Zachary Turner 0641ca1a2d Remove ScriptInterpreterObject.
This removes ScriptInterpreterObject from the codebase completely.
Places that used to rely on ScriptInterpreterObject now use
StructuredData::Object and its derived classes.  To support this,
a new type of StructuredData object is introduced, called
StructuredData::Generic, which stores a void*.  Internally within
the python library, StructuredPythonObject subclasses this
StructuredData::Generic class so that it can addref and decref
the python object on construction and destruction.

Additionally, all of the classes in PythonDataObjects.h such
as PythonList, PythonDictionary, etc now provide a method to
create an instance of the corresponding StructuredData type.  For
example, there is PythonDictionary::CreateStructuredDictionary.
To eliminate dependencies on PythonDataObjects for external
callers, all ScriptInterpreter methods now return only
StructuredData classes

The rest of the changes in this CL are focused on fixing up
users of PythonDataObjects classes to use the new StructuredData
classes.

llvm-svn: 232534
2015-03-17 20:04:04 +00:00
David Blaikie 5121c9aa92 Fix the clang -Werror build by suppressing -Wextended-offsetof
llvm-svn: 232507
2015-03-17 17:37:17 +00:00
Mohit K. Bhakkad 3df471c32d [MIPS] - Register Context for MIPS64
Patch by Jaydeep Patil

Summery:
1. Add MIPS variants by parsing e_flags of the ELF
2. Create RegisterInfoInterface and RegisterContext for MIPS64 and MIPS64EL

Reviewers: clayborg

Subscribers: tberghammer, bhushan, mohit.bhakkad, sagar

Differential Revision: http://reviews.llvm.org/D8166

llvm-svn: 232467
2015-03-17 11:43:56 +00:00
Tamas Berghammer 1e209fcceb Create NativeRegisterContext for android-arm64
Differential revision: http://reviews.llvm.org/D8058

llvm-svn: 232160
2015-03-13 11:36:47 +00:00
Zachary Turner 32abc6edac Reduce header footprint of Target.h
This continues the effort to reduce header footprint and improve
build speed by removing clang and other unnecessary headers
from Target.h.  In one case, some headers were included solely
for the purpose of declaring a nested class in Target, which was
not needed by anybody outside the class.  In this case the
definition and implementation of the nested class were isolated
in the .cpp file so the header could be removed.

llvm-svn: 231107
2015-03-03 19:23:09 +00:00
Pavel Labath dbb41cf418 Support evaluation of DWARF expressions setting CFA
Summary:
This patch enables evaluation of DWARF expressions setting the CFA during stack unwinding.

This makes TestSigtrampUnwind "almost" pass on linux. I am not enabling the test yet since the
symbol name for the signal trampoline does not get resolved properly due to a different bug, but
apart from that, the backtrace is sane.

I am unsure how this change affects Mac. I think it makes the unwinder prefer the DWARF unwind
plan instead of some custom platform-dependant plan. However, it does not affect the end result
- the stack unwinding works as expected.

Reviewers: jasonmolenda

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7792

llvm-svn: 230211
2015-02-23 10:29:01 +00:00
Pavel Labath ab970f5e08 UnwindPlan::Row refactor -- add support for CFA set by a DWARF expression
Summary:
This change refactors UnwindPlan::Row to be able to store the fact that the CFA is value is set
by evaluating a dwarf expression (DW_CFA_def_cfa_expression). This is achieved by creating a new
class CFAValue and moving all CFA setting/getting code there. Note that code using the new
CFAValue::isDWARFExpression is not yet present and will be added in a follow-up patch. Therefore,
this patch should not change the functionality in any way.

Test Plan: Ran tests on Mac and Linux. No regressions detected.

Reviewers: jasonmolenda, clayborg

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7755

llvm-svn: 230210
2015-02-23 10:19:16 +00:00
Justin Hibbits 6cfc85a067 Quiet Coverity
Summary: Coverity warns that unsigned >= 0 is always true, and k_first_gpr_powerpc happens to be 0.  Quiet Coverity by changing that comparison instead to a static_assert(), in case things change in the future.

Reviewers: emaste

Reviewed By: emaste

Subscribers: lldb-commits

Differential Revision: http://reviews.llvm.org/D7576

llvm-svn: 228908
2015-02-12 05:31:31 +00:00
Chaoren Lin 03d30fc7bc Adding x86 to supported architectures on x86_64.
llvm-svn: 228715
2015-02-10 18:30:31 +00:00
Justin Hibbits 5c0b98e205 Fix off-by-one IsGPR().
f0 was being counted as a GPR, due to the check in IsGPR().  Correct it by
looking at the precise GPR range.

llvm-svn: 228547
2015-02-08 21:23:23 +00:00
Justin Hibbits f9ec0d1ea5 Implement initial Altivec support
Summary:
This adds the register plumbing, as well as register reading in FreeBSD core
dumps.  Further work on the POSIX/FreeBSD ProcessMonitor is required in order to
support ptrace access to these registers.

Reviewers: tfiala, emaste

Reviewed By: emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D7039

llvm-svn: 228278
2015-02-05 07:12:01 +00:00
Justin Hibbits b07ee8ded9 Add PowerPC FPR access to the process monitor
Summary: This adds reading and writing to the POSIX PowerPC ProcessMonitor.

Reviewers: emaste

Reviewed By: emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D7040

llvm-svn: 228277
2015-02-05 07:10:11 +00:00
Vince Harron d40ef9993e Fixing TestRegisters on Linux with LLGS
This patch fixes TestRegisters on Linux with LLGS

Introduce GetUserRegisterCount on RegisterInfoInterface to distinguish
lldb internal registers (e.g.: DR0-DR7) during register counting.

Update GDBRemoteCommunicationServer to skip lldb internal registers on
read/write register and on discover register.

Submitted for Tamas Berghammer

llvm-svn: 226959
2015-01-23 22:57:00 +00:00
Jason Molenda e527c5810c Adding compact unwind as a source of unwind information
introduced subtle bugs in two places in 
RegisterContextLLDB::GetFullUnwindPlanForFrame where 
it specifically wanted to get an eh_frame unwind plan
and was using "Get CallSite UnwindPlan" as synonymous
with that.  But now we have two different types of 
unwind plan that can be returned in that case, and
compact unwind won't behaves as needed.

<rdar://problem/19528559> 

llvm-svn: 226631
2015-01-21 01:26:28 +00:00
Vince Harron 5275aaa0cc Moved Args::StringToXIntYZ to StringConvert::ToXIntYZ
The refactor was motivated by some comments that Greg made
http://reviews.llvm.org/D6918

and also to break a dependency cascade that caused functions linking
in string->int conversion functions to pull in most of lldb

llvm-svn: 226199
2015-01-15 20:08:35 +00:00
Jason Molenda a05677126d Hoist the RegisterNumber class out of RegisterContextLLDB and make
it more generally available. 

Add checks to UnwindAssembly_x86::AugmentUnwindPlanFromCallSite() so
that it won't try to augment an UnwindPlan that already describes
the function epilogue.

Add a test case for backtracing out of _sigtramp on Darwin systems.
This could probably be adapted to test the same thing on linux/bsd but 
the function names of sigtramp and kill are probably platform
specific and I'm not sure what they should be.

llvm-svn: 225578
2015-01-10 04:01:03 +00:00
Jason Molenda 341f0e6ee0 Rearrange RegisterContextLLDB::SavedLocationForRegister a tiny bit
so that we will use the UnwindPlan's rule for providing the stack
pointer BEFORE we use the trick of using the callee's CFA address
as the stack pointer.  When we're in a _sigtramp frame, the CFA of
the _sigtramp stack frame is not the same as the stack pointer value
when the async interrupt occurred -- we need to use the eh_frame
rules for retrieving the correct value.

<rdar://problem/18913548> 

llvm-svn: 225427
2015-01-08 03:57:48 +00:00
Greg Clayton 482f9be175 Make sure if a thread specifies a 'register_data_addr' in a python operating system plug-in, that is is used to fetch the register values.
llvm-svn: 224083
2014-12-11 23:53:52 +00:00
Greg Clayton cd255b3111 Make sure we print errors for python OperatingSystem plug-ins for when things go wrong. We also dump the dictionary or collection that had errors so the user can see which info was wrong.
llvm-svn: 224082
2014-12-11 23:52:05 +00:00
Greg Clayton a97c4d2154 Handle thumb IT instructions correctly all the time.
The issue with Thumb IT (if/then) instructions is the IT instruction preceeds up to four instructions that are made conditional. If a breakpoint is placed on one of the conditional instructions, the instruction either needs to match the thumb opcode size (2 or 4 bytes) or a BKPT instruction needs to be used as these are always unconditional (even in a IT instruction). If BKPT instructions are used, then we might end up stopping on an instruction that won't get executed. So if we do stop at a BKPT instruction, we need to continue if the condition is not true.

When using the BKPT isntructions are easy in that you don't need to detect the size of the breakpoint that needs to be used when setting a breakpoint even in a thumb IT instruction. The bad part is you will now always stop at the opcode location and let LLDB determine if it should auto-continue. If the BKPT instruction is used, the BKPT that is used for ARM code should be something that also triggers the BKPT instruction in Thumb in case you set a breakpoint in the middle of code and the code is actually Thumb code. A value of 0xE120BE70 will work since the lower 16 bits being 0xBE70 happens to be a Thumb BKPT instruction. 

The alternative is to use trap or illegal instructions that the kernel will translate into breakpoint hits. On Mac this was 0xE7FFDEFE for ARM and 0xDEFE for Thumb. The darwin kernel currently doesn't recognize any 32 bit Thumb instruction as a instruction that will get turned into a breakpoint exception (EXC_BREAKPOINT), so we had to use the BKPT instruction on Mac. The linux kernel recognizes a 16 and a 32 bit instruction as valid thumb breakpoint opcodes. The benefit of using 16 or 32 bit instructions is you don't stop on opcodes in a IT block when the condition doesn't match. 

To further complicate things, single stepping on ARM is often implemented by modifying the BCR/BVR registers and setting the processor to stop when the PC is not equal to the current value. This means single stepping is another way the ARM target can stop on instructions that won't get executed.

This patch does the following:
1 - Fix the internal debugserver for Apple to use the BKPT instruction for ARM and Thumb
2 - Fix LLDB to catch when we stop in the middle of a Thumb IT instruction and continue if we stop at an instruction that won't execute
3 - Fixes this in a way that will work for any target on any platform as long as it is ARM/Thumb
4 - Adds a patch for ignoring conditions that don't match when in ARM mode (see below)

This patch also provides the code that implements the same thing for ARM instructions, though it is disabled for now. The ARM patch will check the condition of the instruction in ARM mode and continue if the condition isn't true (and therefore the instruction would not be executed). Again, this is not enable, but the code for it has been added.

<rdar://problem/19145455> 

llvm-svn: 223851
2014-12-09 23:31:02 +00:00
Jason Molenda ce19fe3f38 Add a new 'eRegisterInLiveRegisterContext' RegisterLocation to track
a register value that is live in the stack frame 0 register context.

Fixes a problem where retrieving a register value on stack frame #n
would involved O(n!) stack frame checks.  This could be very slow on
a deep stack when retrieving register values that had not been
modified/saved by any of the stack frames.  Not common, but annoying
when it was hit.

<rdar://problem/19010211> 

llvm-svn: 223843
2014-12-09 22:28:10 +00:00
Jason Molenda e589e7e336 The lldb unwinder can now use the unwind information from the compact-unwind
section for x86_64 and i386 targets on Darwin systems.  Currently only the
compact unwind encoding for normal frame-using functions is supported but it
will be easy handle frameless functions when I have a bit more free time to
test it.  The LSDA and personality routines for functions are also retrieved
correctly for functions from the compact unwind section.

This new code is very fresh -- it passes the lldb testsuite and I've done
by-hand inspection of many functions and am getting correct behavior for all
of them.  There may need to be some bug fixing over the next couple weeks as
I exercise and test it further.  But I think it's fine right now so I'm
committing it.

<rdar://problem/13220837> 

llvm-svn: 223625
2014-12-08 03:09:00 +00:00
Jason Molenda cea6d634a5 When a RegisterContext produces an invalid CFA address, change
UnwindLLDB::AddOneMoreFrame to try the fallback unwind plan on
that same stack frame before it tries the fallback unwind plan
on the "next" or callee frame.

In RegisterContextLLDB::TryFallbackUnwindPlan, when we're
trying the fallback unwind plan to see if it is valid, make
sure we change all of the object ivars that might be used in
the process of fetching the CFA & caller's saved pc value 
and restore those if we decide not to use the fallback 
unwindplan.

<rdar://problem/19035079> 

llvm-svn: 222601
2014-11-22 01:52:03 +00:00
Zachary Turner 7f013bcd60 Rename lldb registers to contain lldb_ prefix.
LLDB supports many different register numbering schemes, and these
are typically prefixed with an indicator that lets the user know
what numbering scheme is used.  The gcc numbering scheme is
prefixed with gcc, and there are similar ones for dwarf, gdb,
and gcc_dwarf.

LLDB also contains its own internal numbering scheme, but the enum
for LLDB's numbering scheme was prefixed differently.  This patch
changes the names of these enums to use the same naming scheme for
the enum values as the rest of the register kinds by removing gpr_
and fpu_ prefixes, and instead using lldb_ prefixes for all enum
values.

Differential Revision: http://reviews.llvm.org/D6351
Reviewed by: Greg Clayton

llvm-svn: 222495
2014-11-21 02:00:21 +00:00
Zachary Turner 7b1534e452 Remove duplicated enum, use the authoritative one.
Running a diff against lldb-x86-register-enums.h and the file
modified in this patch, the two enums were completely identical.

Deleting one of them to reduce code noise.

llvm-svn: 222478
2014-11-20 23:19:40 +00:00
Jason Molenda 51a4511b72 Add additional checks to the SavedLocationForRegister method
where it is retrieving the Return Address register contents
on a target where that's a thing.  If we fail to get a valid
RA, we force a switch to the fallback unwind plan.  This patch
adds a sanity check for that fallback unwind plan -- it must
get a valid CFA for this frame in addition to being able to
retrieve the caller's PC -- and it correctly marks the unwind
rules as failing if the fallback unwind plan fails.

<rdar://problem/19010211> 

llvm-svn: 222301
2014-11-19 02:29:52 +00:00
Jason Molenda 22975a28ac A pretty big overhaul of the TryFallbackUnwindPlan method in
RegisterContextLLDB.  I have core files of half a dozen tricky
unwind situations on x86/arm and they're all working pretty much
correctly at this point, but we'll need to keep an eye out for
unwinder regressions for a little while; it's tricky to get these
heuristics completely correct in all unwind situations.

<rdar://problem/18937193> 

llvm-svn: 221866
2014-11-13 07:31:45 +00:00
Jason Molenda d8cc6bc325 Use PRIx64 when printing addr_t's. Don't need to force full-width 0 padding
with addresses that aren't designed to be column-aligned across multiple lines.

llvm-svn: 221810
2014-11-12 19:51:43 +00:00
Ed Maste b5363110c7 Avoid crash in InitializeNonZerothFrame if no module found
After r221575 TestCallStopAndContinue and TestCallThatRestarts started
crashing on FreeBSD with a null temporary_module_sp in
RegisterContextLLDB::InitializeNonZerothFrame().

llvm-svn: 221805
2014-11-12 18:49:54 +00:00
Justin Hibbits 62cf35b8a3 FIx a bug with PC-register handling in a RA register.
The addition of RegisterNumber introduced a bug where if the PC is stored in a
return address register, such as on ARM and PowerPC, this register number is
retrieved and used, but never checked in the row if it's saved.  Correct this by
setting the variable that's used to the new register number.

Patch by Jason Molenda.

llvm-svn: 221790
2014-11-12 15:14:12 +00:00
Justin Hibbits 89e6f3851e Improve PowerPC unwind support
Summary:
Taking advantage of the new 'CFAIsRegisterDereferenced' CFA register type, add
full stack unwind support to the PowerPC/PowerPC64 ABI.  Also, add a new
register set for powerpc32-on-64, so the register sizes are correct.  This also
requires modifying the ProcessMonitor to add support for non-uintptr_t-sized
register values.

Reviewers: jasonmolenda, emaste

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D6183

llvm-svn: 221789
2014-11-12 15:14:08 +00:00
Justin Hibbits 43bcdbde4a Add an alternative CFA type.
Summary:
PowerPC handles the stack chain with the current stack pointer being a pointer
to the backchain (CFA).  LLDB currently has no way of handling this, so this
adds a "CFA is dereferenced from a register" type.

Discussed with Jason Molenda, who also provided the initial patch for this.

Reviewers: jasonmolenda

Reviewed By: jasonmolenda

Subscribers: emaste, lldb-commits

Differential Revision: http://reviews.llvm.org/D6182

llvm-svn: 221788
2014-11-12 15:14:03 +00:00
Jason Molenda d158db0f63 Add an operator== to the RegisterNumber class; it simplifies
RegisterContextLLDB a bit more in a few places.

llvm-svn: 221677
2014-11-11 08:26:44 +00:00
Jason Molenda bd07fd57f6 Add a RegisterNumber class to RegisterContextLLDB.h and start using
it in RegisterContext.cpp.

There's a lot of bookkeeping code in RegisterContextLLDB where it has
to convert between different register numbering schemes and it makes 
some methods like SavedLocationForRegister very hard to read or
maintain.  Abstract all of the details about different register numbering
systems for a given register into this new class to make it easier 
to understand what the method is doing.

Also add register name printing to all of the logging -- that's easy to
get now that I've got an object to represent the register numbers.

There were some gnarly corner cases of this method that I believe
I've translated correctly - initial testing looks good but it's
possible I missed a corner case, especially with architectures which
uses a link-register aka return address register like arm32/arm64.
Basic behavior is correct but there are a lot of corner casese that are
handled in this method ...

llvm-svn: 221577
2014-11-08 08:09:22 +00:00
Jason Molenda cf29675d95 Fix a corner case with the handling of noreturn functions.
If a noreturn function was the last function in a section,
we wouldn't correctly back up the saved-pc value into the
correct section leading to us showing the wrong function in
the backtrace.

Also add a backtrace test with an attempt to elicit this 
particular layout.  It happens to work out with clang -Os
but other compilers may not quite get the same layout I'm
getting at that opt setting.  We'll still be exercising the
basic noreturn handling in the unwinder even if we don't get
one function at the very end of a section.

<rdar://problem/16051613> 

llvm-svn: 221575
2014-11-08 05:38:17 +00:00
Shawn Best 8da0bf3b7c LLGS Android target support - for Andy Chien : http://reviews.llvm.org/D6166
llvm-svn: 221570
2014-11-08 01:41:49 +00:00
Jason Molenda 9bb421d38b Add one extra sanity check to RegisterContextLLDB::TryFallbackUnwindPlan
so it doesn't try the arch default if a comiler-generated (eh_frame,
compact unwind info) based unwind plan has failed.

llvm-svn: 221239
2014-11-04 05:35:32 +00:00