Commit Graph

89125 Commits

Author SHA1 Message Date
Tim Northover a80c4c1a08 Add AArch64 CRC32 instructions
These instructions are a late addition to the architecture, and may
yet end up behind an optional attribute, but for now they're available
at all times.

llvm-svn: 174496
2013-02-06 09:13:13 +00:00
Tim Northover 91a51c5a7c Add icache prefetch operations to AArch64
This adds hints to the various "prfm" instructions so that they can
affect the instruction cache as well as the data cache.

llvm-svn: 174495
2013-02-06 09:04:56 +00:00
Bill Wendling 63b8819445 Initial submission for the attribute group feature.
Attribute groups are of the form:

  #0 = attributes { noinline "no-sse" "cpu"="cortex-a8" alignstack=4 }

Target-dependent attributes are represented as strings. Attributes can have
optional values associated with them. E.g., the "cpu" attribute has the value
"cortex-a8".

Target-independent attributes are listed as enums inside the attribute classes.

Multiple attribute groups can be referenced by the same object. In that case,
the attributes are merged together.

llvm-svn: 174493
2013-02-06 06:52:58 +00:00
Craig Topper 821d6af6c2 Remove extra blank line between closing curly brace and 'else'
llvm-svn: 174492
2013-02-06 06:50:38 +00:00
Craig Topper 3931a4422a Remove unused private field to suppress a build warning.
llvm-svn: 174491
2013-02-06 06:48:10 +00:00
Bill Wendling bf902f1d0d Alphabetize the function attributes.
llvm-svn: 174490
2013-02-06 06:22:58 +00:00
Jim Grosbach 231e7aa460 ARM: Use MCTargetAsmParser::validateTargetOperandClass().
Use the validateTargetOperandClass() hook to match literal '#0' operands in
InstAlias definitions. Previously this required per-instruction C++ munging of the
operand list, but not is handled as a natural part of the matcher. Much better.

No additional tests are required, as the pre-existing tests for these instructions
exercise the new behaviour as being functionally equivalent to the old.

llvm-svn: 174488
2013-02-06 06:00:11 +00:00
Jim Grosbach 86c652a6b2 Allow targets to add custom asm operand matching logic.
For example, ARM has several instructions with a literal '#0' immediate in the syntax
that's not represented as an actual operand. The asm matcher is expected a token
operand, but the parser will have created an immediate operand. This is currently
handled by dedicated per-instruction C++ munging of the ParsedAsmOperand list, but
will be better handled by this hook.

llvm-svn: 174487
2013-02-06 06:00:06 +00:00
Eli Bendersky 4e6d811eef Failing builds because a private class member is not being used after
initialization is one of the reasons I consider -werror to be shoddy.

llvm-svn: 174485
2013-02-06 05:37:46 +00:00
Eli Bendersky c4446856e3 Remove this test in the meantime, since it won't pass on Atom. Atom uses lea
to move the stack pointer in prologs/epilogs. I will fix the test and add it
back later.

llvm-svn: 174484
2013-02-06 03:15:00 +00:00
Eli Bendersky 0b04cb0f0e Add virtual desctructor to FrameEntry to avoid error on delete-non-virtual-dtor
llvm-svn: 174483
2013-02-06 03:08:02 +00:00
Evan Cheng a72b9709d7 Tweak check to avoid integer overflow (for insanely large alignments)
llvm-svn: 174482
2013-02-06 02:06:33 +00:00
Bill Wendling 4b00144e1b Add a 'StringRef' version of hasAttribute.
Fix the 'operator==' and 'hasAttributes' queries to take into account
target-dependent attributes.

llvm-svn: 174481
2013-02-06 01:33:42 +00:00
Bill Wendling e261492fd4 Add methods to merge an AttrBuilder into another builder.
This is useful when parsing an object that references multiple attribute groups.

N.B. If both builders have alignments specified, then they should match!

llvm-svn: 174480
2013-02-06 01:16:00 +00:00
Manman Ren d2c38d684a Attempt to recover gdb bot after r174445.
Failure: undefined symbol 'Lline_table_start0'.
Root-cause: we use a symbol subtraction to calculate at_stmt_list, but
the line table entries are not dumped in the assembly.
Fix: use zero instead of a symbol subtraction for Compile Unit 0.

llvm-svn: 174479
2013-02-06 00:59:41 +00:00
Eli Bendersky 1aa265d12b Fix some formatting & add comments, following Eric's review
llvm-svn: 174473
2013-02-06 00:20:38 +00:00
Bill Wendling ae89a0fbc2 Add the target-dependent (string) attributes from the AttrBuilder to the AttributeSet.
llvm-svn: 174467
2013-02-05 23:48:36 +00:00
Eli Bendersky aece14cadd Add missing file to CMake list
llvm-svn: 174465
2013-02-05 23:37:18 +00:00
Eli Bendersky 59a6fb0381 Test for r174446
llvm-svn: 174464
2013-02-05 23:31:48 +00:00
Eli Bendersky fd08bc195b Initial support for DWARF CFI parsing and dumping in LLVM
llvm-svn: 174463
2013-02-05 23:30:58 +00:00
Eli Bendersky 12547bc76c Be consistent about the field name - AddressSize, not PointerSize. Add
a setter and fix some comments.

llvm-svn: 174462
2013-02-05 23:26:02 +00:00
Bob Wilson 5dba16c581 Preprocess Apple llvmCore headers to reflect NDEBUG setting. <rdar://12568983>
If an Apple llvmCore build is done without assertions, and a client uses
the llvmCore headers with assertions enabled, or vice versa, then things will
break because some of the structure sizes in the API are different.  Use the
unifdef tool to make the headers unconditionally match the way the llvmCore
libraries were built.

llvm-svn: 174460
2013-02-05 22:59:42 +00:00
Andrew Trick 780ebadc1a Revert "[Support][ErrorOr] Add support for convertable types."
This reverts commit a33e1fafac7fedb1b080ef07ddf9ad6ddff3a830.

This unit test crashes on Darwon. It needs to be temporarily reverted
to unblock the test infrastructure.

llvm-svn: 174458
2013-02-05 22:50:20 +00:00
Bill Wendling 3f12ac2138 Convert to storing the attribute's internals as enums, integers, and strings.
The stuff we're handing are all enums (Attribute::AttrKind), integers and
strings. Don't convert them to Constants, which is an unnecessary step here. The
rest of the changes are mostly mechanical.

llvm-svn: 174456
2013-02-05 22:37:24 +00:00
Eli Bendersky 44a40ca143 Make sure the correct opcodes are used to SUB and ADD the stack
pointer in function prologs/epilogs. The opcodes should depend on the
data model (LP64 vs. ILP32) rather than the architecture bit-ness.

llvm-svn: 174446
2013-02-05 21:53:29 +00:00
Manman Ren 4e042a6be6 Dwarf: support for LTO where a single object file can have multiple line tables
We generate one line table for each compilation unit in the object file.
Reviewed by Eric and Kevin.

rdar://problem/13067005

llvm-svn: 174445
2013-02-05 21:52:47 +00:00
Akira Hatanaka dec25266d7 [mips] Do not use function CC_MipsN_VarArg unless the function being analyzed
is a vararg function.

The original code was examining flag OutputArg::IsFixed to determine whether
CC_MipsN_VarArg or CC_MipsN should be called. This is not correct, since this
flag is often set to false when the function being analyzed is a non-variadic
function.

llvm-svn: 174442
2013-02-05 21:18:11 +00:00
Michael J. Spencer d7e7003e8b [objdump,readobj] Document the purpose and goals of each tool.
llvm-svn: 174439
2013-02-05 20:27:22 +00:00
Benjamin Kramer 944e0abf04 InstCombine: Fix and simplify the inttoptr side too.
llvm-svn: 174438
2013-02-05 20:22:40 +00:00
Michael Gottesman a750006ad6 Added missing newline to end of test case.
llvm-svn: 174433
2013-02-05 19:39:44 +00:00
Michael Gottesman 415ddd7e13 Removed explicit inline as per the LLVM style guide.
llvm-svn: 174432
2013-02-05 19:32:18 +00:00
Owen Anderson de89ecf1fc Reapply r174343, with a fix for a scary DAG combine bug where it failed to differentiate between the alignment of the
base point of a load, and the overall alignment of the load.  This caused infinite loops in DAG combine with the
original application of this patch.

ORIGINAL COMMIT LOG:
When the target-independent DAGCombiner inferred a higher alignment for a load,
it would replace the load with one with the higher alignment.  However, it did
not place the new load in the worklist, which prevented later DAG combines in
the same phase (for example, target-specific combines) from ever seeing it.

This patch corrects that oversight, and updates some tests whose output changed
due to slightly different DAGCombine outputs.

llvm-svn: 174431
2013-02-05 19:24:39 +00:00
Benjamin Kramer e477875873 InstCombine: Harden code to work with vectors of pointers and simplify it a bit.
Found by running instcombine on a fabricated test case for the constant folder.

llvm-svn: 174430
2013-02-05 19:21:56 +00:00
Jyotsna Verma 6031625b03 Hexagon: Use TFR_cond with cmpb.[eq,gt,gtu] to handle
zext( set[ne,eq,gt,ugt] (...) ) type of dag patterns.

llvm-svn: 174429
2013-02-05 19:20:45 +00:00
Benjamin Kramer a5a9ec5755 ConstantFolding: Fix a crash when encoutering a truncating inttoptr.
This was introduced in r173293.

llvm-svn: 174424
2013-02-05 19:04:36 +00:00
Arnold Schwaighofer 3be40b56c5 Loop Vectorizer: Refactor code to compute vectorized memory instruction cost
Introduce a helper class that computes the cost of memory access instructions.
No functionality change intended.

llvm-svn: 174422
2013-02-05 18:46:41 +00:00
Jyotsna Verma d53b25b47e Hexagon: Add testcase for post-increment store instructions.
llvm-svn: 174419
2013-02-05 18:23:51 +00:00
Chad Rosier 92a54f6d4c [SjLj Prepare] When demoting an invoke instructions to the stack, if the normal
edge is critical, then split it so we can insert the store.
rdar://13126179

llvm-svn: 174418
2013-02-05 18:23:10 +00:00
Jakob Stoklund Olesen 4acf7dd866 Remove liveout lists from MachineRegisterInfo.
All targets are now adding return value registers as implicit uses on
return instructions, and there is no longer a need for the live out
lists.

llvm-svn: 174417
2013-02-05 18:21:56 +00:00
Jakob Stoklund Olesen c338679c9d Remove special-casing of return blocks for liveness.
Now that return value registers are return instruction uses, there is no
need for special treatment of return blocks.

llvm-svn: 174416
2013-02-05 18:21:52 +00:00
Jakob Stoklund Olesen dbc8c51acb Move MRI liveouts to AArch64 return instructions.
llvm-svn: 174415
2013-02-05 18:21:49 +00:00
Jakob Stoklund Olesen 4af19d0014 Move MRI liveouts to XCore return instructions.
llvm-svn: 174414
2013-02-05 18:21:46 +00:00
Jakob Stoklund Olesen ef8bf3cd1f Move MRI liveouts to Sparc return instructions.
llvm-svn: 174413
2013-02-05 18:16:58 +00:00
Jyotsna Verma 50ca6dd8a7 Hexagon: Use multiclass for absolute addressing mode stores.
llvm-svn: 174412
2013-02-05 18:15:34 +00:00
Jakob Stoklund Olesen b52a3ec10b Move MRI liveouts to MSP430 return instructions.
llvm-svn: 174411
2013-02-05 18:12:06 +00:00
Jakob Stoklund Olesen a206050ccb Move MRI liveouts to Mips return instructions.
llvm-svn: 174410
2013-02-05 18:12:03 +00:00
Jakob Stoklund Olesen 8660a8c0fc Move MRI liveouts to PowerPC return instructions.
llvm-svn: 174409
2013-02-05 18:12:00 +00:00
Jakob Stoklund Olesen 242546c99d Move MRI liveouts to MBlaze return instructions.
llvm-svn: 174408
2013-02-05 18:08:45 +00:00
Jakob Stoklund Olesen 0af477c3b1 Move MRI liveouts to Hexagon return instructions.
llvm-svn: 174407
2013-02-05 18:08:43 +00:00
Jakob Stoklund Olesen f90fb6e1ff Move MRI liveouts to ARM return instructions.
llvm-svn: 174406
2013-02-05 18:08:40 +00:00